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d="scan'208";a="109791905" From: Andrew Cooper To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Jeffrey Hugo Subject: [PATCH] x86/apic: Fix use of X{,2}APIC_ENABLE in asm with older binutils Date: Mon, 22 May 2023 11:57:38 +0100 Message-ID: <20230522105738.2378364-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230512203426.452963764@linutronix.de> References: <20230512203426.452963764@linutronix.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230522_035748_691034_458CA3B1 X-CRM114-Status: UNSURE ( 8.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org "x86/smpboot: Support parallel startup of secondary CPUs" adds the first use of X2APIC_ENABLE in assembly, but older binutils don't tolerate the UL suffix. Switch to using BIT() instead. Fixes: 7e75178a0950 ("x86/smpboot: Support parallel startup of secondary CPUs") Reported-by: Jeffrey Hugo Tested-by: Jeffrey Hugo Signed-off-by: Andrew Cooper --- arch/x86/include/asm/apicdef.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) base-commit: 0c7ffa32dbd6b09a87fea4ad1de8b27145dfd9a6 diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index bf546dfb6e58..4b125e5b3187 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h @@ -2,6 +2,8 @@ #ifndef _ASM_X86_APICDEF_H #define _ASM_X86_APICDEF_H +#include + /* * Constants for various Intel APICs. (local APIC, IOAPIC, etc.) * @@ -140,8 +142,8 @@ #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) #define APIC_BASE_MSR 0x800 #define APIC_X2APIC_ID_MSR 0x802 -#define XAPIC_ENABLE (1UL << 11) -#define X2APIC_ENABLE (1UL << 10) +#define XAPIC_ENABLE BIT(11) +#define X2APIC_ENABLE BIT(10) #ifdef CONFIG_X86_32 # define MAX_IO_APICS 64