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envelope-from=mathbern@qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Many Hexagon python scripts call hex_common.get_tagregs(), but only one call site use the full reg structure given by this function. To make the code cleaner, let's make get_tagregs() filter out the unused fields (i.e. 'toss' and 'numregs'), properly removed the unused variables at the call sites. The hex_common.bad_register() function is also adjusted to work exclusively with 'regtype' and 'regid' args. For the single call site that does use toss/numregs, we provide an optional parameter to get_tagregs() which will restore the old full behavior. Suggested-by: Taylor Simpson Signed-off-by: Matheus Tavares Bernardino Reviewed-by: Taylor Simpson Tested-by: Taylor Simpson --- target/hexagon/gen_analyze_funcs.py | 10 +++--- target/hexagon/gen_helper_funcs.py | 30 ++++++++-------- target/hexagon/gen_helper_protos.py | 22 ++++++------ target/hexagon/gen_idef_parser_funcs.py | 4 +-- target/hexagon/gen_op_regs.py | 4 +-- target/hexagon/gen_tcg_funcs.py | 46 ++++++++++++------------- target/hexagon/hex_common.py | 24 ++++++------- 7 files changed, 70 insertions(+), 70 deletions(-) diff --git a/target/hexagon/gen_analyze_funcs.py b/target/hexagon/gen_analyze_funcs.py index 00868cc6cb..c3b521abef 100755 --- a/target/hexagon/gen_analyze_funcs.py +++ b/target/hexagon/gen_analyze_funcs.py @@ -165,7 +165,7 @@ def analyze_opn_new(f, tag, regtype, regid, regno): hex_common.bad_register(regtype, regid) -def analyze_opn(f, tag, regtype, regid, toss, numregs, i): +def analyze_opn(f, tag, regtype, regid, i): if hex_common.is_pair(regid): analyze_opn_old(f, tag, regtype, regid, i) elif hex_common.is_single(regid): @@ -174,9 +174,9 @@ def analyze_opn(f, tag, regtype, regid, toss, numregs, i): elif hex_common.is_new_val(regtype, regid, tag): analyze_opn_new(f, tag, regtype, regid, i) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) ## @@ -202,8 +202,8 @@ def gen_analyze_func(f, tag, regs, imms): i = 0 ## Analyze all the registers - for regtype, regid, toss, numregs in regs: - analyze_opn(f, tag, regtype, regid, toss, numregs, i) + for regtype, regid in regs: + analyze_opn(f, tag, regtype, regid, i) i += 1 has_generated_helper = not hex_common.skip_qemu_helper( diff --git a/target/hexagon/gen_helper_funcs.py b/target/hexagon/gen_helper_funcs.py index e80550f94e..ce21d3b688 100755 --- a/target/hexagon/gen_helper_funcs.py +++ b/target/hexagon/gen_helper_funcs.py @@ -87,9 +87,9 @@ def gen_helper_arg_opn(f, regtype, regid, i, tag): elif hex_common.is_new_val(regtype, regid, tag): gen_helper_arg_new(f, regtype, regid, i) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) def gen_helper_arg_imm(f, immlett): @@ -135,7 +135,7 @@ def gen_helper_dest_decl_opn(f, regtype, regid, i): else: gen_helper_dest_decl(f, regtype, regid, i) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) def gen_helper_src_var_ext(f, regtype, regid): @@ -185,7 +185,7 @@ def gen_helper_return_opn(f, regtype, regid, i): else: gen_helper_return(f, regtype, regid, i) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) ## @@ -208,7 +208,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): numresults = 0 numscalarresults = 0 numscalarreadwrite = 0 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): numresults += 1 if hex_common.is_scalar_reg(regtype): @@ -226,7 +226,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): ## The return type of the function is the type of the destination ## register (if scalar) i = 0 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): if hex_common.is_pair(regid): if hex_common.is_hvx_reg(regtype): @@ -239,7 +239,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): else: gen_helper_return_type(f, regtype, regid, i) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) i += 1 if numscalarresults == 0: @@ -248,7 +248,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): ## Arguments include the vector destination operands i = 1 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): if hex_common.is_pair(regid): if hex_common.is_hvx_reg(regtype): @@ -262,12 +262,12 @@ def gen_helper_function(f, tag, tagregs, tagimms): # This is the return value of the function continue else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) i += 1 ## For conditional instructions, we pass in the destination register if "A_CONDEXEC" in hex_common.attribdict[tag]: - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_writeonly(regid) and not hex_common.is_hvx_reg( regtype ): @@ -275,7 +275,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): i += 1 ## Arguments to the helper function are the source regs and immediates - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_read(regid): if hex_common.is_hvx_reg(regtype) and hex_common.is_readwrite(regid): continue @@ -315,12 +315,12 @@ def gen_helper_function(f, tag, tagregs, tagimms): ## Declare the return variable i = 0 if "A_CONDEXEC" not in hex_common.attribdict[tag]: - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_writeonly(regid): gen_helper_dest_decl_opn(f, regtype, regid, i) i += 1 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_read(regid): if hex_common.is_pair(regid): if hex_common.is_hvx_reg(regtype): @@ -329,7 +329,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): if hex_common.is_hvx_reg(regtype): gen_helper_src_var_ext(f, regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) if hex_common.need_slot(tag): if "A_LOAD" in hex_common.attribdict[tag]: @@ -345,7 +345,7 @@ def gen_helper_function(f, tag, tagregs, tagimms): f.write(" arch_fpop_end(env);\n") ## Save/return the return variable - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): gen_helper_return_opn(f, regtype, regid, i) f.write("}\n\n") diff --git a/target/hexagon/gen_helper_protos.py b/target/hexagon/gen_helper_protos.py index 3dedd76cb4..131043795a 100755 --- a/target/hexagon/gen_helper_protos.py +++ b/target/hexagon/gen_helper_protos.py @@ -46,13 +46,13 @@ } -def gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i): +def gen_def_helper_opn(f, tag, regtype, regid, i): if hex_common.is_pair(regid): f.write(f", {def_helper_types_pair[regtype]}") elif hex_common.is_single(regid): f.write(f", {def_helper_types[regtype]}") else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) ## @@ -68,7 +68,7 @@ def gen_helper_prototype(f, tag, tagregs, tagimms): numresults = 0 numscalarresults = 0 numscalarreadwrite = 0 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): numresults += 1 if hex_common.is_scalar_reg(regtype): @@ -124,10 +124,10 @@ def gen_helper_prototype(f, tag, tagregs, tagimms): ## - Emit the scalar result ## - Emit the vector result i = 0 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): if not hex_common.is_hvx_reg(regtype): - gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i) + gen_def_helper_opn(f, tag, regtype, regid, i) i += 1 ## Put the env between the outputs and inputs @@ -135,27 +135,27 @@ def gen_helper_prototype(f, tag, tagregs, tagimms): i += 1 # Second pass - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): if hex_common.is_hvx_reg(regtype): - gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i) + gen_def_helper_opn(f, tag, regtype, regid, i) i += 1 ## For conditional instructions, we pass in the destination register if "A_CONDEXEC" in hex_common.attribdict[tag]: - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_writeonly(regid) and not hex_common.is_hvx_reg( regtype ): - gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i) + gen_def_helper_opn(f, tag, regtype, regid, i) i += 1 ## Generate the qemu type for each input operand (regs and immediates) - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_read(regid): if hex_common.is_hvx_reg(regtype) and hex_common.is_readwrite(regid): continue - gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i) + gen_def_helper_opn(f, tag, regtype, regid, i) i += 1 for immlett, bits, immshift in imms: f.write(", s32") diff --git a/target/hexagon/gen_idef_parser_funcs.py b/target/hexagon/gen_idef_parser_funcs.py index 29160fcb1d..f4518e653f 100644 --- a/target/hexagon/gen_idef_parser_funcs.py +++ b/target/hexagon/gen_idef_parser_funcs.py @@ -131,7 +131,7 @@ def main(): imms = tagimms[tag] arguments = [] - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: prefix = "in " if hex_common.is_read(regid) else "" is_pair = hex_common.is_pair(regid) @@ -147,7 +147,7 @@ def main(): elif is_single_new: arguments.append(f"{prefix}{regtype}{regid}N") else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) for immlett, bits, immshift in imms: arguments.append(hex_common.imm_name(immlett)) diff --git a/target/hexagon/gen_op_regs.py b/target/hexagon/gen_op_regs.py index 42972c7f9e..a8a7712129 100755 --- a/target/hexagon/gen_op_regs.py +++ b/target/hexagon/gen_op_regs.py @@ -70,7 +70,7 @@ def strip_reg_prefix(x): def main(): hex_common.read_semantics_file(sys.argv[1]) hex_common.read_attribs_file(sys.argv[2]) - tagregs = hex_common.get_tagregs() + tagregs = hex_common.get_tagregs(full=True) tagimms = hex_common.get_tagimms() with open(sys.argv[3], "w") as f: @@ -79,7 +79,7 @@ def main(): rregs = [] wregs = [] regids = "" - for regtype, regid, toss, numregs in regs: + for regtype, regid, _, numregs in regs: if hex_common.is_read(regid): if regid[0] not in regids: regids += regid[0] diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py index c73467b840..fe29d83d4d 100755 --- a/target/hexagon/gen_tcg_funcs.py +++ b/target/hexagon/gen_tcg_funcs.py @@ -223,7 +223,7 @@ def genptr_decl_new(f, tag, regtype, regid, regno): hex_common.bad_register(regtype, regid) -def genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i): +def genptr_decl_opn(f, tag, regtype, regid, i): if hex_common.is_pair(regid): genptr_decl(f, tag, regtype, regid, i) elif hex_common.is_single(regid): @@ -232,9 +232,9 @@ def genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i): elif hex_common.is_new_val(regtype, regid, tag): genptr_decl_new(f, tag, regtype, regid, i) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) def genptr_decl_imm(f, immlett): @@ -354,12 +354,12 @@ def genptr_src_read_opn(f, regtype, regid, tag): elif hex_common.is_new_val(regtype, regid, tag): genptr_src_read_new(f, regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) -def gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i): +def gen_helper_call_opn(f, tag, regtype, regid, i): if i > 0: f.write(", ") if hex_common.is_pair(regid): @@ -370,9 +370,9 @@ def gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i): elif hex_common.is_new_val(regtype, regid, tag): f.write(f"{regtype}{regid}N") else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) def gen_helper_decl_imm(f, immlett): @@ -468,7 +468,7 @@ def genptr_dst_write_opn(f, regtype, regid, tag): else: genptr_dst_write(f, tag, regtype, regid) else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) ## @@ -502,8 +502,8 @@ def gen_tcg_func(f, tag, regs, imms): gen_decl_ea_tcg(f, tag) i = 0 ## Declare all the operands (regs and immediates) - for regtype, regid, toss, numregs in regs: - genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i) + for regtype, regid in regs: + genptr_decl_opn(f, tag, regtype, regid, i) i += 1 for immlett, bits, immshift in imms: genptr_decl_imm(f, immlett) @@ -514,14 +514,14 @@ def gen_tcg_func(f, tag, regs, imms): f.write(" fCHECKFORGUEST();\n") ## Read all the inputs - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_read(regid): genptr_src_read_opn(f, regtype, regid, tag) if hex_common.is_idef_parser_enabled(tag): declared = [] ## Handle registers - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_pair(regid) or ( hex_common.is_single(regid) and hex_common.is_old_val(regtype, regid, tag) @@ -532,7 +532,7 @@ def gen_tcg_func(f, tag, regs, imms): elif hex_common.is_new_val(regtype, regid, tag): declared.append(f"{regtype}{regid}N") else: - hex_common.bad_register(regtype, regid, toss, numregs) + hex_common.bad_register(regtype, regid) ## Handle immediates for immlett, bits, immshift in imms: @@ -564,11 +564,11 @@ def gen_tcg_func(f, tag, regs, imms): f.write(f" gen_helper_{tag}(") i = 0 ## If there is a scalar result, it is the return type - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): if hex_common.is_hvx_reg(regtype): continue - gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) + gen_helper_call_opn(f, tag, regtype, regid, i) i += 1 if i > 0: f.write(", ") @@ -576,23 +576,23 @@ def gen_tcg_func(f, tag, regs, imms): i = 1 ## For conditional instructions, we pass in the destination register if "A_CONDEXEC" in hex_common.attribdict[tag]: - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_writeonly(regid) and not hex_common.is_hvx_reg( regtype ): - gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) + gen_helper_call_opn(f, tag, regtype, regid, i) i += 1 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): if not hex_common.is_hvx_reg(regtype): continue - gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) + gen_helper_call_opn(f, tag, regtype, regid, i) i += 1 - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_read(regid): if hex_common.is_hvx_reg(regtype) and hex_common.is_readwrite(regid): continue - gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i) + gen_helper_call_opn(f, tag, regtype, regid, i) i += 1 for immlett, bits, immshift in imms: gen_helper_call_imm(f, immlett) @@ -612,7 +612,7 @@ def gen_tcg_func(f, tag, regs, imms): f.write(");\n") ## Write all the outputs - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if hex_common.is_written(regid): genptr_dst_write_opn(f, regtype, regid, tag) diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py index f3aac55db0..dce1b852a7 100755 --- a/target/hexagon/hex_common.py +++ b/target/hexagon/hex_common.py @@ -30,9 +30,8 @@ overrides = {} # tags with helper overrides idef_parser_enabled = {} # tags enabled for idef-parser -def bad_register(*args): - args_str = ", ".join(map(str, args)) - raise Exception(f"Bad register parse: {args_str}") +def bad_register(regtype, regid): + raise Exception(f"Bad register parse: regtype '{regtype}' regid '{regid}'") # We should do this as a hash for performance, # but to keep order let's keep it as a list. @@ -124,7 +123,7 @@ def calculate_attribs(): tagregs = get_tagregs() for tag in tags: regs = tagregs[tag] - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if regtype == "P" and is_written(regid): attribdict[tag].add("A_WRITES_PRED_REG") # Mark conditional jumps and calls @@ -170,10 +169,11 @@ def MACROATTRIB(macname, beh, attribstring): attribs = [] macros[macname] = Macro(macname, beh, attribs) - -def compute_tag_regs(tag): - return uniquify(regre.findall(behdict[tag])) - +def compute_tag_regs(tag, full): + tagregs = regre.findall(behdict[tag]) + if not full: + tagregs = map(lambda reg: reg[:2], tagregs) + return uniquify(tagregs) def compute_tag_immediates(tag): return uniquify(immre.findall(behdict[tag])) @@ -200,9 +200,9 @@ def compute_tag_immediates(tag): ## x, y read-write register ## xx, yy read-write register pair ## -def get_tagregs(): - return dict(zip(tags, list(map(compute_tag_regs, tags)))) - +def get_tagregs(full=False): + compute_func = lambda tag: compute_tag_regs(tag, full) + return dict(zip(tags, list(map(compute_func, tags)))) def get_tagimms(): return dict(zip(tags, list(map(compute_tag_immediates, tags)))) @@ -285,7 +285,7 @@ def need_pkt_need_commit(tag): def need_condexec_reg(tag, regs): if "A_CONDEXEC" in attribdict[tag]: - for regtype, regid, toss, numregs in regs: + for regtype, regid in regs: if is_writeonly(regid) and not is_hvx_reg(regtype): return True return False From patchwork Wed May 24 14:41:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matheus Tavares Bernardino X-Patchwork-Id: 13254085 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B599DC77B73 for ; Wed, 24 May 2023 14:42:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 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X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: uSVlFXvvVXGNG-UurvHerwr3BXgQKbXa X-Proofpoint-ORIG-GUID: uSVlFXvvVXGNG-UurvHerwr3BXgQKbXa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_09,2023-05-24_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 clxscore=1015 bulkscore=0 mlxlogscore=621 priorityscore=1501 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305240120 Received-SPF: pass client-ip=205.220.180.131; envelope-from=mathbern@qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Some code comments refer to hex_new_value and hex_new_pred_value, which have been transferred to DisasContext and, in the case of hex_new_value, should now be accessed through get_result_gpr(). In order to fix this outdated comments and also avoid having to tweak them whenever we make a variable name change in the future, let's replace them with pseudocode. Suggested-by: Taylor Simpson Signed-off-by: Matheus Tavares Bernardino Reviewed-by: Taylor Simpson --- target/hexagon/genptr.c | 26 ++++++++++++-------------- target/hexagon/translate.c | 2 +- 2 files changed, 13 insertions(+), 15 deletions(-) diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c index cb2aa28a19..bcb287dd8b 100644 --- a/target/hexagon/genptr.c +++ b/target/hexagon/genptr.c @@ -878,9 +878,9 @@ static void gen_endloop0(DisasContext *ctx) */ if (!ctx->is_tight_loop) { /* - * if (hex_gpr[HEX_REG_LC0] > 1) { - * PC = hex_gpr[HEX_REG_SA0]; - * hex_new_value[HEX_REG_LC0] = hex_gpr[HEX_REG_LC0] - 1; + * if (LC0 > 1) { + * PC = SA0; + * LC0--; * } */ TCGLabel *label3 = gen_new_label(); @@ -897,9 +897,9 @@ static void gen_endloop0(DisasContext *ctx) static void gen_endloop1(DisasContext *ctx) { /* - * if (hex_gpr[HEX_REG_LC1] > 1) { - * PC = hex_gpr[HEX_REG_SA1]; - * hex_new_value[HEX_REG_LC1] = hex_gpr[HEX_REG_LC1] - 1; + * if (LC1 > 1) { + * PC = SA1; + * LC1--; * } */ TCGLabel *label = gen_new_label(); @@ -946,14 +946,12 @@ static void gen_endloop01(DisasContext *ctx) gen_set_label(label2); /* - * if (hex_gpr[HEX_REG_LC0] > 1) { - * PC = hex_gpr[HEX_REG_SA0]; - * hex_new_value[HEX_REG_LC0] = hex_gpr[HEX_REG_LC0] - 1; - * } else { - * if (hex_gpr[HEX_REG_LC1] > 1) { - * hex_next_pc = hex_gpr[HEX_REG_SA1]; - * hex_new_value[HEX_REG_LC1] = hex_gpr[HEX_REG_LC1] - 1; - * } + * if (LC0 > 1) { + * PC = SA0; + * LC0--; + * } else if (LC1 > 1) { + * PC = SA1; + * LC1--; * } */ tcg_gen_brcondi_tl(TCG_COND_LEU, hex_gpr[HEX_REG_LC0], 1, label3); diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index b18f1a9051..8838ab2364 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -556,7 +556,7 @@ static void gen_start_packet(DisasContext *ctx) } /* - * Preload the predicated pred registers into hex_new_pred_value[pred_num] + * Preload the predicated pred registers into ctx->new_pred_value[pred_num] * Only endloop instructions conditionally write to pred registers */ if (ctx->need_commit && pkt->pkt_has_endloop) {