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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id z14-20020a2e964e000000b002ac87c15fd4sm2427762ljh.95.2023.05.29.05.13.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 May 2023 05:13:23 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 35be092a-fe1a-11ed-8611-37d641c3527e DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685362403; x=1687954403; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/C052OVgKf2/+kQyjQaALA5nb1G75JwZbX4aVlgaqOA=; b=VNtgcoWpnSU3L62BC1zjb8x+g1k92ZREVQ2sFWV0gKoTLZkqrSmvRezX6zNPMdy89n P/KxOIkgrwgdu606XaKgCeDWNNHro4WpxMJsPOH+nw0DLFxOiBSgK4MME7eafqAtubYF LIu4ySxhet2MWQrU8I9DpuRQuDM66qgl4WrYR1w8ajBnYP6dNp1ZZhlkbkL40pGBoIKa oiwIx/dYzIdA/p9rDDAJMvH48rlhZ0wMpqQeVY/cl1HA4dPEc8PAQDtCpxpTZXrfNfYk fS0tYDLDOfD9fCIdl6T2FGhybdO6eVoF4cgHCfkl7NpoqvTMz32KbN5Yi86Sb4wrPOY+ jCPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685362403; x=1687954403; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/C052OVgKf2/+kQyjQaALA5nb1G75JwZbX4aVlgaqOA=; b=aHtuGAUjwJWGy95Q7u3juqRWBFfqYz1YNAsIdwysYlXwS69NiccELaTwSxYtc2lWf1 IUzxKsPcOGB2v/rRyU6cC6IfgwEYKC3yj0vjrifoc2x+Hk+XwypwDo2BXuL133rIr3Hn 1CGMEZkKgXMAfyBjwmY3F3L6OOGbsQ9pbvnspx2v3J2nFuLh/MoYvGcLAPV8wGaOamsC EA8c3NJwGXzDW2oqxrcRWQg2b5RBlTeD1f9xvUXcrvxJw3C8w2Ep3M1nObUEZ1FERU3t KSS2AcNUpidtVQB17Xm9flN5iwoDbTTe+xZXUnan8asHUh/lX5YySEZuwx5obY9ITx4C nzWQ== X-Gm-Message-State: AC+VfDzU38Vd0Lg/m9oUfStx2GxDUSFPpAIl8zaRWTlcqLdNn9tBAJf2 g9ybcKbe/lBV5LzfrioInLXZAgU6wJo= X-Google-Smtp-Source: ACHHUZ4KpIiE+T3YC+yLia9p7gQBArv3+/5DXIUwucKoZGsfb2YMWCRkXG+rsinXEzmUEgPso8B6ug== X-Received: by 2002:a05:6512:10cc:b0:4f2:47ea:2f32 with SMTP id k12-20020a05651210cc00b004f247ea2f32mr2439587lfg.23.1685362403464; Mon, 29 May 2023 05:13:23 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Julien Grall , Andrew Cooper , Stefano Stabellini , Oleksii Kurochko , Bob Eshleman , Alistair Francis , Connor Davis Subject: [PATCH v6 1/6] xen/riscv: introduce temporary printk stuff Date: Mon, 29 May 2023 15:13:14 +0300 Message-Id: <2a43fd49b34ff2e3e8e3c35e9cf0bdd72ad63f91.1685359848.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: MIME-Version: 1.0 The patch introdcuces printk related stuff which should be deleted after Xen common code will be available. Signed-off-by: Oleksii Kurochko --- Changes in V6: - the patch was introduced in the current patch series (V6) --- xen/arch/riscv/early_printk.c | 168 ++++++++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/xen/arch/riscv/early_printk.c b/xen/arch/riscv/early_printk.c index 610c814f54..7d24932a35 100644 --- a/xen/arch/riscv/early_printk.c +++ b/xen/arch/riscv/early_printk.c @@ -40,3 +40,171 @@ void early_printk(const char *str) str++; } } + +/* + * The following #if 1 ... #endif should be removed after printk + * and related stuff are ready. + */ +#if 1 + +#include +#include + +/** + * strlen - Find the length of a string + * @s: The string to be sized + */ +size_t (strlen)(const char * s) +{ + const char *sc; + + for (sc = s; *sc != '\0'; ++sc) + /* nothing */; + return sc - s; +} + +/** + * memcpy - Copy one area of memory to another + * @dest: Where to copy to + * @src: Where to copy from + * @count: The size of the area. + * + * You should not use this function to access IO space, use memcpy_toio() + * or memcpy_fromio() instead. + */ +void *(memcpy)(void *dest, const void *src, size_t count) +{ + char *tmp = (char *) dest, *s = (char *) src; + + while (count--) + *tmp++ = *s++; + + return dest; +} + +int vsnprintf(char* str, size_t size, const char* format, va_list args) +{ + size_t i = 0; /* Current position in the output string */ + size_t written = 0; /* Total number of characters written */ + char* dest = str; + + while ( format[i] != '\0' && written < size - 1 ) + { + if ( format[i] == '%' ) + { + i++; + + if ( format[i] == '\0' ) + break; + + if ( format[i] == '%' ) + { + if ( written < size - 1 ) + { + dest[written] = '%'; + written++; + } + i++; + continue; + } + + /* + * Handle format specifiers. + * For simplicity, only %s and %d are implemented here. + */ + + if ( format[i] == 's' ) + { + char* arg = va_arg(args, char*); + size_t arglen = strlen(arg); + + size_t remaining = size - written - 1; + + if ( arglen > remaining ) + arglen = remaining; + + memcpy(dest + written, arg, arglen); + + written += arglen; + i++; + } + else if ( format[i] == 'd' ) + { + int arg = va_arg(args, int); + + /* Convert the integer to string representation */ + char numstr[32]; /* Assumes a maximum of 32 digits */ + int numlen = 0; + int num = arg; + size_t remaining; + + if ( arg < 0 ) + { + if ( written < size - 1 ) + { + dest[written] = '-'; + written++; + } + + num = -arg; + } + + do + { + numstr[numlen] = '0' + num % 10; + num = num / 10; + numlen++; + } while ( num > 0 ); + + /* Reverse the string */ + for (int j = 0; j < numlen / 2; j++) + { + char tmp = numstr[j]; + numstr[j] = numstr[numlen - 1 - j]; + numstr[numlen - 1 - j] = tmp; + } + + remaining = size - written - 1; + + if ( numlen > remaining ) + numlen = remaining; + + memcpy(dest + written, numstr, numlen); + + written += numlen; + i++; + } + } + else + { + if ( written < size - 1 ) + { + dest[written] = format[i]; + written++; + } + i++; + } + } + + if ( size > 0 ) + dest[written] = '\0'; + + return written; +} + +void printk(const char *format, ...) +{ + static char buf[1024]; + + va_list args; + va_start(args, format); + + (void)vsnprintf(buf, sizeof(buf), format, args); + + early_printk(buf); + + va_end(args); +} + +#endif + From patchwork Mon May 29 12:13:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13258485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 302B0C77B7A for ; Mon, 29 May 2023 12:13:48 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.540606.842472 (Exim 4.92) (envelope-from ) id 1q3bkf-0005d4-Nz; Mon, 29 May 2023 12:13:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 540606.842472; Mon, 29 May 2023 12:13:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q3bkf-0005cG-Kh; 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Only rebase. --- Changes in V5: * the patch was introduced in the current patch series (V5) --- xen/arch/riscv/include/asm/bug.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 xen/arch/riscv/include/asm/bug.h diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h new file mode 100644 index 0000000000..e8b1e40823 --- /dev/null +++ b/xen/arch/riscv/include/asm/bug.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2012 Regents of the University of California + * Copyright (C) 2021-2023 Vates + * + */ +#ifndef _ASM_RISCV_BUG_H +#define _ASM_RISCV_BUG_H + +#endif /* _ASM_RISCV_BUG_H */ From patchwork Mon May 29 12:13:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13258487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C410FC77B7E for ; Mon, 29 May 2023 12:13:48 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.540603.842450 (Exim 4.92) (envelope-from ) id 1q3bkd-0005DX-Sm; Mon, 29 May 2023 12:13:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 540603.842450; Mon, 29 May 2023 12:13:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q3bkd-0005DQ-Pw; Mon, 29 May 2023 12:13:27 +0000 Received: by outflank-mailman (input) for mailman id 540603; Mon, 29 May 2023 12:13:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q3bkd-0005DK-2F for xen-devel@lists.xenproject.org; Mon, 29 May 2023 12:13:27 +0000 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [2a00:1450:4864:20::234]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 36b8513a-fe1a-11ed-b231-6b7b168915f2; Mon, 29 May 2023 14:13:25 +0200 (CEST) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2af7081c9ebso33984231fa.1 for ; Mon, 29 May 2023 05:13:26 -0700 (PDT) Received: from fedora.. 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Signed-off-by: Oleksii Kurochko --- Changes in V6: - Remove usage of LINK_TO_LOAD() due to the MMU being enabled first. - Change early_printk() to printk() --- Changes in V5: - Remove from riscv/traps/c as nothing would require inclusion. - decode_reserved_interrupt_cause(), decode_interrupt_cause(), decode_cause, do_unexpected_trap() were made as static they are expected to be used only in traps.c - use LINK_TO_LOAD() for addresses which can be linker time relative. --- Changes in V4: - fix string in decode_reserved_interrupt_cause() --- Changes in V3: - Nothing changed --- Changes in V2: - Make decode_trap_cause() more optimization friendly. - Merge the pathc which introduces do_unexpected_trap() to the current one. --- xen/arch/riscv/traps.c | 84 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index ccd3593f5a..ea1012e83e 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -4,10 +4,92 @@ * * RISC-V Trap handlers */ + +#include + +#include +#include #include #include -void do_trap(struct cpu_user_regs *cpu_regs) +static const char *decode_trap_cause(unsigned long cause) +{ + static const char *const trap_causes[] = { + [CAUSE_MISALIGNED_FETCH] = "Instruction Address Misaligned", + [CAUSE_FETCH_ACCESS] = "Instruction Access Fault", + [CAUSE_ILLEGAL_INSTRUCTION] = "Illegal Instruction", + [CAUSE_BREAKPOINT] = "Breakpoint", + [CAUSE_MISALIGNED_LOAD] = "Load Address Misaligned", + [CAUSE_LOAD_ACCESS] = "Load Access Fault", + [CAUSE_MISALIGNED_STORE] = "Store/AMO Address Misaligned", + [CAUSE_STORE_ACCESS] = "Store/AMO Access Fault", + [CAUSE_USER_ECALL] = "Environment Call from U-Mode", + [CAUSE_SUPERVISOR_ECALL] = "Environment Call from S-Mode", + [CAUSE_MACHINE_ECALL] = "Environment Call from M-Mode", + [CAUSE_FETCH_PAGE_FAULT] = "Instruction Page Fault", + [CAUSE_LOAD_PAGE_FAULT] = "Load Page Fault", + [CAUSE_STORE_PAGE_FAULT] = "Store/AMO Page Fault", + [CAUSE_FETCH_GUEST_PAGE_FAULT] = "Instruction Guest Page Fault", + [CAUSE_LOAD_GUEST_PAGE_FAULT] = "Load Guest Page Fault", + [CAUSE_VIRTUAL_INST_FAULT] = "Virtualized Instruction Fault", + [CAUSE_STORE_GUEST_PAGE_FAULT] = "Guest Store/AMO Page Fault", + }; + + if ( cause < ARRAY_SIZE(trap_causes) && trap_causes[cause] ) + return trap_causes[cause]; + return "UNKNOWN"; +} + +static const char *decode_reserved_interrupt_cause(unsigned long irq_cause) +{ + switch ( irq_cause ) + { + case IRQ_M_SOFT: + return "M-mode Software Interrupt"; + case IRQ_M_TIMER: + return "M-mode TIMER Interrupt"; + case IRQ_M_EXT: + return "M-mode External Interrupt"; + default: + return "UNKNOWN IRQ type"; + } +} + +static const char *decode_interrupt_cause(unsigned long cause) +{ + unsigned long irq_cause = cause & ~CAUSE_IRQ_FLAG; + + switch ( irq_cause ) + { + case IRQ_S_SOFT: + return "Supervisor Software Interrupt"; + case IRQ_S_TIMER: + return "Supervisor Timer Interrupt"; + case IRQ_S_EXT: + return "Supervisor External Interrupt"; + default: + return decode_reserved_interrupt_cause(irq_cause); + } +} + +static const char *decode_cause(unsigned long cause) +{ + if ( cause & CAUSE_IRQ_FLAG ) + return decode_interrupt_cause(cause); + + return decode_trap_cause(cause); +} + +static void do_unexpected_trap(const struct cpu_user_regs *regs) { + unsigned long cause = csr_read(CSR_SCAUSE); + + printk("Unhandled exception: %s\n", decode_cause(cause)); + die(); } + +void do_trap(struct cpu_user_regs *cpu_regs) +{ + do_unexpected_trap(cpu_regs); +} From patchwork Mon May 29 12:13:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13258489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9B2DC77B7A for ; Mon, 29 May 2023 12:13:50 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.540607.842480 (Exim 4.92) (envelope-from ) id 1q3bkg-0005oO-8T; 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void handle_trap(void); +void trap_init(void); #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 845d18d86f..1cae0e5ccc 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -3,6 +3,7 @@ #include #include +#include /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] @@ -25,6 +26,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, void __init noreturn cont_after_mmu_is_enabled(void) { + trap_init(); + early_printk("All set up\n"); for ( ;; ) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index ea1012e83e..48c1059954 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -12,6 +12,31 @@ #include #include +#define cast_to_bug_frame(addr) \ + (const struct bug_frame *)(addr) + +/* + * Initialize the trap handling. + * + * The function is called after MMU is enabled. + */ +void trap_init(void) +{ + /* + * When the MMU is off, addr varialbe will be a physical address otherwise + * it would be a virtual address. + * + * It will work fine as: + * - access to addr is PC-relative. + * - -nopie is used. -nopie really suppresses the compiler emitting + * code going through .got (which then indeed would mean using absolute + * addresses). + */ + unsigned long addr = (unsigned long)&handle_trap; + + csr_write(CSR_STVEC, addr); +} + static const char *decode_trap_cause(unsigned long cause) { static const char *const trap_causes[] = { From patchwork Mon May 29 12:13:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13258483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95139C77B7E for ; Mon, 29 May 2023 12:13:45 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.540608.842498 (Exim 4.92) (envelope-from ) id 1q3bkh-0006L2-Hp; Mon, 29 May 2023 12:13:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 540608.842498; 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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id z14-20020a2e964e000000b002ac87c15fd4sm2427762ljh.95.2023.05.29.05.13.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 May 2023 05:13:26 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 38235dff-fe1a-11ed-8611-37d641c3527e DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685362407; x=1687954407; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IGRAwgV1/X9tXgdqrBZ2V9h6YU+/IZLXtXO6lnBKNgc=; b=BhOu4Ae/aJWmaV/4Fkq+tg/eZ+FemcZMvELH4qD4sK+/f2TTmCvN+iKQoyDYXyn7Z4 2CVo8KZNghTDITtZePCZfONohTwxFzo11Q2I/samt/c/WRbwcAptcFfVSXSam50/Po16 Svt0qtGXhcq9zh0FxML00zdW2vQ5AewvqrQmLNmiud9J5ASW6G619kng2eI1FtP7+qhh fO5nHeGpy5o/q7sXMANx+1jLrLPONUyKTcItWAfItQwDX4z9gsMnlBHLyR1C6lfgyPi8 T+BWqcIFb3RziKoFTyaTn/+C/t9DXdTq5ccyqMIPLtztxGzUBXEkYJdxToCbj7A62L9u XVaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685362407; x=1687954407; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IGRAwgV1/X9tXgdqrBZ2V9h6YU+/IZLXtXO6lnBKNgc=; b=GKHTaygzvNhYjm85Lhoocl2Od8LptQObhkboTrBsmXPjaZ/pa4z/Y/p9dz2fKwPQMw 3HzjSM/WKxgyKHNgXe4DqF703KrTqqd0GdAoazbRNRIgdUTSBNZuXd8ktlN58xafNQNo M7kY+ZaSs+1inkSflMOxmgh7Y4e/s2LLZOjzwmYWo8F688zAss5XtKMf0DqePFZVqX/i v6C/8XSOC76/H5n/TK1MrAiFYq9RU70UUpbTucHUHt2wMDLlTCeIW9pBJzZHxIiwgWSb FCywEzjnwy9Kmnm5wNjO3TXETuhKm5hIzaUlVVbn2Na/1zL6/DsJcTvdOEMnb8fKys7e d0mw== X-Gm-Message-State: AC+VfDwqySRO2SEyl8z630gNRiazV+H/50SF3dxe0LhFFHMPiyhsfI4R OxdqN3JhphU//Bw5fMZvjBMcP/FTqjQ= X-Google-Smtp-Source: ACHHUZ4X24KzltwWEPBY4ezedLUOWadfqfw7Wb+VGCa/0rc3MsIxgXlvFdTfbAFC+17nv9jiuAbTFw== X-Received: by 2002:a05:651c:c2:b0:2a7:7493:9966 with SMTP id 2-20020a05651c00c200b002a774939966mr3195466ljr.24.1685362407086; Mon, 29 May 2023 05:13:27 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Julien Grall , Andrew Cooper , Stefano Stabellini , Oleksii Kurochko , Bob Eshleman , Alistair Francis , Connor Davis Subject: [PATCH v6 5/6] xen/riscv: introduce an implementation of macros from Date: Mon, 29 May 2023 15:13:18 +0300 Message-Id: X-Mailer: git-send-email 2.40.1 In-Reply-To: References: MIME-Version: 1.0 The patch introduces macros: BUG(), WARN(), run_in_exception(), assert_failed. To be precise, the macros from generic bug implementation () will be used. The implementation uses "ebreak" instruction in combination with diffrent bug frame tables (for each type) which contains useful information. Signed-off-by: Oleksii Kurochko --- Changes in V6: - Avoid LINK_TO_LOAD() as bug.h functionality expected to be used after MMU is enabled. - Change early_printk() to printk() --- Changes in V5: - Remove "#include " from as there is no any need in it anymore - Update macros GET_INSN_LENGTH: remove UL and 'unsigned int len;' from it - Remove " include " from risc/setup.c. it is not needed in the current version of the patch - change an argument type from vaddr_t to uint32_t for is_valid_bugaddr and introduce read_instr() to read instruction properly as the length of qinstruction can be either 32 or 16 bits. - Code style fixes - update the comments before do_bug_frame() in riscv/trap.c - Refactor is_valid_bugaddr() function. - introduce macros cast_to_bug_frame(addr) to hide casts. - use LINK_TO_LOAD() for addresses which are linker time relative. --- Changes in V4: - Updates in RISC-V's : * Add explanatory comment about why there is only defined for 32-bits length instructions and 16/32-bits BUG_INSN_{16,32}. * Change 'unsigned long' to 'unsigned int' inside GET_INSN_LENGTH(). * Update declaration of is_valid_bugaddr(): switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. - Updates in RISC-V's traps.c: * replace /xen and /asm includes * update definition of is_valid_bugaddr():switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. Code style inside function was updated too. * do_bug_frame() refactoring: * local variables start and bug became 'const struct bug_frame' * bug_frames[] array became 'static const struct bug_frame[] = ...' * remove all casts * remove unneeded comments and add an explanatory comment that the do_bug_frame() will be switched to a generic one. * do_trap() refactoring: * read 16-bits value instead of 32-bits as compressed instruction can be used and it might happen than only 16-bits may be accessible. * code style updates * re-use instr variable instead of re-reading instruction. - Updates in setup.c: * add blank line between xen/ and asm/ includes. --- Changes in V3: - Rebase the patch "xen/riscv: introduce an implementation of macros from " on top of patch series [introduce generic implementation of macros from bug.h] --- Changes in V2: - Remove __ in define namings - Update run_in_exception_handler() with register void *fn_ asm(__stringify(BUG_FN_REG)) = (fn); - Remove bug_instr_t type and change it's usage to uint32_t --- xen/arch/riscv/include/asm/bug.h | 28 +++++++ xen/arch/riscv/traps.c | 129 +++++++++++++++++++++++++++++++ xen/arch/riscv/xen.lds.S | 10 +++ 3 files changed, 167 insertions(+) diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h index e8b1e40823..bf3194443f 100644 --- a/xen/arch/riscv/include/asm/bug.h +++ b/xen/arch/riscv/include/asm/bug.h @@ -7,4 +7,32 @@ #ifndef _ASM_RISCV_BUG_H #define _ASM_RISCV_BUG_H +#ifndef __ASSEMBLY__ + +#define BUG_INSTR "ebreak" + +/* + * The base instruction set has a fixed length of 32-bit naturally aligned + * instructions. + * + * There are extensions of variable length ( where each instruction can be + * any number of 16-bit parcels in length ) but they aren't used in Xen + * and Linux kernel ( where these definitions were taken from ). + * + * Compressed ISA is used now where the instruction length is 16 bit and + * 'ebreak' instruction, in this case, can be either 16 or 32 bit ( + * depending on if compressed ISA is used or not ) + */ +#define INSN_LENGTH_MASK _UL(0x3) +#define INSN_LENGTH_32 _UL(0x3) + +#define BUG_INSN_32 _UL(0x00100073) /* ebreak */ +#define BUG_INSN_16 _UL(0x9002) /* c.ebreak */ +#define COMPRESSED_INSN_MASK _UL(0xffff) + +#define GET_INSN_LENGTH(insn) \ + (((insn) & INSN_LENGTH_MASK) == INSN_LENGTH_32 ? 4 : 2) \ + +#endif /* !__ASSEMBLY__ */ + #endif /* _ASM_RISCV_BUG_H */ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index 48c1059954..535fb058e1 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -5,6 +5,8 @@ * RISC-V Trap handlers */ +#include +#include #include #include @@ -114,7 +116,134 @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) die(); } +void show_execution_state(const struct cpu_user_regs *regs) +{ + printk("implement show_execution_state(regs)\n"); +} + +/* + * TODO: change early_printk's function to early_printk with format + * when s(n)printf() will be added. + * + * Probably the TODO won't be needed as generic do_bug_frame() + * has been introduced and current implementation will be replaced + * with generic one when panic(), printk() and find_text_region() + * (virtual memory?) will be ready/merged + */ +int do_bug_frame(const struct cpu_user_regs *regs, vaddr_t pc) +{ + const struct bug_frame *start, *end; + const struct bug_frame *bug = NULL; + unsigned int id = 0; + const char *filename, *predicate; + int lineno; + + static const struct bug_frame* bug_frames[] = { + &__start_bug_frames[0], + &__stop_bug_frames_0[0], + &__stop_bug_frames_1[0], + &__stop_bug_frames_2[0], + &__stop_bug_frames_3[0], + }; + + for ( id = 0; id < BUGFRAME_NR; id++ ) + { + start = cast_to_bug_frame(bug_frames[id]); + end = cast_to_bug_frame(bug_frames[id + 1]); + + while ( start != end ) + { + if ( (vaddr_t)bug_loc(start) == pc ) + { + bug = start; + goto found; + } + + start++; + } + } + + found: + if ( bug == NULL ) + return -ENOENT; + + if ( id == BUGFRAME_run_fn ) + { + void (*fn)(const struct cpu_user_regs *) = bug_ptr(bug); + + fn(regs); + + goto end; + } + + /* WARN, BUG or ASSERT: decode the filename pointer and line number. */ + filename = bug_ptr(bug); + lineno = bug_line(bug); + + switch ( id ) + { + case BUGFRAME_warn: + printk("Xen WARN at %s:%d\n", filename, lineno); + + show_execution_state(regs); + + goto end; + + case BUGFRAME_bug: + printk("Xen BUG at %s:%d\n", filename, lineno); + + show_execution_state(regs); + + printk("change wait_for_interrupt to panic() when common is available\n"); + die(); + + case BUGFRAME_assert: + /* ASSERT: decode the predicate string pointer. */ + predicate = bug_msg(bug); + + printk("Assertion %s failed at %s:%d\n", predicate, filename, lineno); + + show_execution_state(regs); + + printk("change wait_for_interrupt to panic() when common is available\n"); + die(); + } + + return -EINVAL; + + end: + return 0; +} + +static bool is_valid_bugaddr(uint32_t insn) +{ + return insn == BUG_INSN_32 || + (insn & COMPRESSED_INSN_MASK) == BUG_INSN_16; +} + +static uint32_t read_instr(unsigned long pc) +{ + uint16_t instr16 = *(uint16_t *)pc; + + if ( GET_INSN_LENGTH(instr16) == 2 ) + return (uint32_t)instr16; + else + return *(uint32_t *)pc; +} + void do_trap(struct cpu_user_regs *cpu_regs) { + register_t pc = cpu_regs->sepc; + uint32_t instr = read_instr(pc); + + if ( is_valid_bugaddr(instr) ) + { + if ( !do_bug_frame(cpu_regs, pc) ) + { + cpu_regs->sepc += GET_INSN_LENGTH(instr); + return; + } + } + do_unexpected_trap(cpu_regs); } diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index df71d31e17..0412493911 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -40,6 +40,16 @@ SECTIONS . = ALIGN(PAGE_SIZE); .rodata : { _srodata = .; /* Read-only data */ + /* Bug frames table */ + __start_bug_frames = .; + *(.bug_frames.0) + __stop_bug_frames_0 = .; + *(.bug_frames.1) + __stop_bug_frames_1 = .; + *(.bug_frames.2) + __stop_bug_frames_2 = .; + *(.bug_frames.3) + __stop_bug_frames_3 = .; *(.rodata) *(.rodata.*) *(.data.rel.ro) From patchwork Mon May 29 12:13:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksii Kurochko X-Patchwork-Id: 13258486 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B73FC7EE2F for ; Mon, 29 May 2023 12:13:49 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.540609.842510 (Exim 4.92) (envelope-from ) id 1q3bki-0006iB-S0; Mon, 29 May 2023 12:13:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 540609.842510; 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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id z14-20020a2e964e000000b002ac87c15fd4sm2427762ljh.95.2023.05.29.05.13.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 May 2023 05:13:27 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 388e07b9-fe1a-11ed-8611-37d641c3527e DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685362408; x=1687954408; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0YD5229mDIwkWy00dCe850+V9AEq/Mk9/bgvE344cjU=; b=TpzCdOknut6VDyJFWFVTwZjazt6GcrLBoZXZ77wvjfK4aVJ5kE1OhaT/+bJRKu25lt bdw4Nb3uqgPY83iObryh3p/gGP4Os9mAGLnnl5ervnCbr6/qJRUG1t/N4yc8itMRwU4Q Lj7wRdGPYIG1TBcvsjxpiZz1Z5WZ/SLmVfiiBtgEls4/1P3+aMC3fTp9bRw28egIj0Jz 9V5iEcUY8G1zFevbcjIOqg98oPWPndMJwFpb0wNe+Mchw1ozKddBN4xW+3T25DkjaWkT s7C3vlqEE3n5b9YpR85vs4yrfFLXk39ReBBckDHC51g05h3khQjs6sB1mrr9BFhte+Ut PIgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685362408; x=1687954408; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0YD5229mDIwkWy00dCe850+V9AEq/Mk9/bgvE344cjU=; b=dm7sjlYwyF25vm7D/+SlDze8+NkcSGpZNNwZXxlWnx5USuA7gaDfS9dCrxHzArw4CJ 3qlbz4rCNoPbibzaRRyOswgnzr9VomVzj1Ft/qAB6cnBO25nUNzq4NEmLSnd1RALu8aW gBvmSMLPb5xYqRo2Kpfu4r1+vLppb62WB51W/ZWRGWfyeGYxW4gOP3RWHgQDcU/+2o9k kiyB60B7Aq7cf/bHjN6l+0wzzkOQ9b6qJtQUKdBbAO2CUxB2QLi19RsrMkh0lgkVinor 2qQJsRA8DCtD+CGSRmHvNVpTjn2C88sda37bHFCiHZ8q+b3zu7Yg2HAsjHlbj7aVQbd6 h3Kg== X-Gm-Message-State: AC+VfDyocQaQ8DLuFWSIusjSK0PjD6XUQ8pyZllhC0lfTAlvx9bYkua7 hYOL/S40GvPbBeqlF3/q1jqqT2KdIhE= X-Google-Smtp-Source: ACHHUZ7qWlQ0izumLBrxWGN4a1dMw2W/W9ZTX1VBQsZPtZd6SyEXM+BC9wFxToGEYSGFFfxny5MvVA== X-Received: by 2002:a2e:2416:0:b0:2a8:ad36:f8ca with SMTP id k22-20020a2e2416000000b002a8ad36f8camr4249022ljk.14.1685362408351; Mon, 29 May 2023 05:13:28 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Julien Grall , Andrew Cooper , Stefano Stabellini , Oleksii Kurochko , Bob Eshleman , Alistair Francis , Connor Davis Subject: [PATCH v6 6/6] xen/riscv: test basic handling stuff Date: Mon, 29 May 2023 15:13:19 +0300 Message-Id: <90e4f333ded1a18e5c0e0b389580ed5d25e0272a.1685359848.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: MIME-Version: 1.0 Signed-off-by: Oleksii Kurochko Acked-by: Alistair Francis --- Changes in V6: - Nothing changed --- Changes in V5: - Nothing changed --- Changes in V4: - Add Acked-by: Alistair Francis --- Changes in V3: - Nothing changed --- Changes in V2: - Nothing changed --- xen/arch/riscv/setup.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 1cae0e5ccc..481d88249d 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -1,3 +1,4 @@ +#include #include #include @@ -9,6 +10,20 @@ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); +static void test_run_in_exception(struct cpu_user_regs *regs) +{ + early_printk("If you see this message, "); + early_printk("run_in_exception_handler is most likely working\n"); +} + +static void test_macros_from_bug_h(void) +{ + run_in_exception_handler(test_run_in_exception); + WARN(); + early_printk("If you see this message, "); + early_printk("WARN is most likely working\n"); +} + void __init noreturn start_xen(unsigned long bootcpu_id, paddr_t dtb_addr) { @@ -28,6 +43,8 @@ void __init noreturn cont_after_mmu_is_enabled(void) { trap_init(); + test_macros_from_bug_h(); + early_printk("All set up\n"); for ( ;; )