From patchwork Tue May 30 16:31:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 13260722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC5DCC7EE2F for ; Tue, 30 May 2023 16:33:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232318AbjE3QdT (ORCPT ); Tue, 30 May 2023 12:33:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231334AbjE3QdQ (ORCPT ); Tue, 30 May 2023 12:33:16 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDA3DE8; Tue, 30 May 2023 09:32:42 -0700 (PDT) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34U6q4JT016736; Tue, 30 May 2023 16:32:14 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=/qk5Arae9koJJXy7bIAt35842+Qzx3zoMV+zQQQw4kI=; b=biqO9jFu3IfHcK/a0qeymb82oqcTsACrYzBnkkxdwodgEUh7oF2b4LxVpbwye6NniZ+O BEeZbUv+4EDx0TogbKx8WTuuMC+ftoFgXtMHr45lMB0K+ELiBzAILLTFfAWoLNwPvj1E OsN7VT3tIW31/HuheWCYnyfjZSg5h+12Ew9rWYEQs6TNO4SpIcX/qSwzE6nCdXsygaX8 L4DWx2iY2/vUMvx5gKADyAWuWtPmEYop4BlieZRoCOOhv+oNLRs1AmOx0nsNIRttHtF3 HSn7bTYsnd3IdIaJRfafnGAFuDHppOejgCT1aaNTqiqkc7NVoLKmPU9m8v1jNdYhDgdX HQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qvws8jfb1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 May 2023 16:32:13 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34UGWCN4014040 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 May 2023 16:32:12 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 30 May 2023 09:32:12 -0700 From: Kuogee Hsieh To: , , , , , , , , , , CC: Kuogee Hsieh , , , , , , , Subject: [PATCH v1 1/3] drm/msm/dsi: add msm_dsi_bridge_get_dsc_config() Date: Tue, 30 May 2023 09:31:56 -0700 Message-ID: <1685464318-25031-2-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1685464318-25031-1-git-send-email-quic_khsieh@quicinc.com> References: <1685464318-25031-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 03NlmzQi_F5c-MFnH4rhhFonno-nYrip X-Proofpoint-GUID: 03NlmzQi_F5c-MFnH4rhhFonno-nYrip X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-30_12,2023-05-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 suspectscore=0 mlxscore=0 adultscore=0 impostorscore=0 phishscore=0 bulkscore=0 spamscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305300131 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org DSI is implemented as a DRM bridge. It is more logically to access DSI from outside world through DRM bridge structure. Add DSI bridge function msm_dsi_bridge_get_dsc_config() to retrieve DSC information. Signed-off-by: Kuogee Hsieh --- drivers/gpu/drm/msm/dsi/dsi.c | 8 ++++++++ drivers/gpu/drm/msm/dsi/dsi.h | 2 ++ drivers/gpu/drm/msm/dsi/dsi_manager.c | 4 ++-- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index baab79a..fa7fcb5 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -17,6 +17,14 @@ struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) return msm_dsi_host_get_dsc_config(msm_dsi->host); } +struct drm_dsc_config *msm_dsi_bridge_get_dsc_config(struct drm_bridge *bridge) +{ + int id = dsi_mgr_bridge_get_id(bridge); + struct msm_dsi *msm_dsi = dsi_mgr_get_dsi(id); + + return msm_dsi_host_get_dsc_config(msm_dsi->host); +} + static int dsi_get_phy(struct msm_dsi *msm_dsi) { struct platform_device *pdev = msm_dsi->pdev; diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index bd3763a..394f605 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h @@ -64,6 +64,8 @@ bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len); int msm_dsi_manager_register(struct msm_dsi *msm_dsi); void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi); void msm_dsi_manager_tpg_enable(void); +int dsi_mgr_bridge_get_id(struct drm_bridge *bridge); +struct msm_dsi *dsi_mgr_get_dsi(int id); /* msm dsi */ static inline bool msm_dsi_device_connected(struct msm_dsi *msm_dsi) diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c index 1bbac72..5a7ac338 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c @@ -60,7 +60,7 @@ static inline bool dsi_mgr_power_on_early(struct drm_bridge *bridge) } #endif -static inline struct msm_dsi *dsi_mgr_get_dsi(int id) +struct msm_dsi *dsi_mgr_get_dsi(int id) { return msm_dsim_glb.dsi[id]; } @@ -218,7 +218,7 @@ struct dsi_bridge { #define to_dsi_bridge(x) container_of(x, struct dsi_bridge, base) -static int dsi_mgr_bridge_get_id(struct drm_bridge *bridge) +int dsi_mgr_bridge_get_id(struct drm_bridge *bridge) { struct dsi_bridge *dsi_bridge = to_dsi_bridge(bridge); return dsi_bridge->id; From patchwork Tue May 30 16:31:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 13260720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5E27C77B7A for ; Tue, 30 May 2023 16:33:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231769AbjE3QdR (ORCPT ); Tue, 30 May 2023 12:33:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231401AbjE3QdQ (ORCPT ); Tue, 30 May 2023 12:33:16 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D71E5E40; Tue, 30 May 2023 09:32:42 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34UGLupo016810; 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Tue, 30 May 2023 16:32:14 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 30 May 2023 09:32:13 -0700 From: Kuogee Hsieh To: , , , , , , , , , , CC: Kuogee Hsieh , , , , , , , Subject: [PATCH v1 2/3] drm/msm/dpu: retrieve DSI DSC struct at atomic_check() Date: Tue, 30 May 2023 09:31:57 -0700 Message-ID: <1685464318-25031-3-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1685464318-25031-1-git-send-email-quic_khsieh@quicinc.com> References: <1685464318-25031-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: RFhVdye5XFkoNYXPmiP0vGZ4VFAkYpm- X-Proofpoint-ORIG-GUID: RFhVdye5XFkoNYXPmiP0vGZ4VFAkYpm- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-30_12,2023-05-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 phishscore=0 spamscore=0 impostorscore=0 mlxlogscore=928 suspectscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305300131 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org At current implementation, DSI DSC struct is populated at display setup during system bootup. This mechanism works fine with embedded display. But will run into problem with plugin/unplug oriented external display, such as DP, due to DSC struct will become stale once external display unplugged. New DSC struct has to be re populated to reflect newer external display which just plugged in. Move retrieving of DSI DSC struct to atomic_check() so that same mechanism will work for both embedded display and external plugin/unplug oriented display. Signed-off-by: Kuogee Hsieh --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 15 ++++++++++++++- drivers/gpu/drm/msm/msm_drv.h | 6 ++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 3b416e1..2927d20 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include "msm_drv.h" #include "dpu_kms.h" @@ -639,6 +641,15 @@ static int dpu_encoder_virt_atomic_check( } } + if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) { + struct drm_bridge *bridge; + + if (!dpu_enc->dsc) { + bridge = drm_bridge_chain_get_first_bridge(drm_enc); + dpu_enc->dsc = msm_dsi_bridge_get_dsc_config(bridge); + } + } + topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode, crtc_state); /* @@ -2121,8 +2132,10 @@ void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc) phys_enc->hw_pp->merge_3d->idx); } - if (dpu_enc->dsc) + if (dpu_enc->dsc) { dpu_encoder_unprep_dsc(dpu_enc); + dpu_enc->dsc = NULL; + } intf_cfg.stream_sel = 0; /* Don't care value for video mode */ intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index e13a8cb..5a7c1f4 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -341,6 +341,7 @@ bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi); bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi); bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi); struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi); +struct drm_dsc_config *msm_dsi_bridge_get_dsc_config(struct drm_bridge *bridge); #else static inline void __init msm_dsi_register(void) { @@ -374,6 +375,11 @@ static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_ { return NULL; } + +struct drm_dsc_config *msm_dsi_bridge_get_dsc_config(struct drm_bridge *bridge) +{ + return NULL; +} #endif #ifdef CONFIG_DRM_MSM_DP From patchwork Tue May 30 16:31:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 13260721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35AB0C7EE23 for ; Tue, 30 May 2023 16:33:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232471AbjE3QdV (ORCPT ); Tue, 30 May 2023 12:33:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231686AbjE3QdR (ORCPT ); Tue, 30 May 2023 12:33:17 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17DA2E41; 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Tue, 30 May 2023 16:32:16 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34UGWG8S023282 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 30 May 2023 16:32:16 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 30 May 2023 09:32:15 -0700 From: Kuogee Hsieh To: , , , , , , , , , , CC: Kuogee Hsieh , , , , , , , Subject: [PATCH v1 3/3] drm/msm/dpu: remove msm_dsi_get_dsc_config() Date: Tue, 30 May 2023 09:31:58 -0700 Message-ID: <1685464318-25031-4-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1685464318-25031-1-git-send-email-quic_khsieh@quicinc.com> References: <1685464318-25031-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: dyZeYl_Mtzd325OXZsUsCgU9PRF_cC1S X-Proofpoint-GUID: dyZeYl_Mtzd325OXZsUsCgU9PRF_cC1S X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-30_12,2023-05-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305300131 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since msm_dsi_bridge_get_dsc_config() was added to retrieve DSI DSC info through DRM bridge, msm_dsi_get_dsc_config() become redundant and should be removed. Signed-off-by: Kuogee Hsieh Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 -- drivers/gpu/drm/msm/dsi/dsi.c | 5 ----- drivers/gpu/drm/msm/msm_drv.h | 6 ------ 5 files changed, 17 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 2927d20..1974d61 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2335,8 +2335,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, dpu_enc->idle_pc_supported = dpu_kms->catalog->caps->has_idle_pc; - dpu_enc->dsc = disp_info->dsc; - mutex_lock(&dpu_enc->enc_lock); for (i = 0; i < disp_info->num_of_h_tiles && !ret; i++) { /* diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index 2c9ef8d..03a9ca0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -28,7 +28,6 @@ * @is_cmd_mode Boolean to indicate if the CMD mode is requested * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is * used instead of panel TE in cmd mode panels - * @dsc: DSC configuration data for DSC-enabled displays */ struct msm_display_info { int intf_type; @@ -36,7 +35,6 @@ struct msm_display_info { uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; bool is_cmd_mode; bool is_te_using_watchdog_timer; - struct drm_dsc_config *dsc; }; /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index c24f487..2390e5c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -554,8 +554,6 @@ static int _dpu_kms_initialize_dsi(struct drm_device *dev, info.h_tile_instance[info.num_of_h_tiles++] = i; info.is_cmd_mode = msm_dsi_is_cmd_mode(priv->dsi[i]); - info.dsc = msm_dsi_get_dsc_config(priv->dsi[i]); - if (msm_dsi_is_bonded_dsi(priv->dsi[i]) && priv->dsi[other]) { rc = msm_dsi_modeset_init(priv->dsi[other], dev, encoder); if (rc) { diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index fa7fcb5..154f19e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -12,11 +12,6 @@ bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi) return !(host_flags & MIPI_DSI_MODE_VIDEO); } -struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) -{ - return msm_dsi_host_get_dsc_config(msm_dsi->host); -} - struct drm_dsc_config *msm_dsi_bridge_get_dsc_config(struct drm_bridge *bridge) { int id = dsi_mgr_bridge_get_id(bridge); diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 5a7c1f4..8792e98 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -340,7 +340,6 @@ void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi); bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi); bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi); -struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi); struct drm_dsc_config *msm_dsi_bridge_get_dsc_config(struct drm_bridge *bridge); #else static inline void __init msm_dsi_register(void) @@ -371,11 +370,6 @@ static inline bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi) return false; } -static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) -{ - return NULL; -} - struct drm_dsc_config *msm_dsi_bridge_get_dsc_config(struct drm_bridge *bridge) { return NULL;