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Mon, 19 Jun 2023 17:36:04 +0000 Received: from TYZPR01MB5556.apcprd01.prod.exchangelabs.com ([fe80::5b31:f8db:585d:f204]) by TYZPR01MB5556.apcprd01.prod.exchangelabs.com ([fe80::5b31:f8db:585d:f204%4]) with mapi id 15.20.6477.037; Mon, 19 Jun 2023 17:36:04 +0000 From: Ziyang Huang To: ulf.hansson@linaro.org Cc: neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Ziyang Huang Subject: [PATCH] mmc: meson-mx-sdhc: Fix initialization frozen issue Date: Tue, 20 Jun 2023 01:34:59 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 X-TMN: [Ha8s9ocL9A7hZ/kMk7SASICLp16GahifJ9ESr1XIBxsWh7/mnmausw==] X-ClientProxiedBy: TYCP286CA0138.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:31b::13) To TYZPR01MB5556.apcprd01.prod.exchangelabs.com (2603:1096:400:363::9) X-Microsoft-Original-Message-ID: <20230619173459.3519226-1-hzyitc@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TYZPR01MB5556:EE_|PSBPR01MB3736:EE_ X-MS-Office365-Filtering-Correlation-Id: ef1a064f-37b8-46c2-eeec-08db70eba811 X-MS-Exchange-SLBlob-MailProps: fNPDeqDZc0K6hVw23M7B2oWHpv2m4/wpDpVXMaMmZuPS0Tbxd+cNPQjtZulelqVySuZTgwbmAoOlMTNDn/dCX/w+wreOnRbqYF+hUF2RUoQE8ieT34bQSDJl3EsLutjD+PR7wLixaiWLv1wzh99Jt1hi3hdJjoBr2FFmFHj45ymZtCYF2Z40X3QNolBZXJtxdl6EacAFEYFD8emhPm+vVBOfLOPMw3goIwPeHz+CGsi6tFeQI+iJanoZOrLUk2HXVjPSVM75jtvTLXtw6iKaEuyFbSqs9pOg8l+Z/YGq6nQUcIzCZy3c2lbbKYZk9A3rWtvCGMm/HP2RiT1VMW4VW+x306SEY3XLVaU5U1qLrNhrnXrLnz8PhqTMaSBsc2FscLd+3u0JyldJyghEl58VitgXUr7UiR9lycOq1J+uyPGpkKKtn9KlaTIUVZdOqkMAHuOZEQYJ5itX5e0Zgm6dLgqwi1gYzqPp5SMTRRrzI+hBPB7BvFwPjZnGGvJo0Y/rZw8Ady7/rNNNdfgQjUXtgTIfpgh5Xzy9vCukx3SHAC8c/CG0N9DunSCaphdBA5RwymV7/wCxYh0Sr9w1Ansn6mZGrYs0T3M5knjvZTaSwdKnlRPpNq+63u5a/8bCd9a4chkiwJgsRtq9I3SrPUDi3XaJcPSNF0oX2pTlr/ke4tS2tJscvbmnn2yx6MYF52l6cZoYGpqKwGIoc3IkBSYNeZ2r+qt1CAmtuxxYMn6S+Vboe29/88bxxAO+cnQcKlGCIM5rUaCOHtMR0Ruuyg6j5A== X-Microsoft-Antispam: BCL:0; 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For this freq, FCLK_DIV5 will be selected and div value is 10 (reg value is 9). Then we set rx_clk_phase to 11 or 15 which is out of range and make hardware frozen. After we send command request, no irq will be interrupted and the mmc driver will keep to wait for request finished, even durning rebooting. So let's set a common value - 1 just for initialization. Then let meson_mx_sdhc_execute_tuning() to find the accurate value for data transfer. Fixes: e4bf1b0970ef ("mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host") Signed-off-by: Ziyang Huang --- drivers/mmc/host/meson-mx-sdhc-mmc.c | 26 +++----------------------- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git a/drivers/mmc/host/meson-mx-sdhc-mmc.c b/drivers/mmc/host/meson-mx-sdhc-mmc.c index da85c2f2..a01090a2 100644 --- a/drivers/mmc/host/meson-mx-sdhc-mmc.c +++ b/drivers/mmc/host/meson-mx-sdhc-mmc.c @@ -269,7 +269,6 @@ static int meson_mx_sdhc_enable_clks(struct mmc_host *mmc) static int meson_mx_sdhc_set_clk(struct mmc_host *mmc, struct mmc_ios *ios) { struct meson_mx_sdhc_host *host = mmc_priv(mmc); - u32 rx_clk_phase; int ret; meson_mx_sdhc_disable_clks(mmc); @@ -290,31 +289,12 @@ static int meson_mx_sdhc_set_clk(struct mmc_host *mmc, struct mmc_ios *ios) mmc->actual_clock = clk_get_rate(host->sd_clk); /* - * according to Amlogic the following latching points are - * selected with empirical values, there is no (known) formula - * to calculate these. + * This value is just for initialization. For data transmission, + * meson_mx_sdhc_execute_tuning() will find a accurate value */ - if (mmc->actual_clock > 100000000) { - rx_clk_phase = 1; - } else if (mmc->actual_clock > 45000000) { - if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) - rx_clk_phase = 15; - else - rx_clk_phase = 11; - } else if (mmc->actual_clock >= 25000000) { - rx_clk_phase = 15; - } else if (mmc->actual_clock > 5000000) { - rx_clk_phase = 23; - } else if (mmc->actual_clock > 1000000) { - rx_clk_phase = 55; - } else { - rx_clk_phase = 1061; - } - regmap_update_bits(host->regmap, MESON_SDHC_CLK2, MESON_SDHC_CLK2_RX_CLK_PHASE, - FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE, - rx_clk_phase)); + FIELD_PREP(MESON_SDHC_CLK2_RX_CLK_PHASE, 1)); } else { mmc->actual_clock = 0; }