From patchwork Tue Jun 20 00:03:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13285030 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6F95CEB64D9 for ; Tue, 20 Jun 2023 00:04:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8GeQwJ8E2QDREdjIpV8g0xsRvc8fjknVnnPB8nN7zho=; b=XAUo9EJBvXtzu7 409QwWU9gqf7xrFm2IPP4NRLPdgxCAE49FxEvsIO7uUetEjEcCz14yrY5Ny3LBR1CMSttRerJUVgg F+4m9+ewwV238Tt8+h3VSlASLquf+U6r7zuHRjOjdVWOmuK+ctRqZ82I7MLsRNvfiRICeWMpCztPK ZYa7KYwAsntCTeBWlW73NPfunDS+jRYhzocnQnr1wAmhtPoT+7RtjaIHYToI16fHaOV4GZ2uljb1x 54pHI+sJcBFTL3gG3dS847X+fdO4HpRg1SILrAGOE7ooeXBc9sRvPsFhqQvDbPRdBGC2tdZdhYVEs olmHRNhnnNEAzUGTE77w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qBOr1-009iaz-1i; Tue, 20 Jun 2023 00:04:15 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qBOqs-009iV8-2z; Tue, 20 Jun 2023 00:04:08 +0000 Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2244F6606EEE; Tue, 20 Jun 2023 01:04:00 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219443; bh=oL8x3kiYbUoDvILJoZNWHsiSmB2xU/ZPVSowy65Dw1M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DR4KIai6nxkCtFZdtfTS0T0oJtmBxcn3RP+Fo4c1yzE1wUsTkyQgGB7BDp70I68U6 /iqfAQ73WscOSP7pdMCgndkqo90cQk8ejwvF5/TPZ87uBzItx0jeAA3i7XtpB3Y98z ZUjcv9FMHhQTwx+JyCZ47ZIrIfjTn/gEqYvvOhE/4BRLgHBmEi2MT2sVsORPJ7K3GY t7X2fR+WlNqqz9spEAV8hH5Gra9vgbSQYXGqVdNi45U9sE8+bprKagvR9g7+W1vb1l dGF4ryn3LJO9uBal4+7EerhTdec1MgxKRKYOPqBv0z3hgvTKY95OrZdqU/I94q6a5f ljt7n0s0Jfhpg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 1/6] media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183 Date: Mon, 19 Jun 2023 20:03:34 -0400 Message-ID: <20230620000349.2122191-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230619_170407_095666_3F30208E X-CRM114-Status: GOOD ( 10.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MT8173 and MT8183 have different clocks, and consequently clock-names. Relax the number of clocks and set clock-names based on compatible. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: Krzysztof Kozlowski --- Changes in v3: - Reintroduced this commit from v1 since the active clock is no longer used. - Further constrained clocks as suggested in v1. .../media/mediatek,vcodec-decoder.yaml | 37 ++++++++++++++----- 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index fad59b486d5d..1506d2693f7d 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -27,18 +27,12 @@ properties: maxItems: 1 clocks: + minItems: 1 maxItems: 8 clock-names: - items: - - const: vcodecpll - - const: univpll_d2 - - const: clk_cci400_sel - - const: vdec_sel - - const: vdecpll - - const: vencpll - - const: venc_lt_sel - - const: vdec_bus_clk_src + minItems: 1 + maxItems: 8 assigned-clocks: true @@ -88,6 +82,15 @@ allOf: required: - mediatek,scp + properties: + clocks: + minItems: 1 + maxItems: 1 + + clock-names: + items: + - const: vdec + - if: properties: compatible: @@ -99,6 +102,22 @@ allOf: required: - mediatek,vpu + properties: + clocks: + minItems: 8 + maxItems: 8 + + clock-names: + items: + - const: vcodecpll + - const: univpll_d2 + - const: clk_cci400_sel + - const: vdec_sel + - const: vdecpll + - const: vencpll + - const: venc_lt_sel + - const: vdec_bus_clk_src + additionalProperties: false examples: From patchwork Tue Jun 20 00:03:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13285031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DC3CEB64DB for ; Tue, 20 Jun 2023 00:04:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Tue, 20 Jun 2023 01:04:03 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219446; bh=9a46aNnESj501/E03oYlm9sAjEXaazXllJOV13stIS8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NOzUtIjFSr2clm3a6T2fzUKteoU+kcoP8OHu2+TsI5DEmtENrpe47KpB4ST2XlTxl gYRKarP7wiyatbDwaUrJ/a5wAlZdBwOETlaxwCWNZ7GFqC0bam9Z35QzSIx3sThSIa 57Pu5JP/JYQ2r+C/ip82AyPj4CH1XL+dNR4Y4u1ulkEwcLbx4SiCipehQpUOzev3Dv myhMTJcFCBZYPTLpkT5RnHFTALqDEkws3p6BfEPIPMLH2VkZaMdtortpaF040ZByu4 SSWbxojrlVU8Vhiw/x+hDgy/DBguU9wBaGs37ERXh6aMLMazs6yR9sY8FRNlO6V9YF PBB4SUHth9svg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 2/6] media: dt-bindings: mediatek,vcodec: Don't require assigned-clocks Date: Mon, 19 Jun 2023 20:03:35 -0400 Message-ID: <20230620000349.2122191-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230619_170408_124315_6D1800DE X-CRM114-Status: UNSURE ( 9.38 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On MT8183 it's not necessary to configure the parent for the clocks. Remove the assigned-clocks and assigned-clock-parents from the required list. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- (no changes since v1) .../devicetree/bindings/media/mediatek,vcodec-decoder.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 1506d2693f7d..1e56ece44aee 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -67,8 +67,6 @@ required: - clocks - clock-names - iommus - - assigned-clocks - - assigned-clock-parents allOf: - if: From patchwork Tue Jun 20 00:03:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13285032 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76472EB64D9 for ; Tue, 20 Jun 2023 00:04:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9kjKlnQTyWBThwSEXCYRENNHe9M3hEmDwN2069InHxM=; b=bbDvdcL+v2mphE XlOu1pqgFp13fBdal+4HeOfIlp8lRhSUbW3XIjxDx7ukMqU9C0tOOq1RbNYV0MxH9jeIq9CVKxYyo QeG9H6aZJ5Uf8+AyVF66pANJ1h51U3RaqWZhDVjeLWzT9xpH7ncq2HRskgk9cDH444Vm1n6kv4CA4 6kYmLR9lY6b7DBgjXJiot/CD3FGDbBXujkYM0IfJC9QIJ1/LYEMoxvOSxFnZRoK7tXQo07ipp6/Ra mNOaLzSaHIuQ2YdCnxFQjrdiffA4jUGDpJpOgzTgcUrsvoptWkg33ZI/9z1xTQiWLjt/Oj1K/iGUn mBGYPxcYNu58Cp1viBcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qBOrF-009ija-13; Tue, 20 Jun 2023 00:04:29 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qBOqw-009iXy-2p; Tue, 20 Jun 2023 00:04:12 +0000 Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1483E6605992; Tue, 20 Jun 2023 01:04:06 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219449; bh=huc4PCyi2wohDcBEAt/Zmelm5/+bM8JEir6rTSmhk94=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hrb8e9Zq/JK4DTXUleA0EF6LIMnSoHA16pBv694k0kb4kALUEU3Z8GY/eD3e9KIKX C1BTIl3SJ0O8YHwE3KCZkRdL0vjRLrTTKxC46qntc4s0uZL9oyJdfYDOq1l5/6l1gu UZhHJaBtkdogV/6rLphp4LQEBcQmpo7jsv8mRjE7+FuKg98+lH/vf0P2SA/bWzci7+ rolgPLlxl/75fyAnjUiRVJMF0zt5h4XbHqI6TdspyrLfnYtbgb9Z4Kjcdmej48akcN GdDDZNe/mQlQTWT0uU7AjH7a2dhMmetuLnGJ1S8lHefS8P9+wDVe4FRphJw9zfV7Lk SjsM+CwEssQtw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 3/6] media: dt-bindings: mediatek,vcodec: Remove VDEC_SYS for mt8183 Date: Mon, 19 Jun 2023 20:03:36 -0400 Message-ID: <20230620000349.2122191-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230619_170411_052065_E081A76C X-CRM114-Status: GOOD ( 14.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The binding expects the first register space to be VDEC_SYS. But on mt8183, which uses the stateless decoders, this space is used only for controlling clocks and resets, which are better described as separate clock-controller and reset-controller nodes. In fact, in mt8173's devicetree there are already such separate clock-controller nodes, which cause duplicate addresses between the vdecsys node and the vcodec node. But for this SoC, since the stateful decoder code makes other uses of the VDEC_SYS register space, it's not straightforward to remove it. In order to avoid the same address conflict to happen on mt8183, since the only current use of the VDEC_SYS register space in the driver is to read the status of a hardware controlled clock, remove the VDEC_SYS register space from the binding and describe an extra syscon that will be used to directly check the hardware status. Also add reg-names to be able to tell that this new register schema is used, so the driver can keep backward compatibility. Signed-off-by: Nícolas F. R. A. Prado --- I dropped the tags from this commit since a syscon is now used instead of an extra clock. Changes in v3: - Removed the active clock - Added a mediatek,vdecsys syscon property Changes in v2: - Merged with patch 1 (media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183) to avoid changing number of clocks twice - Added maxItems to reg-names - Constrained clocks for each compatible - Reordered properties for each compatible .../media/mediatek,vcodec-decoder.yaml | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 1e56ece44aee..2f625c50bbfe 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -21,8 +21,13 @@ properties: - mediatek,mt8183-vcodec-dec reg: + minItems: 11 maxItems: 12 + reg-names: + minItems: 11 + maxItems: 11 + interrupts: maxItems: 1 @@ -60,6 +65,10 @@ properties: description: Describes point to scp. + mediatek,vdecsys: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the vdecsys syscon node. + required: - compatible - reg @@ -79,8 +88,26 @@ allOf: then: required: - mediatek,scp + - mediatek,vdecsys properties: + reg: + maxItems: 11 + + reg-names: + items: + - const: misc + - const: ld + - const: top + - const: cm + - const: ad + - const: av + - const: pp + - const: hwd + - const: hwq + - const: hwb + - const: hwg + clocks: minItems: 1 maxItems: 1 @@ -101,6 +128,9 @@ allOf: - mediatek,vpu properties: + reg: + minItems: 12 + clocks: minItems: 8 maxItems: 8 From patchwork Tue Jun 20 00:03:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13285033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46CCBEB64D9 for ; Tue, 20 Jun 2023 00:04:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Tue, 20 Jun 2023 01:04:10 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219452; bh=iwwomfdUx93+Ln71BQuSZg3ngJLCV9nENl+PCMxyK+U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dWqhE043lwgeCxQPR2b6NxTnFJEb0rjyqeA9h79yXl4A5NMDvlDSWYspWv637bwh+ ZeLV8haL/wyLrM6otgQWFHpLD/pKhMcBQsCG/d6uXIo7c+trovWR2ZamHQdpy6tRPl Rn328a/8kc6AZX1JnO3VIAAPl+cm6urqtOApjl8TOFsUHM5DMjREzKS3apuvri78vV 0enWRX7WUDHlgh0inm86JfudOH/qOXjYJUep9dKUME81NU8dbXiGMNFTpMm1PLxQtD WCe1JVM+M1zc0xBDNuSvg38kK/GOAuUQ/qUln+XUqH9OHrceOQwiOuydvl+C+M/aNe 3rSKAzv5uCnSg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Mauro Carvalho Chehab , Tiffany Lin , Yunfei Dong , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 4/6] media: mediatek: vcodec: Define address for VDEC_HW_ACTIVE Date: Mon, 19 Jun 2023 20:03:37 -0400 Message-ID: <20230620000349.2122191-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230619_170413_509205_CF8ECCA5 X-CRM114-Status: GOOD ( 12.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The VDEC_HW_ACTIVE bit is located at offset 0, bit 4 of the VDECSYS iospace. Only the mask was previously defined, with the address being implicit. Explicitly define the address, and append a '_MASK' suffix to the mask, to make accesses to this bit clearer. This commit brings no functional change. Signed-off-by: Nícolas F. R. A. Prado --- Changes in v3: - Added this commit drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c | 4 ++-- drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c | 4 ++-- drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h | 3 ++- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index d41f2121b94f..83780d29a9cf 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -50,8 +50,8 @@ static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE); /* check if HW active or not */ - cg_status = readl(dev->reg_base[0]); - if ((cg_status & VDEC_HW_ACTIVE) != 0) { + cg_status = readl(dev->reg_base[0] + VDEC_HW_ACTIVE_ADDR); + if ((cg_status & VDEC_HW_ACTIVE_MASK) != 0) { mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)", cg_status); return IRQ_HANDLED; diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c index e1cb2f8dca33..41aa66c7295b 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c @@ -75,8 +75,8 @@ static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv) ctx = mtk_vcodec_get_curr_ctx(dev->main_dev, dev->hw_idx); /* check if HW active or not */ - cg_status = readl(dev->reg_base[VDEC_HW_SYS]); - if (cg_status & VDEC_HW_ACTIVE) { + cg_status = readl(dev->reg_base[VDEC_HW_SYS] + VDEC_HW_ACTIVE_ADDR); + if (cg_status & VDEC_HW_ACTIVE_MASK) { mtk_v4l2_err("vdec active is not 0x0 (0x%08x)", cg_status); return IRQ_HANDLED; diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h index 36faa8d9d681..caa2d0a48a90 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h @@ -12,7 +12,8 @@ #include "mtk_vcodec_drv.h" -#define VDEC_HW_ACTIVE 0x10 +#define VDEC_HW_ACTIVE_ADDR 0x0 +#define VDEC_HW_ACTIVE_MASK 0x10 #define VDEC_IRQ_CFG 0x11 #define VDEC_IRQ_CLR 0x10 #define VDEC_IRQ_CFG_REG 0xa4 From patchwork Tue Jun 20 00:03:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13285034 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5D0AEB64D9 for ; Tue, 20 Jun 2023 00:05:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Tue, 20 Jun 2023 01:04:12 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219454; bh=7Uy90B8rQDsK2NiHlzH+mhXRwuLVWP2mVHok4MwIH/w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LHdUfoMMqWk9/DC5bGcZvuhel3P/C3YGLKPdSlnIVRi4TAspQfwfQaIXh2QKXPucH RkPn1EGwmauio7lAWuk9N16Uww+iw6GUM/2RcGRtAawWGEJXdw5wLUjT2TiZiMmkVZ de2mdmlwEJMHDMBi961heyztujhdXtaR0F92I9JRuCM5Y1uyqmvaRmb/RSMuTwTsUi 3nHk5i4fLLLeEZ4QIy1uUVJ/pbe2O2KnMB0rWbGxtkMOAQg3KkiNWxc8cTiZxwO2T/ C7BPGRPPpqPkzZiO1RI9WKpsH6XO4tsWjmlgtB1RE5V5Ap+MjCSd9LG/Dv8zuKIGwd dML0qerRUtztA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Mauro Carvalho Chehab , Tiffany Lin , Yunfei Dong , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 5/6] media: mediatek: vcodec: Read HW active status from syscon on MT8183 Date: Mon, 19 Jun 2023 20:03:38 -0400 Message-ID: <20230620000349.2122191-6-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230619_170416_003668_A8BE5800 X-CRM114-Status: GOOD ( 23.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove the requirement of a VDEC_SYS reg iospace for MT8183. To achieve that, rely on a vdecsys syscon to be passed through the DT, and use it to directly read the VDEC_HW_ACTIVE bit during IRQ handling to check whether the HW is active. The old behavior is still present when reg-names aren't supplied, as MT8173 still relies on it. Signed-off-by: Nícolas F. R. A. Prado --- I dropped the tags from this commit since a syscon is now used instead of an extra clock. Changes in v3: - Switched handling of VDEC_HW_ACTIVE to use a syscon instead of the 'active' clock - Reworded commit - Removed changes to subdev part of driver, since they aren't used by MT8183 .../mediatek/vcodec/mtk_vcodec_dec_drv.c | 71 ++++++++++++++++--- .../platform/mediatek/vcodec/mtk_vcodec_drv.h | 1 + 2 files changed, 61 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index 83780d29a9cf..387ed26d6d5d 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -8,10 +8,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -38,22 +40,37 @@ static int mtk_vcodec_get_hw_count(struct mtk_vcodec_dev *dev) } } +static bool mtk_vcodec_is_hw_active(struct mtk_vcodec_dev *dev) +{ + u32 cg_status = 0; + int val, ret; + + if (!dev->reg_base[VDEC_SYS]) { + ret = regmap_read(dev->vdecsys_regmap, VDEC_HW_ACTIVE_ADDR, &val); + if (ret) { + mtk_v4l2_err("Failed to read VDEC active status"); + return false; + } + + return (val & VDEC_HW_ACTIVE_MASK) == 0; + } + + cg_status = readl(dev->reg_base[VDEC_SYS] + VDEC_HW_ACTIVE_ADDR); + return (cg_status & VDEC_HW_ACTIVE_MASK) == 0; +} + static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) { struct mtk_vcodec_dev *dev = priv; struct mtk_vcodec_ctx *ctx; - u32 cg_status = 0; unsigned int dec_done_status = 0; void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG; ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE); - /* check if HW active or not */ - cg_status = readl(dev->reg_base[0] + VDEC_HW_ACTIVE_ADDR); - if ((cg_status & VDEC_HW_ACTIVE_MASK) != 0) { - mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)", - cg_status); + if (!mtk_vcodec_is_hw_active(dev)) { + mtk_v4l2_err("DEC ISR, VDEC active is not 0x0"); return IRQ_HANDLED; } @@ -82,6 +99,25 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) { struct platform_device *pdev = dev->plat_dev; int reg_num, i; + struct resource *res; + bool no_vdecsys_reg = false; + static const char * const mtk_dec_reg_names[] = { + "misc", + "ld", + "top", + "cm", + "ad", + "av", + "pp", + "hwd", + "hwq", + "hwb", + "hwg" + }; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "misc"); + if (res) + no_vdecsys_reg = true; /* Sizeof(u32) * 4 bytes for each register base. */ reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg", @@ -91,12 +127,22 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) return -EINVAL; } - for (i = 0; i < reg_num; i++) { - dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); - if (IS_ERR(dev->reg_base[i])) - return PTR_ERR(dev->reg_base[i]); + if (!no_vdecsys_reg) { + for (i = 0; i < reg_num; i++) { + dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); + if (IS_ERR(dev->reg_base[i])) + return PTR_ERR(dev->reg_base[i]); + + mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + } + } else { + for (i = 0; i < reg_num; i++) { + dev->reg_base[i+1] = devm_platform_ioremap_resource_byname(pdev, mtk_dec_reg_names[i]); + if (IS_ERR(dev->reg_base[i+1])) + return PTR_ERR(dev->reg_base[i+1]); - mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + mtk_v4l2_debug(2, "reg[%d] base=%p", i+1, dev->reg_base[i+1]); + } } return 0; @@ -118,6 +164,9 @@ static int mtk_vcodec_init_dec_resources(struct mtk_vcodec_dev *dev) if (dev->dec_irq < 0) return dev->dec_irq; + dev->vdecsys_regmap = syscon_regmap_lookup_by_phandle_optional(pdev->dev.of_node, + "mediatek,vdecsys"); + irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN); ret = devm_request_irq(&pdev->dev, dev->dec_irq, mtk_vcodec_dec_irq_handler, 0, pdev->name, dev); diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h index f17d67e781c9..0b430936f67d 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h @@ -489,6 +489,7 @@ struct mtk_vcodec_dev { void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE]; const struct mtk_vcodec_dec_pdata *vdec_pdata; const struct mtk_vcodec_enc_pdata *venc_pdata; + struct regmap *vdecsys_regmap; struct mtk_vcodec_fw *fw_handler; From patchwork Tue Jun 20 00:03:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13285035 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4DDE8EB64DA for ; Tue, 20 Jun 2023 00:05:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Tue, 20 Jun 2023 01:04:14 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687219457; bh=6ATRDxpWwig7hs2izlUcfXHh022ClevxNi5+pW49c5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gdkTnWe7EPdZV3Ex0X/89hfVYFf8wjg/7j2bhi/M2/cPEe1uFSdURA4G/FwGQq4sK 0GvzNCTtduir6CK40KruY72Fk9Ky9ugf09L/Hkd4XICtpcq+uqg60bnRyWelCwp9dY ZxOqHkAV6cccHLjBb5Ufeh0KjIaAtHh2rZZbNcXGswnPS5ujhxOTC8NY+4hhtgj4iY aZpoMfLyjkebPwYSrIRT4ekFKpb72JV6E60ypFT19Gbm1vRhwVXUvKCdQxwGHBkZ2U GmkgFkUkQP+0VaITJcRHr3r1aI1JX2jSt3gDBvzXyJaYNmdu2K32/gzpK6VKfyQcsS m9dErKbBTlC7A== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Yunfei Dong , =?utf-8?q?N?= =?utf-8?q?=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 6/6] arm64: dts: mediatek: mt8183: Add decoder Date: Mon, 19 Jun 2023 20:03:39 -0400 Message-ID: <20230620000349.2122191-7-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230620000349.2122191-1-nfraprado@collabora.com> References: <20230620000349.2122191-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230619_170418_354799_0443658D X-CRM114-Status: GOOD ( 10.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Yunfei Dong Add node for the hardware decoder present on the MT8183 SoC. Signed-off-by: Yunfei Dong Signed-off-by: Qianqian Yan Signed-off-by: Frederic Chen Signed-off-by: Alexandre Courbot Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Changes in v3: - Dropped 'active' clock and added the 'mediatek,vdecsys' syscon phandle property instead Changes in v2: - Reformatted reg-names to fit in fewer lines arch/arm64/boot/dts/mediatek/mt8183.dtsi | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 5169779d01df..4144f1ed3ff0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -2019,6 +2019,36 @@ vdecsys: syscon@16000000 { #clock-cells = <1>; }; + vcodec_dec: video-codec@16020000 { + compatible = "mediatek,mt8183-vcodec-dec"; + reg = <0 0x16020000 0 0x1000>, /* VDEC_MISC */ + <0 0x16021000 0 0x800>, /* VDEC_VLD */ + <0 0x16021800 0 0x800>, /* VDEC_TOP */ + <0 0x16022000 0 0x1000>, /* VDEC_MC */ + <0 0x16023000 0 0x1000>, /* VDEC_AVCVLD */ + <0 0x16024000 0 0x1000>, /* VDEC_AVCMV */ + <0 0x16025000 0 0x1000>, /* VDEC_PP */ + <0 0x16026800 0 0x800>, /* VP8_VD */ + <0 0x16027000 0 0x800>, /* VP6_VD */ + <0 0x16027800 0 0x800>, /* VP8_VL */ + <0 0x16028400 0 0x400>; /* VP9_VD */ + reg-names = "misc", "ld", "top", "cm", "ad", "av", "pp", + "hwd", "hwq", "hwb", "hwg"; + interrupts = ; + iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>, + <&iommu M4U_PORT_HW_VDEC_PP_EXT>, + <&iommu M4U_PORT_HW_VDEC_VLD_EXT>, + <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, + <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>, + <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>, + <&iommu M4U_PORT_HW_VDEC_PPWRAP_EXT>; + mediatek,scp = <&scp>; + mediatek,vdecsys = <&vdecsys>; + power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>; + clocks = <&vdecsys CLK_VDEC_VDEC>; + clock-names = "vdec"; + }; + larb1: larb@16010000 { compatible = "mediatek,mt8183-smi-larb"; reg = <0 0x16010000 0 0x1000>;