From patchwork Wed Jun 21 08:10:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286823 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC98CEB64D8 for ; Wed, 21 Jun 2023 08:10:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229758AbjFUIKv (ORCPT ); Wed, 21 Jun 2023 04:10:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229894AbjFUIKu (ORCPT ); Wed, 21 Jun 2023 04:10:50 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8CDA10DB for ; Wed, 21 Jun 2023 01:10:49 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A5036556; Wed, 21 Jun 2023 10:10:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335012; bh=w1iXcw/V3spckvEgKXCmL4tvJ5rQs45envQm9GmietU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lijEoFGnxbBm9UH+qEciP0O20xYkPzvcOmQZI9V7xuKhb0TOaQ1cL5nBuq8pcIRAd C6229VvyMxhIzx8qb5JiZiLKcVjaUHdpVoBrTO059t988qV8D8rufYJAURSi7+cpZR MXOBMtk2mcUkk5OIOA6JtlhslxhviA/IHEIubY3Y= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Alex Hung Subject: [RFC 1/9] drm: Add 3D LUT mode and its attributes Date: Wed, 21 Jun 2023 10:10:23 +0200 Message-Id: <20230621081031.7876-2-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Alex Hung A struct is defined for 3D LUT modes to be supported by hardware. The elements includes lut_size, lut_stride, bit_depth, color_format and flags. Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this proposal is sent to IGT mailing list. Signed-off-by: Alex Hung --- include/uapi/drm/drm_mode.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 43691058d28f..3b40694259c7 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -854,6 +854,23 @@ struct drm_color_lut { __u16 reserved; }; +/* + * struct drm_mode_lut3d_mode - 3D LUT mode information. + * @lut_size: number of valid points on every dimension of 3D LUT. + * @lut_stride: number of points on every dimension of 3D LUT. + * @bit_depth: number of bits of RGB. If color_mode defines entries with higher + * bit_depth the least significant bits will be truncated. + * @color_format: fourcc values, ex. DRM_FORMAT_XRGB16161616 or DRM_FORMAT_XBGR16161616. + * @flags: flags for hardware-sepcific features + */ +struct drm_mode_lut3d_mode { + __u16 lut_size; + __u16 lut_stride[3]; + __u16 bit_depth; + __u32 color_format; + __u32 flags; +}; + /** * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data. * From patchwork Wed Jun 21 08:10:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286825 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CA2FEB64DC for ; Wed, 21 Jun 2023 08:10:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229894AbjFUIK4 (ORCPT ); Wed, 21 Jun 2023 04:10:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229893AbjFUIKy (ORCPT ); Wed, 21 Jun 2023 04:10:54 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D571E10DA for ; Wed, 21 Jun 2023 01:10:50 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 722A3A4C; Wed, 21 Jun 2023 10:10:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335014; bh=ThZXeOv85mMNQ0BFghMgTes+iyHPvjygMO8QFqUqz0w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uAG8/AiOyTikQyVl8SvtF4OwFf7udehYiR9VWWkJFA1FZxrz3xPO137/xM+HQxkbL kNj3GM+SLLp0QZYZgzpUcuRYeGoOQq5w7GqxMOEeF8Kx1BzZ5sdhUn2zVc5cxrwjG6 QCeNePGNgYOrlajY9su7cHkJkBfFGy2yQhzO3jg8= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [RFC 2/9] drm/drm_color_mgmt: add shaper LUT to color mgmt properties Date: Wed, 21 Jun 2023 10:10:24 +0200 Message-Id: <20230621081031.7876-3-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Melissa Wen Shaper LUT is used to shape the content after blending, i.e., de-linearize or normalize space before applying a 3D LUT color correction. In the next patch, we add 3D LUT property to DRM color management after this shaper LUT and before the current gamma LUT. Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_atomic_state_helper.c | 4 ++++ drivers/gpu/drm/drm_atomic_uapi.c | 10 ++++++++++ drivers/gpu/drm/drm_color_mgmt.c | 18 ++++++++++++++++++ drivers/gpu/drm/drm_fb_helper.c | 3 +++ drivers/gpu/drm/drm_mode_config.c | 14 ++++++++++++++ include/drm/drm_crtc.h | 14 ++++++++++++-- include/drm/drm_mode_config.h | 12 ++++++++++++ include/drm/drm_mode_object.h | 2 +- 8 files changed, 74 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index 784e63d70a42..b75dcf2aa881 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -141,8 +141,11 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, drm_property_blob_get(state->degamma_lut); if (state->ctm) drm_property_blob_get(state->ctm); + if (state->shaper_lut) + drm_property_blob_get(state->shaper_lut); if (state->gamma_lut) drm_property_blob_get(state->gamma_lut); + state->mode_changed = false; state->active_changed = false; state->planes_changed = false; @@ -214,6 +217,7 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) drm_property_blob_put(state->mode_blob); drm_property_blob_put(state->degamma_lut); drm_property_blob_put(state->ctm); + drm_property_blob_put(state->shaper_lut); drm_property_blob_put(state->gamma_lut); } EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index d867e7f9f2cd..d006e4934ba2 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -430,6 +430,14 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, &replaced); state->color_mgmt_changed |= replaced; return ret; + } else if (property == config->shaper_lut_property) { + ret = drm_atomic_replace_property_blob_from_id(dev, + &state->shaper_lut, + val, + -1, sizeof(struct drm_color_lut), + &replaced); + state->color_mgmt_changed |= replaced; + return ret; } else if (property == config->gamma_lut_property) { ret = drm_atomic_replace_property_blob_from_id(dev, &state->gamma_lut, @@ -481,6 +489,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->degamma_lut) ? state->degamma_lut->base.id : 0; else if (property == config->ctm_property) *val = (state->ctm) ? state->ctm->base.id : 0; + else if (property == config->shaper_lut_property) + *val = (state->shaper_lut) ? state->shaper_lut->base.id : 0; else if (property == config->gamma_lut_property) *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; else if (property == config->prop_out_fence_ptr) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index d021497841b8..cf6a998b4298 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -69,6 +69,24 @@ * boot-up state too. Drivers can access the blob for the color conversion * matrix through &drm_crtc_state.ctm. * + * “SHAPER_LUT”: + * Blob property to set the shaper lut shaping pixel data after the color + * transformation matrix and before applying 3D Lookup Table (3D LUT). It + * can be used to delinearize content to get an effective 3D LUT mapping. + * The data is interpreted as an array of &struct drm_color_lut elements. + * + * Setting this to NULL (blob property value set to 0) means the output + * color is identical to the input color. This is generally the driver + * boot-up state too. Drivers can access this blob through + * &drm_crtc_state.gamma_lut. + * + * “SHAPER_LUT_SIZE”: + * Unsigned range property to give the size of the shaper lookup table to + * be set on the SHAPER_LUT property (the size depends on the underlying + * hardware). If drivers support multiple LUT sizes then they should + * publish the largest size, and sub-sample smaller sized LUTs + * appropriately. + * * “GAMMA_LUT”: * Blob property to set the gamma lookup table (LUT) mapping pixel data * after the transformation matrix to data sent to the connector. The diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 9978147bbc8a..a4ecb25fcfa0 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -962,8 +962,11 @@ static int setcmap_atomic(struct fb_cmap *cmap, struct fb_info *info) replaced = drm_property_replace_blob(&crtc_state->degamma_lut, NULL); replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); + replaced |= drm_property_replace_blob(&crtc_state->shaper_lut, + NULL); replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, gamma_lut); + crtc_state->color_mgmt_changed |= replaced; } diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 87eb591fe9b5..e288bc4815ab 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -353,6 +353,20 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.ctm_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_BLOB, + "SHAPER_LUT", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.shaper_lut_property = prop; + + prop = drm_property_create_range(dev, + DRM_MODE_PROP_IMMUTABLE, + "SHAPER_LUT_SIZE", 0, UINT_MAX); + if (!prop) + return -ENOMEM; + dev->mode_config.shaper_lut_size_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "GAMMA_LUT", 0); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 8e1cbc75143e..7f289e0153aa 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -152,8 +152,9 @@ struct drm_crtc_state { bool zpos_changed : 1; /** * @color_mgmt_changed: Color management properties have changed - * (@gamma_lut, @degamma_lut or @ctm). Used by the atomic helpers and - * drivers to steer the atomic commit control flow. + * (@shaper_lut, @gamma_lut, @degamma_lut or @ctm). Used by + * the atomic helpers and drivers to steer the atomic commit control + * flow. */ bool color_mgmt_changed : 1; @@ -279,6 +280,15 @@ struct drm_crtc_state { */ struct drm_property_blob *gamma_lut; + /** + * @shaper_lut: + * + * Lookup table used to de-linearize pixel data for gamma correction. + * See drm_crtc_enable_color_mgmt(). The blob (if not NULL) is an array + * of &struct drm_color_lut. + */ + struct drm_property_blob *shaper_lut; + /** * @target_vblank: * diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 973119a9176b..0ad06ec8abec 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -808,6 +808,18 @@ struct drm_mode_config { * degamma LUT. */ struct drm_property *ctm_property; + + /** + * @shaper_lut_property: Optional CRTC property to set the shaper LUT used to + * convert colors before 3D LUT conversion. + */ + struct drm_property *shaper_lut_property; + /** + * @shaper_lut_size_property: Optional CRTC property for the size of the + * shaper LUT as supported by the driver (read-only). + */ + struct drm_property *shaper_lut_size_property; + /** * @gamma_lut_property: Optional CRTC property to set the LUT used to * convert the colors, after the CTM matrix, to the gamma space of the diff --git a/include/drm/drm_mode_object.h b/include/drm/drm_mode_object.h index 912f1e415685..5e75b51936e6 100644 --- a/include/drm/drm_mode_object.h +++ b/include/drm/drm_mode_object.h @@ -60,7 +60,7 @@ struct drm_mode_object { void (*free_cb)(struct kref *kref); }; -#define DRM_OBJECT_MAX_PROPERTY 24 +#define DRM_OBJECT_MAX_PROPERTY 26 /** * struct drm_object_properties - property tracking for &drm_mode_object */ From patchwork Wed Jun 21 08:10:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286824 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB8B6EB64D8 for ; Wed, 21 Jun 2023 08:10:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230215AbjFUIKz (ORCPT ); Wed, 21 Jun 2023 04:10:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229894AbjFUIKy (ORCPT ); Wed, 21 Jun 2023 04:10:54 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DAE310DB for ; Wed, 21 Jun 2023 01:10:52 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 35052B2A; Wed, 21 Jun 2023 10:10:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335015; bh=mVBu98iqneDFuXVf4ZnlC1ZWG8aMUrHiTZitFjzREr4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CzqqvXbnP78XWfZ9tzVun2bQBVEAUO5wCvCqLGyhfWn6kleuYk6hAIYHIZJP8LKA/ OxgcWz0oB6GlIaAa1AZUH55zWH4572tvYeTU+U/kaLppDc3gQVZrXqnT5S49j5eom2 lV2LPMFOd+isPGszmxYR0U8g0hzvNDgAPQUV9hUY= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [RFC 3/9] drm/drm_color_mgmt: add 3D LUT props to DRM color mgmt Date: Wed, 21 Jun 2023 10:10:25 +0200 Message-Id: <20230621081031.7876-4-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Melissa Wen Add 3D LUT for gammar correction using a 3D lookup table. The position in the color correction pipeline where 3D LUT is applied depends on hw design, being after CTM or gamma. If just after CTM, a shaper lut must be set to shape the content for a non-linear space. That details should be handled by the driver according to its color capabilities. --- v3: - refactor CRTC 3D LUT API to use Alex Hung proposal for planes Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_atomic_state_helper.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 14 ++++++++++++++ drivers/gpu/drm/drm_color_mgmt.c | 19 +++++++++++++++++++ drivers/gpu/drm/drm_fb_helper.c | 2 ++ drivers/gpu/drm/drm_mode_config.c | 7 +++++++ include/drm/drm_crtc.h | 20 +++++++++++++++++++- include/drm/drm_mode_config.h | 13 +++++++++++++ include/drm/drm_mode_object.h | 2 +- 8 files changed, 78 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c index b75dcf2aa881..0d5ceb5c654c 100644 --- a/drivers/gpu/drm/drm_atomic_state_helper.c +++ b/drivers/gpu/drm/drm_atomic_state_helper.c @@ -143,6 +143,8 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, drm_property_blob_get(state->ctm); if (state->shaper_lut) drm_property_blob_get(state->shaper_lut); + if (state->lut3d) + drm_property_blob_get(state->lut3d); if (state->gamma_lut) drm_property_blob_get(state->gamma_lut); @@ -218,6 +220,7 @@ void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) drm_property_blob_put(state->degamma_lut); drm_property_blob_put(state->ctm); drm_property_blob_put(state->shaper_lut); + drm_property_blob_put(state->lut3d); drm_property_blob_put(state->gamma_lut); } EXPORT_SYMBOL(__drm_atomic_helper_crtc_destroy_state); diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index d006e4934ba2..1f02022e45b3 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -438,6 +438,16 @@ static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, &replaced); state->color_mgmt_changed |= replaced; return ret; + } else if (property == config->lut3d_property) { + ret = drm_atomic_replace_property_blob_from_id(dev, + &state->lut3d, + val, + -1, sizeof(struct drm_color_lut), + &replaced); + state->color_mgmt_changed |= replaced; + return ret; + } else if (property == config->lut3d_mode_property) { + state->lut3d_mode = val; } else if (property == config->gamma_lut_property) { ret = drm_atomic_replace_property_blob_from_id(dev, &state->gamma_lut, @@ -491,6 +501,10 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc, *val = (state->ctm) ? state->ctm->base.id : 0; else if (property == config->shaper_lut_property) *val = (state->shaper_lut) ? state->shaper_lut->base.id : 0; + else if (property == config->lut3d_property) + *val = (state->lut3d) ? state->lut3d->base.id : 0; + else if (property == config->lut3d_mode_property) + *val = state->lut3d_mode; else if (property == config->gamma_lut_property) *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; else if (property == config->prop_out_fence_ptr) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index cf6a998b4298..f92633b3b67e 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -87,6 +87,25 @@ * publish the largest size, and sub-sample smaller sized LUTs * appropriately. * + * “LUT3D”: + * Blob property to set the 3D LUT mapping pixel data after the color + * transformation matrix and before gamma 1D lut correction. The + * data is interpreted as an array of &struct drm_color_lut elements. + * Hardware might choose not to use the full precision of the LUT + * elements. + * + * Setting this to NULL (blob property value set to 0) means a the output + * color is identical to the input color. This is generally the driver + * boot-up state too. Drivers can access this blob through + * &drm_crtc_state.gamma_lut. + * + * “LUT3D_MODE”: + * Enum property to give the mode of the 3D lookup table to be set on the + * LUT3D property. A mode specifies size, stride, bit depth and color + * format and depends on the underlying hardware). If drivers support + * multiple 3D LUT modes, they should be declared in a array of + * drm_color_lut3d_mode and they will be advertised as an enum. + * * “GAMMA_LUT”: * Blob property to set the gamma lookup table (LUT) mapping pixel data * after the transformation matrix to data sent to the connector. The diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index a4ecb25fcfa0..fd76de50bb79 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -964,6 +964,8 @@ static int setcmap_atomic(struct fb_cmap *cmap, struct fb_info *info) replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); replaced |= drm_property_replace_blob(&crtc_state->shaper_lut, NULL); + replaced |= drm_property_replace_blob(&crtc_state->lut3d, + NULL); replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, gamma_lut); diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index e288bc4815ab..b82a7cb2a8f7 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -367,6 +367,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.shaper_lut_size_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_BLOB, + "LUT3D", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.lut3d_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "GAMMA_LUT", 0); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 7f289e0153aa..805a50c36a70 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -152,7 +152,7 @@ struct drm_crtc_state { bool zpos_changed : 1; /** * @color_mgmt_changed: Color management properties have changed - * (@shaper_lut, @gamma_lut, @degamma_lut or @ctm). Used by + * (@shaper_lut, @lut3d, @gamma_lut, @degamma_lut or @ctm). Used by * the atomic helpers and drivers to steer the atomic commit control * flow. */ @@ -289,6 +289,24 @@ struct drm_crtc_state { */ struct drm_property_blob *shaper_lut; + /** + * @lut3d: + * + * 3D Lookup table for converting pixel data. Position where it takes + * place depends on hw design, after @ctm or @gamma_lut. See + * drm_crtc_enable_color_mgmt(). The blob (if not NULL) is an array of + * &struct drm_color_lut. + */ + struct drm_property_blob *lut3d; + + /** + * @lut3d_mode: + * This is a blob_id and exposes the platform capabilities wrt + * various 3dlut. This also helps user select a 3dlut mode amongst + * the supported ones. + */ + u32 lut3d_mode; + /** * @target_vblank: * diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 0ad06ec8abec..0baf6354f757 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -820,6 +820,19 @@ struct drm_mode_config { */ struct drm_property *shaper_lut_size_property; + /** + * @lut3d_property: Optional CRTC property to set the 3D LUT used to + * convert colors; before or after gamma conversion depends on hw + * design. A shaper LUT can be used to delinearize content before apply + * 3D LUT correction. + */ + struct drm_property *lut3d_property; + /** + * @lut3d_mode_property: Optional CRTC property to describe 3D LUT modes + * supported by the driver. + */ + struct drm_property *lut3d_mode_property; + /** * @gamma_lut_property: Optional CRTC property to set the LUT used to * convert the colors, after the CTM matrix, to the gamma space of the diff --git a/include/drm/drm_mode_object.h b/include/drm/drm_mode_object.h index 5e75b51936e6..d39ee21f26db 100644 --- a/include/drm/drm_mode_object.h +++ b/include/drm/drm_mode_object.h @@ -60,7 +60,7 @@ struct drm_mode_object { void (*free_cb)(struct kref *kref); }; -#define DRM_OBJECT_MAX_PROPERTY 26 +#define DRM_OBJECT_MAX_PROPERTY 28 /** * struct drm_object_properties - property tracking for &drm_mode_object */ From patchwork Wed Jun 21 08:10:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286827 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2979CEB64D8 for ; Wed, 21 Jun 2023 08:10:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbjFUIK6 (ORCPT ); Wed, 21 Jun 2023 04:10:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230285AbjFUIK4 (ORCPT ); Wed, 21 Jun 2023 04:10:56 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5328910DA for ; Wed, 21 Jun 2023 01:10:55 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E60DBD77; Wed, 21 Jun 2023 10:10:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335017; bh=Ap0cu7IR+Hff/WHhknNnXA/M5CqBHc7utucP7RaYZ5k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B5iSl4AJJdmDGvJ5vLqTJQzCgaE30efpe52Flv0DMVIpieUHthkpnYn3SRyP9Urn9 X3cNOxw+AB5GdNUtW0LZfRXYM53pUfrwzdeALTyRGglHzyPi6ifuTocGBXGi32IEnK ZOh8gscMCA9Dq4B/X3+jeF+jJcs9dcMScGvn5Tks= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [RFC 4/9] drm/drm_color_mgmt: add function to create 3D LUT modes supported Date: Wed, 21 Jun 2023 10:10:26 +0200 Message-Id: <20230621081031.7876-5-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Melissa Wen DRM color function to create modes for lut3d mode property from an array of drm_color_lut3d_mode modes supported by the HW and advertise to userspace. Userspace can get the description of a specific mode in the enum list from its blob data. Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_color_mgmt.c | 43 +++++++++++++++++++++++++++++++- include/drm/drm_color_mgmt.h | 4 +++ 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index f92633b3b67e..6ce48007cdd4 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -104,7 +104,7 @@ * LUT3D property. A mode specifies size, stride, bit depth and color * format and depends on the underlying hardware). If drivers support * multiple 3D LUT modes, they should be declared in a array of - * drm_color_lut3d_mode and they will be advertised as an enum. + * drm_mode_lut3d_mode and they will be advertised as an enum. * * “GAMMA_LUT”: * Blob property to set the gamma lookup table (LUT) mapping pixel data @@ -228,6 +228,47 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_enable_color_mgmt); +int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, + const struct drm_mode_lut3d_mode modes[], + unsigned int num_modes) +{ + struct drm_device *dev = crtc->dev; + struct drm_property_blob *blob; + struct drm_property *prop; + char *name; + int ret; + + if (dev->mode_config.lut3d_mode_property) + return 0; + + prop = drm_property_create(dev, DRM_MODE_PROP_ENUM, "LUT3D_MODE", num_modes); + if (!prop) + return -EINVAL; + + for (int i = 0; i < num_modes; i++) { + blob = drm_property_create_blob(dev, sizeof(modes[i]), &modes[i]); + if (IS_ERR(blob)) + return PTR_ERR(blob); + + name = kasprintf(GFP_KERNEL, "lut3d_%d_%dbit", + modes[i].lut_size, modes[i].bit_depth); + if (!name) + return -ENOMEM; + + ret = drm_property_add_enum(prop, blob->base.id, name); + if (ret) { + drm_property_blob_put(blob); + kfree(name); + return ret; + } + kfree(name); + } + dev->mode_config.lut3d_mode_property = prop; + + return 0; +} +EXPORT_SYMBOL(drm_crtc_create_lut3d_mode_property); + /** * drm_mode_crtc_set_gamma_size - set the gamma table size * @crtc: CRTC to set the gamma table size for diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index 81c298488b0c..af9305925572 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -59,6 +59,10 @@ void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, bool has_ctm, uint gamma_lut_size); +int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, + const struct drm_mode_lut3d_mode modes[], + unsigned int num_modes); + int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, int gamma_size); From patchwork Wed Jun 21 08:10:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286826 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A360FC001B3 for ; Wed, 21 Jun 2023 08:10:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230217AbjFUIK5 (ORCPT ); Wed, 21 Jun 2023 04:10:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230291AbjFUIK4 (ORCPT ); Wed, 21 Jun 2023 04:10:56 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71DAC10F9 for ; Wed, 21 Jun 2023 01:10:55 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A3E502082; Wed, 21 Jun 2023 10:10:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335019; bh=UZmFwbOhP9tYgRdVpDLV8/qbaogykXpher6ddo7BN50=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TMp+u+tFfHVuEq3zOkTl5uMgROVpzm6BTz0WEfLvBondHTH7pwuHvr+aM9ZnLwG1f EQvIDtDdvfu081bc4Ewzaw5zq6C5Vw0roRQXlpR3NdOULPAuRKjEI0BWY79rvWCwP6 bxl6IFbNxw7lUyOLh2ihmNDqsRdK1nthOz+gMXmQ= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [RFC 5/9] drm/drm_color_mgmt: add function to attach 3D LUT props Date: Wed, 21 Jun 2023 10:10:27 +0200 Message-Id: <20230621081031.7876-6-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Melissa Wen If the driver supports user 3D LUT then it calls a drm function to attach 3D LUT related properties according to HW caps. Signed-off-by: Melissa Wen --- drivers/gpu/drm/drm_color_mgmt.c | 35 ++++++++++++++++++++++++++++++++ include/drm/drm_color_mgmt.h | 3 +++ 2 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 6ce48007cdd4..06503f693ecd 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -269,6 +269,41 @@ int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, } EXPORT_SYMBOL(drm_crtc_create_lut3d_mode_property); +/** + * drm_crtc_enable_lut3d - enable 3D LUT properties + * @crtc: DRM CRTC + * @shaper_lut_size: the size of shaper lut + * + * This function lets the driver enable the 3D LUT color correction property + * on a CRTC. This includes 3D LUT and also a shaper LUT, if set. The shaper + * LUT property is only attached if its size is not 0 and 3D LUT is set, being + * therefore optional. + */ +void drm_crtc_enable_lut3d(struct drm_crtc *crtc, + uint shaper_lut_size) +{ + struct drm_device *dev = crtc->dev; + struct drm_mode_config *config = &dev->mode_config; + + if (!config->lut3d_mode_property) + return; + + drm_object_attach_property(&crtc->base, + config->lut3d_property, 0); + drm_object_attach_property(&crtc->base, + config->lut3d_mode_property, 0); + + if (!shaper_lut_size) + return; + + drm_object_attach_property(&crtc->base, + config->shaper_lut_property, 0); + drm_object_attach_property(&crtc->base, + config->shaper_lut_size_property, + shaper_lut_size); +} +EXPORT_SYMBOL(drm_crtc_enable_lut3d); + /** * drm_mode_crtc_set_gamma_size - set the gamma table size * @crtc: CRTC to set the gamma table size for diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index af9305925572..db2026dc825e 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -63,6 +63,9 @@ int drm_crtc_create_lut3d_mode_property(struct drm_crtc *crtc, const struct drm_mode_lut3d_mode modes[], unsigned int num_modes); +void drm_crtc_enable_lut3d(struct drm_crtc *crtc, + uint shaper_lut_size); + int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, int gamma_size); From patchwork Wed Jun 21 08:10:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286828 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F352EB64D8 for ; Wed, 21 Jun 2023 08:11:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230414AbjFUILF (ORCPT ); Wed, 21 Jun 2023 04:11:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229849AbjFUIK7 (ORCPT ); Wed, 21 Jun 2023 04:10:59 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEF4B10DA for ; Wed, 21 Jun 2023 01:10:57 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 61B5C10FE; Wed, 21 Jun 2023 10:10:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335021; bh=cUuBguMATEha6mgxhe66vUlSq0MV+gqW6ALG/cofuEQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YixKUSUeY7/pe0j50m+pyFA/LHYyJTTMmyHRsJPmKrCCvMbufpIxMH5lweFmUFvXn yc+beU3c5aWAXzph3JrHBKoUWHx5uXsThDEFFvFsILaae5QHFGvPc4xovTBgkbVa2D oOSlvOXjPQMcmvubpaxQwmBSpESZH3KOdX/3M7dw= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Laurent Pinchart Subject: [RFC 6/9] drm: rcar-du: cmm: Refactor LUT configuration Date: Wed, 21 Jun 2023 10:10:28 +0200 Message-Id: <20230621081031.7876-7-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Laurent Pinchart To prepare for CLU support, expend the CMM API exposed to the DU driver to separate the LUT table pointer from the LUT update decision. This will be required, as we will need to update the LUT and CLU independently. Signed-off-by: Laurent Pinchart Reviewed-by: Kieran Bingham Signed-off-by: Jacopo Mondi --- drivers/gpu/drm/rcar-du/rcar_cmm.c | 60 ++++++++++++-------------- drivers/gpu/drm/rcar-du/rcar_cmm.h | 19 +++++--- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 22 +++++++--- 3 files changed, 55 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.c b/drivers/gpu/drm/rcar-du/rcar_cmm.c index e2a67dda4658..df768a9afb72 100644 --- a/drivers/gpu/drm/rcar-du/rcar_cmm.c +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.c @@ -42,23 +42,33 @@ static inline void rcar_cmm_write(struct rcar_cmm *rcmm, u32 reg, u32 data) iowrite32(data, rcmm->base + reg); } -/* - * rcar_cmm_lut_write() - Scale the DRM LUT table entries to hardware precision - * and write to the CMM registers - * @rcmm: Pointer to the CMM device - * @drm_lut: Pointer to the DRM LUT table - */ -static void rcar_cmm_lut_write(struct rcar_cmm *rcmm, - const struct drm_color_lut *drm_lut) +static void rcar_cmm_lut_configure(struct rcar_cmm *rcmm, + const struct drm_color_lut *table) { - unsigned int i; + bool enable = !!table; + + if (rcmm->lut.enabled != enable) { + rcar_cmm_write(rcmm, CM2_LUT_CTRL, + enable ? CM2_LUT_CTRL_LUT_EN : 0); + rcmm->lut.enabled = enable; + } - for (i = 0; i < CM2_LUT_SIZE; ++i) { - u32 entry = drm_color_lut_extract(drm_lut[i].red, 8) << 16 - | drm_color_lut_extract(drm_lut[i].green, 8) << 8 - | drm_color_lut_extract(drm_lut[i].blue, 8); + if (table) { + unsigned int i; - rcar_cmm_write(rcmm, CM2_LUT_TBL(i), entry); + /* + * Scale the DRM LUT table entries to the hardware precision + * and program it. + */ + for (i = 0; i < CM2_LUT_SIZE; ++i) { + const struct drm_color_lut *lut = &table[i]; + + u32 entry = drm_color_lut_extract(lut->red, 8) << 16 + | drm_color_lut_extract(lut->green, 8) << 8 + | drm_color_lut_extract(lut->blue, 8); + + rcar_cmm_write(rcmm, CM2_LUT_TBL(i), entry); + } } } @@ -83,23 +93,8 @@ int rcar_cmm_setup(struct platform_device *pdev, { struct rcar_cmm *rcmm = platform_get_drvdata(pdev); - /* Disable LUT if no table is provided. */ - if (!config->lut.table) { - if (rcmm->lut.enabled) { - rcar_cmm_write(rcmm, CM2_LUT_CTRL, 0); - rcmm->lut.enabled = false; - } - - return 0; - } - - /* Enable LUT and program the new gamma table values. */ - if (!rcmm->lut.enabled) { - rcar_cmm_write(rcmm, CM2_LUT_CTRL, CM2_LUT_CTRL_LUT_EN); - rcmm->lut.enabled = true; - } - - rcar_cmm_lut_write(rcmm, config->lut.table); + if (config->lut.update) + rcar_cmm_lut_configure(rcmm, config->lut.table); return 0; } @@ -144,8 +139,7 @@ void rcar_cmm_disable(struct platform_device *pdev) { struct rcar_cmm *rcmm = platform_get_drvdata(pdev); - rcar_cmm_write(rcmm, CM2_LUT_CTRL, 0); - rcmm->lut.enabled = false; + rcar_cmm_lut_configure(rcmm, NULL); pm_runtime_put(&pdev->dev); } diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.h b/drivers/gpu/drm/rcar-du/rcar_cmm.h index 628072acc98b..375a3b9c3db3 100644 --- a/drivers/gpu/drm/rcar-du/rcar_cmm.h +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.h @@ -13,16 +13,23 @@ struct drm_color_lut; struct platform_device; +/** + * struct rcar_cmm_table_config - CMM LUT configuration + * @update: When true, update the LUT configuration. + * @table: Table data. The LUT is enabled if non-NULL, and disabled + * otherwise. The value is ignored if @update is false. + */ +struct rcar_cmm_table_config { + bool update; + struct drm_color_lut *table; +}; + /** * struct rcar_cmm_config - CMM configuration - * - * @lut: 1D-LUT configuration - * @lut.table: 1D-LUT table entries. Disable LUT operations when NULL + * @lut: 1D-LUT configuration */ struct rcar_cmm_config { - struct { - struct drm_color_lut *table; - } lut; + struct rcar_cmm_table_config lut; }; #if IS_ENABLED(CONFIG_DRM_RCAR_CMM) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index d6d29be6b4f4..a2d477dc5a51 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -537,17 +537,23 @@ static int rcar_du_cmm_check(struct drm_crtc *crtc, return 0; } -static void rcar_du_cmm_setup(struct drm_crtc *crtc) +static void rcar_du_cmm_setup(struct rcar_du_crtc *rcrtc, + const struct drm_crtc_state *old_state, + const struct drm_crtc_state *new_state) { - struct drm_property_blob *drm_lut = crtc->state->gamma_lut; - struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); struct rcar_cmm_config cmm_config = {}; if (!rcrtc->cmm) return; - if (drm_lut) - cmm_config.lut.table = (struct drm_color_lut *)drm_lut->data; + if (!old_state || + !old_state->gamma_lut != !new_state->gamma_lut || + (old_state->gamma_lut && new_state->gamma_lut && + old_state->gamma_lut->base.id != new_state->gamma_lut->base.id)) { + cmm_config.lut.update = true; + cmm_config.lut.table = new_state->gamma_lut + ? new_state->gamma_lut->data : NULL; + } rcar_cmm_setup(rcrtc->cmm, &cmm_config); } @@ -794,7 +800,7 @@ static void rcar_du_crtc_atomic_enable(struct drm_crtc *crtc, * after the DU channel has been activated. Investigate the impact * of this restriction on the first displayed frame. */ - rcar_du_cmm_setup(crtc); + rcar_du_cmm_setup(rcrtc, NULL, crtc->state); } static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, @@ -844,6 +850,8 @@ static void rcar_du_crtc_atomic_disable(struct drm_crtc *crtc, static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state) { + struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, + crtc); struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); WARN_ON(!crtc->state->enable); @@ -864,7 +872,7 @@ static void rcar_du_crtc_atomic_begin(struct drm_crtc *crtc, /* If the active state changed, we let .atomic_enable handle CMM. */ if (crtc->state->color_mgmt_changed && !crtc->state->active_changed) - rcar_du_cmm_setup(crtc); + rcar_du_cmm_setup(rcrtc, old_state, crtc->state); if (rcar_du_has(rcrtc->dev, RCAR_DU_FEATURE_VSP1_SOURCE)) rcar_du_vsp_atomic_begin(rcrtc); From patchwork Wed Jun 21 08:10:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286829 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2453EB64DD for ; Wed, 21 Jun 2023 08:11:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230436AbjFUILG (ORCPT ); Wed, 21 Jun 2023 04:11:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230149AbjFUILA (ORCPT ); Wed, 21 Jun 2023 04:11:00 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF80610F1 for ; Wed, 21 Jun 2023 01:10:58 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 2B57F2CB5; Wed, 21 Jun 2023 10:10:21 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335022; bh=19iEz0s6orKITVIsjB+HX/6A98SJnMlLGSm1/CTMxLQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vu29+XkHbShwg1aoUJDbac6MVvEhAdHXQlgW+L1Pv0CGr1ZNZbyFQQkH08x5Tpo+M q/qsj9D+g62wwvlstzCOnvsEnhxa5gAY0M7hYEm1IhVPhScRGKYassVe5NS8+x9dhT uLtNPCUGEE0aNfHR78SmAYNf+SKArZgrwGIdHuLM= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Laurent Pinchart Subject: [RFC 7/9] drm: rcar-du: cmm: Provide 3D-CLU support Date: Wed, 21 Jun 2023 10:10:29 +0200 Message-Id: <20230621081031.7876-8-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham The CMM module provides a three-dimensional cubic look up table that converts three-color-component data into desired three color components by use of a lookup table. While the 1D-LUT can only control each of three color components separately, the 3D-CLU can be used for specific color adjustment. Signed-off-by: Kieran Bingham Signed-off-by: Laurent Pinchart Reviewed-by: Kieran Bingham Signed-off-by: Jacopo Mondi --- drivers/gpu/drm/rcar-du/rcar_cmm.c | 71 +++++++++++++++++++++++++++++- drivers/gpu/drm/rcar-du/rcar_cmm.h | 11 +++-- 2 files changed, 76 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.c b/drivers/gpu/drm/rcar-du/rcar_cmm.c index df768a9afb72..defedfaf8f56 100644 --- a/drivers/gpu/drm/rcar-du/rcar_cmm.c +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.c @@ -17,9 +17,18 @@ #define CM2_LUT_CTRL 0x0000 #define CM2_LUT_CTRL_LUT_EN BIT(0) + +#define CM2_CLU_CTRL 0x0100 +#define CM2_CLU_CTRL_CLU_EN BIT(0) +#define CM2_CLU_CTRL_MVS BIT(24) +#define CM2_CLU_CTRL_AAI BIT(28) + #define CM2_LUT_TBL_BASE 0x0600 #define CM2_LUT_TBL(__i) (CM2_LUT_TBL_BASE + (__i) * 4) +#define CM2_CLU_ADDR 0x0a00 +#define CM2_CLU_DATA 0x0a04 + struct rcar_cmm { void __iomem *base; @@ -30,6 +39,10 @@ struct rcar_cmm { struct { bool enabled; } lut; + + struct { + bool enabled; + } clu; }; static inline int rcar_cmm_read(struct rcar_cmm *rcmm, u32 reg) @@ -72,13 +85,63 @@ static void rcar_cmm_lut_configure(struct rcar_cmm *rcmm, } } +static void rcar_cmm_clu_program(struct rcar_cmm *rcmm, + const struct drm_color_lut *table) +{ + unsigned int i; + + /* Utilise CM2_CLU_CTRL_AAI (auto-increment). */ + rcar_cmm_write(rcmm, CM2_CLU_ADDR, 0); + + for (i = 0; i < CM2_CLU_SIZE; ++i) { + const struct drm_color_lut *lut = &table[i]; + + u32 entry = drm_color_lut_extract(lut->red, 8) << 16 + | drm_color_lut_extract(lut->green, 8) << 8 + | drm_color_lut_extract(lut->blue, 8); + + rcar_cmm_write(rcmm, CM2_CLU_DATA, entry); + } +} + +static void rcar_cmm_clu_configure(struct rcar_cmm *rcmm, + const struct drm_color_lut *table) +{ + static const u32 clu_ctrl = CM2_CLU_CTRL_AAI | CM2_CLU_CTRL_MVS + | CM2_CLU_CTRL_CLU_EN; + bool enable = !!table; + + if (rcmm->clu.enabled != enable) { + /* + * This is the first run of the CLU. We need to program + * the CLU data before enabling the peripheral. + */ + if (enable) { + rcar_cmm_write(rcmm, CM2_CLU_CTRL, CM2_CLU_CTRL_AAI); + rcar_cmm_clu_program(rcmm, table); + } + + rcar_cmm_write(rcmm, CM2_CLU_CTRL, enable ? clu_ctrl : 0); + rcmm->clu.enabled = enable; + + return; + } + + /* + * CLU already enabled, but the 3D LUT has been updated; re-program + * the data table with the new values. + */ + if (table) + rcar_cmm_clu_program(rcmm, table); +} + /* * rcar_cmm_setup() - Configure the CMM unit * @pdev: The platform device associated with the CMM instance * @config: The CMM unit configuration * - * Configure the CMM unit with the given configuration. Currently enabling, - * disabling and programming of the 1-D LUT unit is supported. + * Configure the CMM unit with the given configuration, handling both the + * 1-D LUT and the 3-D CLU. * * As rcar_cmm_setup() accesses the CMM registers the unit should be powered * and its functional clock enabled. To guarantee this, before any call to @@ -96,6 +159,9 @@ int rcar_cmm_setup(struct platform_device *pdev, if (config->lut.update) rcar_cmm_lut_configure(rcmm, config->lut.table); + if (config->clu.update) + rcar_cmm_clu_configure(rcmm, config->clu.table); + return 0; } EXPORT_SYMBOL_GPL(rcar_cmm_setup); @@ -140,6 +206,7 @@ void rcar_cmm_disable(struct platform_device *pdev) struct rcar_cmm *rcmm = platform_get_drvdata(pdev); rcar_cmm_lut_configure(rcmm, NULL); + rcar_cmm_clu_configure(rcmm, NULL); pm_runtime_put(&pdev->dev); } diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.h b/drivers/gpu/drm/rcar-du/rcar_cmm.h index 375a3b9c3db3..277b9e4d9cc4 100644 --- a/drivers/gpu/drm/rcar-du/rcar_cmm.h +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.h @@ -9,14 +9,15 @@ #define __RCAR_CMM_H__ #define CM2_LUT_SIZE 256 +#define CM2_CLU_SIZE (17 * 17 * 17) struct drm_color_lut; struct platform_device; /** - * struct rcar_cmm_table_config - CMM LUT configuration - * @update: When true, update the LUT configuration. - * @table: Table data. The LUT is enabled if non-NULL, and disabled + * struct rcar_cmm_table_config - CMM LUT and CLU configuration + * @update: When true, update the LUT or CLU configuration. + * @table: Table data. The LUT or CLU is enabled if non-NULL, and disabled * otherwise. The value is ignored if @update is false. */ struct rcar_cmm_table_config { @@ -26,10 +27,12 @@ struct rcar_cmm_table_config { /** * struct rcar_cmm_config - CMM configuration - * @lut: 1D-LUT configuration + * @lut: 1D LUT configuration + * @clu: 3D (cubic) LUT configuration */ struct rcar_cmm_config { struct rcar_cmm_table_config lut; + struct rcar_cmm_table_config clu; }; #if IS_ENABLED(CONFIG_DRM_RCAR_CMM) From patchwork Wed Jun 21 08:10:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286830 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07C7FEB64D7 for ; Wed, 21 Jun 2023 08:11:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230488AbjFUILH (ORCPT ); Wed, 21 Jun 2023 04:11:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230354AbjFUILE (ORCPT ); Wed, 21 Jun 2023 04:11:04 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E06E51718 for ; Wed, 21 Jun 2023 01:11:00 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id EC2E915E9; Wed, 21 Jun 2023 10:10:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335024; bh=L0Or/dRrc/G1jwhGCHOAPe0GtoeuM6ImRaeCz+srIco=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h9BXmzIAr2Dwm2Vp3+BxB/W4AVimJ9SAHWOf7JjPEREb4WifvjXRwZHq6pLW8QdRr cF7jEvCXpEK92/LdLt0Fu5hKLJCto4rm1V8QOtF7u0bFaGeDfbsO8fGICAVo2NXX5z pViuoMXWfiIilrRo4VfJGmWN/NUXOkoiEP1Q7I4Q= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Laurent Pinchart Subject: [RFC 8/9] drm: rcar-du: kms: Configure the CLU Date: Wed, 21 Jun 2023 10:10:30 +0200 Message-Id: <20230621081031.7876-9-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham Link the DRM 3D-CLU configuration to the CMM setup configuration. Signed-off-by: Kieran Bingham Signed-off-by: Laurent Pinchart Reviewed-by: Kieran Bingham Signed-off-by: Jacopo Mondi --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 23 ++++++++++++++++++----- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index a2d477dc5a51..895a23161f7b 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -521,19 +521,23 @@ static int rcar_du_cmm_check(struct drm_crtc *crtc, struct drm_crtc_state *state) { struct drm_property_blob *drm_lut = state->gamma_lut; + struct drm_property_blob *drm_clu = state->lut3d; struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); struct device *dev = rcrtc->dev->dev; - if (!drm_lut) - return 0; - - /* We only accept fully populated LUT tables. */ - if (drm_color_lut_size(drm_lut) != CM2_LUT_SIZE) { + /* We only accept fully populated LUTs. */ + if (drm_lut && drm_color_lut_size(drm_lut) != CM2_LUT_SIZE) { dev_err(dev, "invalid gamma lut size: %zu bytes\n", drm_lut->length); return -EINVAL; } + if (drm_clu && drm_color_lut_size(drm_clu) != CM2_CLU_SIZE) { + dev_err(dev, "invalid cubic lut size: %zu bytes\n", + drm_clu->length); + return -EINVAL; + } + return 0; } @@ -555,6 +559,15 @@ static void rcar_du_cmm_setup(struct rcar_du_crtc *rcrtc, ? new_state->gamma_lut->data : NULL; } + if (!old_state || + !old_state->lut3d != !new_state->lut3d || + (old_state->lut3d && new_state->lut3d && + old_state->lut3d->base.id != new_state->lut3d->base.id)) { + cmm_config.clu.update = true; + cmm_config.clu.table = new_state->lut3d + ? new_state->lut3d->data : NULL; + } + rcar_cmm_setup(rcrtc->cmm, &cmm_config); } From patchwork Wed Jun 21 08:10:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacopo Mondi X-Patchwork-Id: 13286831 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67124EB64D8 for ; Wed, 21 Jun 2023 08:11:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229849AbjFUILJ (ORCPT ); Wed, 21 Jun 2023 04:11:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229956AbjFUILF (ORCPT ); Wed, 21 Jun 2023 04:11:05 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 779AC1981 for ; Wed, 21 Jun 2023 01:11:02 -0700 (PDT) Received: from uno.lan (unknown [IPv6:2001:b07:5d2e:52c9:1cf0:b3bc:c785:4625]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B61FE2C96; Wed, 21 Jun 2023 10:10:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1687335026; bh=Nz5xxiQsV7L8tjRBWm4HkFoJy2viyWnaSexoVo6LVwE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qEy/Jrd+AP3vUp/wSwq9Zb5ZDKTXSGg51A8nUv24Lwogw+ZcXK41ZGglw0/Q4t0aE 7aXEvjXlWPC879/ne7Qd/fvqKoxtXjCndntS/+lxpK1X6glJq/Bwtk3+uwJEYeMTm+ sNgcXFaXtomYjMZ+rsYPNMwIM7ODEQOFa4dZYjV0= From: Jacopo Mondi To: Laurent Pinchart , Kieran Bingham Cc: Jacopo Mondi , Simon Ser , Pekka Paalanen , =?utf-8?q?Jonas_=C3=85dahl?= , xaver.hugl@gmail.com, Melissa Wen , wayland-devel , mdaenzer@redhat.com, Uma Shankar , Victoria Brekenfeld , aleixpol@kde.org, Sebastian Wick , Joshua Ashton , airlied@gmail.com, alexander.deucher@amd.com, christian.koenig@amd.com, daniel@ffwll.ch, harry.wentland@amd.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, Rodrigo.Siqueira@amd.com, sunpeng.li@amd.com, tzimmermann@suse.de, Xinhui.Pan@amd.com, DRI Development , amd-gfx@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: [RFC 9/9] drm: rcar-du: crtc: Enable 3D LUT Date: Wed, 21 Jun 2023 10:10:31 +0200 Message-Id: <20230621081031.7876-10-jacopo.mondi@ideasonboard.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> References: <20230621081031.7876-1-jacopo.mondi@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Enable the 3D LUT in rcar_du_crtc by first creating a property for the supported 3d lut modes and by calling the drm_crtc_enable_lut3d() helper. Signed-off-by: Jacopo Mondi --- drivers/gpu/drm/rcar-du/rcar_cmm.h | 14 ++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 23 +++++++++++++++++++++-- 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_cmm.h b/drivers/gpu/drm/rcar-du/rcar_cmm.h index 277b9e4d9cc4..eed9e480a96f 100644 --- a/drivers/gpu/drm/rcar-du/rcar_cmm.h +++ b/drivers/gpu/drm/rcar-du/rcar_cmm.h @@ -8,6 +8,8 @@ #ifndef __RCAR_CMM_H__ #define __RCAR_CMM_H__ +#include + #define CM2_LUT_SIZE 256 #define CM2_CLU_SIZE (17 * 17 * 17) @@ -43,6 +45,16 @@ void rcar_cmm_disable(struct platform_device *pdev); int rcar_cmm_setup(struct platform_device *pdev, const struct rcar_cmm_config *config); + +static const struct drm_mode_lut3d_mode rcar_cmm_3dlut_modes[] = { + { + .lut_size = 17, + .lut_stride = {17, 17, 17}, + .bit_depth = 8, + .color_format = DRM_FORMAT_XRGB16161616, + .flags = 0, + }, +}; #else static inline int rcar_cmm_init(struct platform_device *pdev) { @@ -63,6 +75,8 @@ static inline int rcar_cmm_setup(struct platform_device *pdev, { return 0; } + +static const struct drm_mode_lut3d_mode rcar_cmm_3dlut_modes[] = { }; #endif /* IS_ENABLED(CONFIG_DRM_RCAR_CMM) */ #endif /* __RCAR_CMM_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 895a23161f7b..126083d226d2 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -571,6 +571,24 @@ static void rcar_du_cmm_setup(struct rcar_du_crtc *rcrtc, rcar_cmm_setup(rcrtc->cmm, &cmm_config); } +static int rcar_du_cmm_enable_color_mgmt(struct rcar_du_crtc *rcrtc) +{ + struct drm_crtc *crtc = &rcrtc->crtc; + int ret; + + drm_mode_crtc_set_gamma_size(crtc, CM2_LUT_SIZE); + drm_crtc_enable_color_mgmt(crtc, 0, false, CM2_LUT_SIZE); + + ret = drm_crtc_create_lut3d_mode_property(crtc, rcar_cmm_3dlut_modes, + ARRAY_SIZE(rcar_cmm_3dlut_modes)); + if (ret) + return ret; + + drm_crtc_enable_lut3d(crtc, 0); + + return 0; +} + /* ----------------------------------------------------------------------------- * Start/Stop and Suspend/Resume */ @@ -1355,8 +1373,9 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, rcrtc->cmm = rcdu->cmms[swindex]; rgrp->cmms_mask |= BIT(hwindex % 2); - drm_mode_crtc_set_gamma_size(crtc, CM2_LUT_SIZE); - drm_crtc_enable_color_mgmt(crtc, 0, false, CM2_LUT_SIZE); + ret = rcar_du_cmm_enable_color_mgmt(rcrtc); + if (ret) + return ret; } drm_crtc_helper_add(crtc, &crtc_helper_funcs);