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[93.34.93.173]) by smtp.googlemail.com with ESMTPSA id o6-20020a05600c378600b003f9c0a7c6bcsm3977773wmr.0.2023.06.22.05.09.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 05:09:40 -0700 (PDT) From: Christian Marangi To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Christian Marangi , Pavel Machek , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH] net: dsa: qca8k: add support for additional modes for netdev trigger Date: Wed, 21 Jun 2023 11:54:09 +0200 Message-Id: <20230621095409.25859-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DATE_IN_PAST_24_48, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org The QCA8K switch supports additional modes that can be handled in hardware for the LED netdev trigger. Add these additional modes to further support the Switch LEDs and offload more blink modes. Add additional modes: - link_10 - link_100 - link_1000 - half_duplex - full_duplex Signed-off-by: Christian Marangi Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- drivers/net/dsa/qca/qca8k-leds.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/net/dsa/qca/qca8k-leds.c b/drivers/net/dsa/qca/qca8k-leds.c index 6f02029b454b..1261e0bb21ef 100644 --- a/drivers/net/dsa/qca/qca8k-leds.c +++ b/drivers/net/dsa/qca/qca8k-leds.c @@ -68,6 +68,16 @@ qca8k_parse_netdev(unsigned long rules, u32 *offload_trigger) *offload_trigger |= QCA8K_LED_TX_BLINK_MASK; if (test_bit(TRIGGER_NETDEV_RX, &rules)) *offload_trigger |= QCA8K_LED_RX_BLINK_MASK; + if (test_bit(TRIGGER_NETDEV_LINK_10, &rules)) + *offload_trigger |= QCA8K_LED_LINK_10M_EN_MASK; + if (test_bit(TRIGGER_NETDEV_LINK_100, &rules)) + *offload_trigger |= QCA8K_LED_LINK_100M_EN_MASK; + if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules)) + *offload_trigger |= QCA8K_LED_LINK_1000M_EN_MASK; + if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &rules)) + *offload_trigger |= QCA8K_LED_HALF_DUPLEX_MASK; + if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &rules)) + *offload_trigger |= QCA8K_LED_FULL_DUPLEX_MASK; if (rules && !*offload_trigger) return -EOPNOTSUPP; @@ -322,6 +332,16 @@ qca8k_cled_hw_control_get(struct led_classdev *ldev, unsigned long *rules) set_bit(TRIGGER_NETDEV_TX, rules); if (val & QCA8K_LED_RX_BLINK_MASK) set_bit(TRIGGER_NETDEV_RX, rules); + if (val & QCA8K_LED_LINK_10M_EN_MASK) + set_bit(TRIGGER_NETDEV_LINK_10, rules); + if (val & QCA8K_LED_LINK_100M_EN_MASK) + set_bit(TRIGGER_NETDEV_LINK_100, rules); + if (val & QCA8K_LED_LINK_1000M_EN_MASK) + set_bit(TRIGGER_NETDEV_LINK_1000, rules); + if (val & QCA8K_LED_HALF_DUPLEX_MASK) + set_bit(TRIGGER_NETDEV_HALF_DUPLEX, rules); + if (val & QCA8K_LED_FULL_DUPLEX_MASK) + set_bit(TRIGGER_NETDEV_FULL_DUPLEX, rules); return 0; }