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PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600110)(711020)(4605077)(2017052603328)(7153060)(7193020); SRVR:DM6PR01MB5516; x-ms-traffictypediagnostic: DM6PR01MB5516: x-microsoft-antispam-prvs: x-forefront-prvs: 0939529DE2 x-forefront-antispam-report: SFV:NSPM; SFS:(10019020)(396003)(346002)(39840400004)(366004)(376002)(136003)(189003)(199004)(6512007)(186003)(99286004)(86362001)(8936002)(50226002)(1076003)(102836004)(6506007)(386003)(52116002)(3846002)(6116002)(53936002)(7736002)(305945005)(107886003)(54906003)(110136005)(316002)(2906002)(8676002)(81166006)(81156014)(66066001)(25786009)(4326008)(97736004)(14454004)(68736007)(478600001)(105586002)(486006)(106356001)(6486002)(71200400001)(71190400001)(476003)(2616005)(2501003)(256004)(26005)(14444005)(6436002); DIR:OUT; SFP:1102; SCL:1; SRVR:DM6PR01MB5516; H:DM6PR01MB4825.prod.exchangelabs.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:0; received-spf: None (protection.outlook.com: os.amperecomputing.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: ja0801I01Qdrk+iLIFgvfrEyCHIHBMK+tWVWw57DTxs1axmBRrwJRPmk02hU1SrJo3n0EXMbO2jzXeq2HBThCDmtPpAwyYGOFwyzU9j5GCU0mGugIG6n+V8T2c8cjGu6bCvYiDAf/AcAqOFe2Hssg3lDa1sVB+zgRQVq3O0iN7sKC30a7I6antQHTxImuIzZRIomsXpXlBq1dVbwXjDH9KbGKOI8+cUl0Iy+nbizIC/rup/Q+4kwqwQZ25gbC12NYhnjXI2rSuh7stD2NZVGx+j4NAO1CxmT/sR80Lb4epjP+kKdE8Ht3w0VUq1iyZT68VMRu13KYwUNHveL9EDeDdaXWQySML7alk+hYq0V35xiuWa11/Va6UY7oCJrhd0N2n5s042SNW7tcHjSu8Oq88F6Swoh7sz/g84ZeWByaBc= MIME-Version: 1.0 X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3a425313-9c7b-4e1e-5bf0-08d68b710e0a X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Feb 2019 13:51:39.6534 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR01MB5516 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.71.134 Subject: [Qemu-devel] [PATCH] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aaron Lindsay OS , "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This bug was introduced in: commit 5ecdd3e47cadae83a62dc92b472f1fe163b56f59 target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Signed-off-by: Aaron Lindsay Reported-by: Laurent Desnogues Reviewed-by: Laurent Desnogues --- target/arm/helper.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index d070879894..ec2d17093c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5855,25 +5855,25 @@ void register_cp_regs_for_features(ARMCPU *cpu) char *pmevtyper_name = g_strdup_printf("PMEVTYPER%d", i); char *pmevtyper_el0_name = g_strdup_printf("PMEVTYPER%d_EL0", i); ARMCPRegInfo pmev_regs[] = { - { .name = pmevcntr_name, .cp = 15, .crn = 15, + { .name = pmevcntr_name, .cp = 15, .crn = 14, .crm = 8 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7, .access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS, .readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn, .accessfn = pmreg_access }, { .name = pmevcntr_el0_name, .state = ARM_CP_STATE_AA64, - .opc0 = 3, .opc1 = 3, .crn = 15, .crm = 8 | (3 & (i >> 3)), + .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 8 | (3 & (i >> 3)), .opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access, .type = ARM_CP_IO, .readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn, .raw_readfn = pmevcntr_rawread, .raw_writefn = pmevcntr_rawwrite }, - { .name = pmevtyper_name, .cp = 15, .crn = 15, + { .name = pmevtyper_name, .cp = 15, .crn = 14, .crm = 12 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7, .access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS, .readfn = pmevtyper_readfn, .writefn = pmevtyper_writefn, .accessfn = pmreg_access }, { .name = pmevtyper_el0_name, .state = ARM_CP_STATE_AA64, - .opc0 = 3, .opc1 = 3, .crn = 15, .crm = 12 | (3 & (i >> 3)), + .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 12 | (3 & (i >> 3)), .opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access, .type = ARM_CP_IO, .readfn = pmevtyper_readfn, .writefn = pmevtyper_writefn,