From patchwork Fri Jun 23 13:43:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 486EAEB64DD for ; Fri, 23 Jun 2023 13:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231714AbjFWNoO (ORCPT ); Fri, 23 Jun 2023 09:44:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231702AbjFWNoN (ORCPT ); Fri, 23 Jun 2023 09:44:13 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 977FC1FE1; Fri, 23 Jun 2023 06:44:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527847; bh=UGMkiVgsD7TmU72TjAy44icKsVdzIhU52JRB8B10DPk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PcH2WS3OQnYbVLadIOb2aA7NaJzM1CB241KBf3vck8CD5g2ivzEZrZd+gVBR0wT7I zqh009KFH0f3bNRIVh7t6ZFIpCl9QH5oeRwygko6A9aTpZyC3+kIeK/h1c2Z4fONGP lj7Boe7rZ35pwtETS/alsxsKCSKIPwFo065hZP34= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id E2D386015C; Fri, 23 Jun 2023 21:44:06 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 1/9] LoongArch: Calculate various sizes in the linker script Date: Fri, 23 Jun 2023 21:43:43 +0800 Message-Id: <20230623134351.1898379-2-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Rui Taking the address delta between symbols in different sections is not supported by the LLVM IAS. Instead, do this in the linker script, so the same data can be properly referenced in assembly. Signed-off-by: WANG Rui Signed-off-by: WANG Xuerui --- arch/loongarch/kernel/efi-header.S | 6 +++--- arch/loongarch/kernel/head.S | 8 ++++---- arch/loongarch/kernel/vmlinux.lds.S | 7 +++++++ 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/loongarch/kernel/efi-header.S b/arch/loongarch/kernel/efi-header.S index 8c1d229a2afa..5f23b85d78ca 100644 --- a/arch/loongarch/kernel/efi-header.S +++ b/arch/loongarch/kernel/efi-header.S @@ -24,7 +24,7 @@ .byte 0x02 /* MajorLinkerVersion */ .byte 0x14 /* MinorLinkerVersion */ .long __inittext_end - .Lefi_header_end /* SizeOfCode */ - .long _end - __initdata_begin /* SizeOfInitializedData */ + .long _kernel_vsize /* SizeOfInitializedData */ .long 0 /* SizeOfUninitializedData */ .long __efistub_efi_pe_entry - _head /* AddressOfEntryPoint */ .long .Lefi_header_end - _head /* BaseOfCode */ @@ -79,9 +79,9 @@ IMAGE_SCN_MEM_EXECUTE /* Characteristics */ .ascii ".data\0\0\0" - .long _end - __initdata_begin /* VirtualSize */ + .long _kernel_vsize /* VirtualSize */ .long __initdata_begin - _head /* VirtualAddress */ - .long _edata - __initdata_begin /* SizeOfRawData */ + .long _kernel_rsize /* SizeOfRawData */ .long __initdata_begin - _head /* PointerToRawData */ .long 0 /* PointerToRelocations */ diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S index 0d8180153ec0..53b883db0786 100644 --- a/arch/loongarch/kernel/head.S +++ b/arch/loongarch/kernel/head.S @@ -23,7 +23,7 @@ _head: .word MZ_MAGIC /* "MZ", MS-DOS header */ .org 0x8 .dword kernel_entry /* Kernel entry point */ - .dword _end - _text /* Kernel image effective size */ + .dword _kernel_asize /* Kernel image effective size */ .quad PHYS_LINK_KADDR /* Kernel image load offset from start of RAM */ .org 0x38 /* 0x20 ~ 0x37 reserved */ .long LINUX_PE_MAGIC @@ -32,9 +32,9 @@ _head: pe_header: __EFI_PE_HEADER -SYM_DATA(kernel_asize, .long _end - _text); -SYM_DATA(kernel_fsize, .long _edata - _text); -SYM_DATA(kernel_offset, .long kernel_offset - _text); +SYM_DATA(kernel_asize, .long _kernel_asize); +SYM_DATA(kernel_fsize, .long _kernel_fsize); +SYM_DATA(kernel_offset, .long _kernel_offset); #endif diff --git a/arch/loongarch/kernel/vmlinux.lds.S b/arch/loongarch/kernel/vmlinux.lds.S index 0c7b041be9d8..79f238df029e 100644 --- a/arch/loongarch/kernel/vmlinux.lds.S +++ b/arch/loongarch/kernel/vmlinux.lds.S @@ -136,6 +136,13 @@ SECTIONS DWARF_DEBUG ELF_DETAILS + /* header symbols */ + _kernel_asize = _end - _text; + _kernel_fsize = _edata - _text; + _kernel_offset = kernel_offset - _text; + _kernel_vsize = _end - __initdata_begin; + _kernel_rsize = _edata - __initdata_begin; + .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) From patchwork Fri Jun 23 13:43:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AC99C0015E for ; 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Fri, 23 Jun 2023 21:44:08 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 2/9] LoongArch: extable: Also recognize ABI names of registers Date: Fri, 23 Jun 2023 21:43:44 +0800 Message-Id: <20230623134351.1898379-3-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Rui When the kernel is compiled with LLVM, the register names being handled during exception fixup building are ABI names instead of bare $rNN style. Add mapping for the ABI names for LLVM compatibility. Signed-off-by: WANG Rui Signed-off-by: WANG Xuerui --- arch/loongarch/include/asm/gpr-num.h | 30 ++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/loongarch/include/asm/gpr-num.h b/arch/loongarch/include/asm/gpr-num.h index e0941af20c7e..996038da806d 100644 --- a/arch/loongarch/include/asm/gpr-num.h +++ b/arch/loongarch/include/asm/gpr-num.h @@ -9,6 +9,22 @@ .equ .L__gpr_num_$r\num, \num .endr + /* ABI names of registers */ + .equ .L__gpr_num_$ra, 1 + .equ .L__gpr_num_$tp, 2 + .equ .L__gpr_num_$sp, 3 + .irp num,0,1,2,3,4,5,6,7 + .equ .L__gpr_num_$a\num, 4 + \num + .endr + .irp num,0,1,2,3,4,5,6,7,8 + .equ .L__gpr_num_$t\num, 12 + \num + .endr + .equ .L__gpr_num_$s9, 22 + .equ .L__gpr_num_$fp, 22 + .irp num,0,1,2,3,4,5,6,7,8 + .equ .L__gpr_num_$s\num, 23 + \num + .endr + #else /* __ASSEMBLY__ */ #define __DEFINE_ASM_GPR_NUMS \ @@ -16,6 +32,20 @@ " .irp num,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31\n" \ " .equ .L__gpr_num_$r\\num, \\num\n" \ " .endr\n" \ +" .equ .L__gpr_num_$ra, 1\n" \ +" .equ .L__gpr_num_$tp, 2\n" \ +" .equ .L__gpr_num_$sp, 3\n" \ +" .irp num,0,1,2,3,4,5,6,7\n" \ +" .equ .L__gpr_num_$a\\num, 4 + \\num\n" \ +" .endr\n" \ +" .irp num,0,1,2,3,4,5,6,7,8\n" \ +" .equ .L__gpr_num_$t\\num, 12 + \\num\n" \ +" .endr\n" \ +" .equ .L__gpr_num_$s9, 22\n" \ +" .equ .L__gpr_num_$fp, 22\n" \ +" .irp num,0,1,2,3,4,5,6,7,8\n" \ +" .equ .L__gpr_num_$s\\num, 23 + \\num\n" \ +" .endr\n" \ #endif /* __ASSEMBLY__ */ From patchwork Fri Jun 23 13:43:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8A2FC001B3 for ; Fri, 23 Jun 2023 13:44:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231716AbjFWNoP (ORCPT ); Fri, 23 Jun 2023 09:44:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229647AbjFWNoN (ORCPT ); Fri, 23 Jun 2023 09:44:13 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B75FA2688; Fri, 23 Jun 2023 06:44:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527850; bh=I9sBWXJarUacmT9tJVRaaV9L2voiD3I9Gx59y+JU7NY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FnGl2zpNJcTOSoS6xm5nWi8rAtAahvSAYEgKmfK0DBi0WiLoKBbB/7sBsR7XOPXo+ P2ZfadFDDkDGkOQDEgdxm1y5Ur8ETZRC959WDAeAFuKU3PPeu8fuhMgcKZ+Jr094S/ i+oScUM/oUUXFDKK/KJq+8/OapsFgD+h+JjF4tu8= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 7E1EC605E0; Fri, 23 Jun 2023 21:44:10 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 3/9] LoongArch: Prepare for assemblers with proper FCSR bank support Date: Fri, 23 Jun 2023 21:43:45 +0800 Message-Id: <20230623134351.1898379-4-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui The GNU assembler (as of 2.40) mis-treats FCSR operands as GPRs, but the LLVM IAS does not. Probe for this and refer to FCSRs as "$fcsrNN" if support is present. Signed-off-by: WANG Xuerui --- arch/loongarch/Kconfig | 3 +++ arch/loongarch/include/asm/fpregdef.h | 7 +++++++ 2 files changed, 10 insertions(+) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index 743d87655742..c8e4f8b03c55 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -242,6 +242,9 @@ config SCHED_OMIT_FRAME_POINTER config AS_HAS_EXPLICIT_RELOCS def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x)) +config AS_HAS_FCSR_BANK + def_bool $(as-instr,x:movfcsr2gr \$t0$(comma)\$fcsr0) + config CC_HAS_LSX_EXTENSION def_bool $(cc-option,-mlsx) diff --git a/arch/loongarch/include/asm/fpregdef.h b/arch/loongarch/include/asm/fpregdef.h index b6be527831dd..b0ac640db74c 100644 --- a/arch/loongarch/include/asm/fpregdef.h +++ b/arch/loongarch/include/asm/fpregdef.h @@ -40,6 +40,12 @@ #define fs6 $f30 #define fs7 $f31 +#ifdef CONFIG_AS_HAS_FCSR_BANK +#define fcsr0 $fcsr0 +#define fcsr1 $fcsr1 +#define fcsr2 $fcsr2 +#define fcsr3 $fcsr3 +#else /* * Current binutils expects *GPRs* at FCSR position for the FCSR * operation instructions, so define aliases for those used. @@ -48,5 +54,6 @@ #define fcsr1 $r1 #define fcsr2 $r2 #define fcsr3 $r3 +#endif #endif /* _ASM_FPREGDEF_H */ From patchwork Fri Jun 23 13:43:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290616 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABA49EB64D7 for ; Fri, 23 Jun 2023 13:44:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231755AbjFWNoS (ORCPT ); Fri, 23 Jun 2023 09:44:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231721AbjFWNoP (ORCPT ); Fri, 23 Jun 2023 09:44:15 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2BBA1FE1; Fri, 23 Jun 2023 06:44:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527852; bh=ZJI78+EPNTp82LSUythHTSjkLEKJnQKH+YZh2u1h6f4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OHJr2KhxCtSIMq1CF71GM745UnDdJH35CzRxq05bJNeYqqiBxqkZM3Pqgnyfgzp57 48tFm3jhTJiqAXRbaYE4Ny3ySfX14KOqMQHMlS8OkRQ6ii/oLkoI72b6PLK7ynma/N hC2VOT3XAiAmNsw44ev5GL9UbmBDQZvovPjQRuFA= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 3B330605E5; Fri, 23 Jun 2023 21:44:12 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 4/9] LoongArch: Make {read,write}_fcsr compatible with LLVM/Clang Date: Fri, 23 Jun 2023 21:43:46 +0800 Message-Id: <20230623134351.1898379-5-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui LLVM/Clang does not see FCSRs as GPRs, so make use of compiler built-ins instead for better maintainability with less code. The existing version cannot be wholly removed though, because the built-ins, while available on GCC too, is predicated TARGET_HARD_FLOAT, which means soft-float code cannot make use of them. Signed-off-by: WANG Xuerui --- arch/loongarch/include/asm/loongarch.h | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h index ac83e60c60d1..eedc313b5241 100644 --- a/arch/loongarch/include/asm/loongarch.h +++ b/arch/loongarch/include/asm/loongarch.h @@ -1445,12 +1445,6 @@ __BUILD_CSR_OP(tlbidx) #define EXCCODE_INT_START 64 #define EXCCODE_INT_END (EXCCODE_INT_START + EXCCODE_INT_NUM - 1) -/* FPU register names */ -#define LOONGARCH_FCSR0 $r0 -#define LOONGARCH_FCSR1 $r1 -#define LOONGARCH_FCSR2 $r2 -#define LOONGARCH_FCSR3 $r3 - /* FPU Status Register Values */ #define FPU_CSR_RSVD 0xe0e0fce0 @@ -1487,6 +1481,18 @@ __BUILD_CSR_OP(tlbidx) #define FPU_CSR_RU 0x200 /* towards +Infinity */ #define FPU_CSR_RD 0x300 /* towards -Infinity */ +#ifdef CONFIG_CC_IS_CLANG +#define LOONGARCH_FCSR0 0 +#define LOONGARCH_FCSR1 1 +#define LOONGARCH_FCSR2 2 +#define LOONGARCH_FCSR3 3 +#define read_fcsr(source) __movfcsr2gr(source) +#define write_fcsr(dest, val) __movgr2fcsr(dest, val) +#else /* CONFIG_CC_IS_CLANG */ +#define LOONGARCH_FCSR0 $r0 +#define LOONGARCH_FCSR1 $r1 +#define LOONGARCH_FCSR2 $r2 +#define LOONGARCH_FCSR3 $r3 #define read_fcsr(source) \ ({ \ unsigned int __res; \ @@ -1503,5 +1509,6 @@ do { \ " movgr2fcsr "__stringify(dest)", %0 \n" \ : : "r" (val)); \ } while (0) +#endif /* CONFIG_CC_IS_CLANG */ #endif /* _ASM_LOONGARCH_H */ From patchwork Fri Jun 23 13:43:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC95EEB64DD for ; Fri, 23 Jun 2023 13:44:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231765AbjFWNoT (ORCPT ); Fri, 23 Jun 2023 09:44:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231741AbjFWNoR (ORCPT ); Fri, 23 Jun 2023 09:44:17 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F9FB2688; Fri, 23 Jun 2023 06:44:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527854; bh=f229IMk1VGwaw6gXKR4ZAc7KUbCMX+zZ6jBZnAgNAOw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KmjEtvxfkVSF1PlCvSl4Seu/B50grA2znwPUjFrTHo5M3sdF9FjBxq3OzD8UPDI41 Iw6z2D2z8ZMoWcgC0DhxoHy19Noq413ynpO4fSWSloGcJu5TOBaIoG9pbL1ZuIqcy0 S3ErX7s1Ix2kijT0OvJ7e5NRZAI0CfudlqnSzbS8= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 85392605E8; Fri, 23 Jun 2023 21:44:13 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 5/9] LoongArch: Make the CPUCFG and CSR ops simple aliases of compiler built-ins Date: Fri, 23 Jun 2023 21:43:47 +0800 Message-Id: <20230623134351.1898379-6-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui In addition to less visual clutter, this also makes Clang happy regarding the const-ness of arguments. In the original approach, all Clang gets to see is the incoming arguments whose const-ness cannot be proven without first being inlined; so Clang errors out here while GCC is fine. While at it, tweak several printk format strings because the return type of csr_read64 becomes effectively unsigned long, instead of unsigned long long, Signed-off-by: WANG Xuerui --- arch/loongarch/include/asm/loongarch.h | 63 +++++--------------------- arch/loongarch/kernel/traps.c | 2 +- arch/loongarch/lib/dump_tlb.c | 6 +-- 3 files changed, 15 insertions(+), 56 deletions(-) diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h index eedc313b5241..c2a6f698a3af 100644 --- a/arch/loongarch/include/asm/loongarch.h +++ b/arch/loongarch/include/asm/loongarch.h @@ -56,10 +56,7 @@ __asm__(".macro parse_r var r\n\t" #undef _IFC_REG /* CPUCFG */ -static inline u32 read_cpucfg(u32 reg) -{ - return __cpucfg(reg); -} +#define read_cpucfg(reg) __cpucfg(reg) #endif /* !__ASSEMBLY__ */ @@ -207,56 +204,18 @@ static inline u32 read_cpucfg(u32 reg) #ifndef __ASSEMBLY__ /* CSR */ -static __always_inline u32 csr_read32(u32 reg) -{ - return __csrrd_w(reg); -} - -static __always_inline u64 csr_read64(u32 reg) -{ - return __csrrd_d(reg); -} - -static __always_inline void csr_write32(u32 val, u32 reg) -{ - __csrwr_w(val, reg); -} - -static __always_inline void csr_write64(u64 val, u32 reg) -{ - __csrwr_d(val, reg); -} - -static __always_inline u32 csr_xchg32(u32 val, u32 mask, u32 reg) -{ - return __csrxchg_w(val, mask, reg); -} - -static __always_inline u64 csr_xchg64(u64 val, u64 mask, u32 reg) -{ - return __csrxchg_d(val, mask, reg); -} +#define csr_read32(reg) __csrrd_w(reg) +#define csr_read64(reg) __csrrd_d(reg) +#define csr_write32(val, reg) __csrwr_w(val, reg) +#define csr_write64(val, reg) __csrwr_d(val, reg) +#define csr_xchg32(val, mask, reg) __csrxchg_w(val, mask, reg) +#define csr_xchg64(val, mask, reg) __csrxchg_d(val, mask, reg) /* IOCSR */ -static __always_inline u32 iocsr_read32(u32 reg) -{ - return __iocsrrd_w(reg); -} - -static __always_inline u64 iocsr_read64(u32 reg) -{ - return __iocsrrd_d(reg); -} - -static __always_inline void iocsr_write32(u32 val, u32 reg) -{ - __iocsrwr_w(val, reg); -} - -static __always_inline void iocsr_write64(u64 val, u32 reg) -{ - __iocsrwr_d(val, reg); -} +#define iocsr_read32(reg) __iocsrrd_w(reg) +#define iocsr_read64(reg) __iocsrrd_d(reg) +#define iocsr_write32(val, reg) __iocsrwr_w(val, reg) +#define iocsr_write64(val, reg) __iocsrwr_d(val, reg) #endif /* !__ASSEMBLY__ */ diff --git a/arch/loongarch/kernel/traps.c b/arch/loongarch/kernel/traps.c index 22179cf6f33c..8fb5e7a77145 100644 --- a/arch/loongarch/kernel/traps.c +++ b/arch/loongarch/kernel/traps.c @@ -999,7 +999,7 @@ asmlinkage void cache_parity_error(void) /* For the moment, report the problem and hang. */ pr_err("Cache error exception:\n"); pr_err("csr_merrctl == %08x\n", csr_read32(LOONGARCH_CSR_MERRCTL)); - pr_err("csr_merrera == %016llx\n", csr_read64(LOONGARCH_CSR_MERRERA)); + pr_err("csr_merrera == %016lx\n", csr_read64(LOONGARCH_CSR_MERRERA)); panic("Can't handle the cache error!"); } diff --git a/arch/loongarch/lib/dump_tlb.c b/arch/loongarch/lib/dump_tlb.c index c2cc7ce343c9..0b886a6e260f 100644 --- a/arch/loongarch/lib/dump_tlb.c +++ b/arch/loongarch/lib/dump_tlb.c @@ -20,9 +20,9 @@ void dump_tlb_regs(void) pr_info("Index : 0x%0x\n", read_csr_tlbidx()); pr_info("PageSize : 0x%0x\n", read_csr_pagesize()); - pr_info("EntryHi : 0x%0*llx\n", field, read_csr_entryhi()); - pr_info("EntryLo0 : 0x%0*llx\n", field, read_csr_entrylo0()); - pr_info("EntryLo1 : 0x%0*llx\n", field, read_csr_entrylo1()); + pr_info("EntryHi : 0x%0*lx\n", field, read_csr_entryhi()); + pr_info("EntryLo0 : 0x%0*lx\n", field, read_csr_entrylo0()); + pr_info("EntryLo1 : 0x%0*lx\n", field, read_csr_entrylo1()); } static void dump_tlb(int first, int last) From patchwork Fri Jun 23 13:43:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290619 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26E2EEB64DD for ; Fri, 23 Jun 2023 13:44:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231855AbjFWNo0 (ORCPT ); Fri, 23 Jun 2023 09:44:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231758AbjFWNoT (ORCPT ); Fri, 23 Jun 2023 09:44:19 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADC882697; Fri, 23 Jun 2023 06:44:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527855; bh=IRnQjd+50zNSbl5gfok3N2S0Jg+9Z4fkKrrLulCYgAU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jBYwNFvAZtvh5weJO87WvoPnD0vpgGxNBYxenSAK4gnQ9KmrG3BnzhhnkWqMKoKgb vb0Yqr0llRUyT+De4OoHeaQTyWD4tdaWBYRB+S3XVp7H/rgy17Rt2BnBhce+lGAiJv ksfdcKBmIXr/whec8cjaLK0fSsArdAEyhi0wdRzw= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id BEC90605EB; Fri, 23 Jun 2023 21:44:14 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 6/9] LoongArch: Simplify the invtlb wrappers Date: Fri, 23 Jun 2023 21:43:48 +0800 Message-Id: <20230623134351.1898379-7-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui Of the 3 existing invtlb wrappers, invtlb_info is not used at all, so it is removed; invtlb_all and invtlb_addr have their unused argument(s) removed from their signatures. Also, the invtlb instruction has been supported by upstream LoongArch toolchains from day one, so ditch the raw opcode trickery and just use plain inline asm for it. Signed-off-by: WANG Xuerui --- arch/loongarch/include/asm/tlb.h | 45 ++++++++++++-------------------- arch/loongarch/mm/tlb.c | 10 +++---- 2 files changed, 21 insertions(+), 34 deletions(-) diff --git a/arch/loongarch/include/asm/tlb.h b/arch/loongarch/include/asm/tlb.h index 0dc9ee2b05d2..5e6ee9a15f0f 100644 --- a/arch/loongarch/include/asm/tlb.h +++ b/arch/loongarch/include/asm/tlb.h @@ -88,52 +88,39 @@ enum invtlb_ops { INVTLB_GID_ADDR = 0x16, }; -/* - * invtlb op info addr - * (0x1 << 26) | (0x24 << 20) | (0x13 << 15) | - * (addr << 10) | (info << 5) | op - */ static inline void invtlb(u32 op, u32 info, u64 addr) { __asm__ __volatile__( - "parse_r addr,%0\n\t" - "parse_r info,%1\n\t" - ".word ((0x6498000) | (addr << 10) | (info << 5) | %2)\n\t" - : - : "r"(addr), "r"(info), "i"(op) - : - ); -} - -static inline void invtlb_addr(u32 op, u32 info, u64 addr) -{ - __asm__ __volatile__( - "parse_r addr,%0\n\t" - ".word ((0x6498000) | (addr << 10) | (0 << 5) | %1)\n\t" - : - : "r"(addr), "i"(op) + "invtlb %0, %1, %2\n\t" : + : "i"(op), "r"(info), "r"(addr) + : "memory" ); } -static inline void invtlb_info(u32 op, u32 info, u64 addr) +static inline void invtlb_addr(u32 op, u64 addr) { + /* + * The ISA manual says $zero shall be used in case a particular op + * does not take the respective argument, hence the invtlb helper is + * not re-used to make sure this is the case. + */ __asm__ __volatile__( - "parse_r info,%0\n\t" - ".word ((0x6498000) | (0 << 10) | (info << 5) | %1)\n\t" - : - : "r"(info), "i"(op) + "invtlb %0, $zero, %1\n\t" : + : "i"(op), "r"(addr) + : "memory" ); } -static inline void invtlb_all(u32 op, u32 info, u64 addr) +static inline void invtlb_all(u32 op) { + /* Similar to invtlb_addr, ensure the operands are actually $zero. */ __asm__ __volatile__( - ".word ((0x6498000) | (0 << 10) | (0 << 5) | %0)\n\t" + "invtlb %0, $zero, $zero\n\t" : : "i"(op) - : + : "memory" ); } diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c index 00bb563e3c89..de04d2624ef4 100644 --- a/arch/loongarch/mm/tlb.c +++ b/arch/loongarch/mm/tlb.c @@ -17,19 +17,19 @@ void local_flush_tlb_all(void) { - invtlb_all(INVTLB_CURRENT_ALL, 0, 0); + invtlb_all(INVTLB_CURRENT_ALL); } EXPORT_SYMBOL(local_flush_tlb_all); void local_flush_tlb_user(void) { - invtlb_all(INVTLB_CURRENT_GFALSE, 0, 0); + invtlb_all(INVTLB_CURRENT_GFALSE); } EXPORT_SYMBOL(local_flush_tlb_user); void local_flush_tlb_kernel(void) { - invtlb_all(INVTLB_CURRENT_GTRUE, 0, 0); + invtlb_all(INVTLB_CURRENT_GTRUE); } EXPORT_SYMBOL(local_flush_tlb_kernel); @@ -100,7 +100,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) end &= (PAGE_MASK << 1); while (start < end) { - invtlb_addr(INVTLB_ADDR_GTRUE_OR_ASID, 0, start); + invtlb_addr(INVTLB_ADDR_GTRUE_OR_ASID, start); start += (PAGE_SIZE << 1); } } else { @@ -131,7 +131,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) void local_flush_tlb_one(unsigned long page) { page &= (PAGE_MASK << 1); - invtlb_addr(INVTLB_ADDR_GTRUE_OR_ASID, 0, page); + invtlb_addr(INVTLB_ADDR_GTRUE_OR_ASID, page); } static void __update_hugetlb(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) From patchwork Fri Jun 23 13:43:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290618 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07712C0015E for ; Fri, 23 Jun 2023 13:44:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231829AbjFWNoZ (ORCPT ); Fri, 23 Jun 2023 09:44:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231757AbjFWNoT (ORCPT ); Fri, 23 Jun 2023 09:44:19 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A7862696; Fri, 23 Jun 2023 06:44:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527855; bh=gdMT1VPu7/T52oiYEqx+LXNHcCWHe7wIMOjlRAhlRp4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LbZUAwOBMJDqn53dBYM6vkJk0QzMOlZIpO4XkyKJcp3LLA9UYdeAm4QO5NmZ7Hg3B Vt+LbbPcmhvdXLiI0FkO/5nhUEIBUWVSEtSRRIdYOwWk112ZSFfz99lXjB22Kxq1Fl /y4el0HPuzUO6cB2bR4t3fQdnRceT87sRecquOAw= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id AC758605F4; Fri, 23 Jun 2023 21:44:15 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 7/9] LoongArch: Tweak CFLAGS for Clang compatibility Date: Fri, 23 Jun 2023 21:43:49 +0800 Message-Id: <20230623134351.1898379-8-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui Now the arch code is mostly ready for LLVM/Clang consumption, it is time to re-organize the CFLAGS a little to actually enable the LLVM build. A build with !RELOCATABLE && !MODULE is confirmed working within a QEMU environment; support for the two features are currently blocked by LLVM/Clang, and will come later. Signed-off-by: WANG Xuerui --- arch/loongarch/Makefile | 14 +++++++++++--- arch/loongarch/vdso/Makefile | 6 +++++- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/arch/loongarch/Makefile b/arch/loongarch/Makefile index a27e264bdaa5..efe9b50bd829 100644 --- a/arch/loongarch/Makefile +++ b/arch/loongarch/Makefile @@ -46,12 +46,18 @@ ld-emul = $(64bit-emul) cflags-y += -mabi=lp64s endif -cflags-y += -G0 -pipe -msoft-float -LDFLAGS_vmlinux += -G0 -static -n -nostdlib +ifndef CONFIG_CC_IS_CLANG +cflags-y += -G0 +LDFLAGS_vmlinux += -G0 +endif +cflags-y += -pipe +LDFLAGS_vmlinux += -static -n -nostdlib # When the assembler supports explicit relocation hint, we must use it. # GCC may have -mexplicit-relocs off by default if it was built with an old -# assembler, so we force it via an option. +# assembler, so we force it via an option. For LLVM/Clang the desired behavior +# is the default, and the flag is not supported, so don't pass it if Clang is +# being used. # # When the assembler does not supports explicit relocation hint, we can't use # it. Disable it if the compiler supports it. @@ -61,8 +67,10 @@ LDFLAGS_vmlinux += -G0 -static -n -nostdlib # combination of a "new" assembler and "old" compiler is not supported. Either # upgrade the compiler or downgrade the assembler. ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS +ifndef CONFIG_CC_IS_CLANG cflags-y += -mexplicit-relocs KBUILD_CFLAGS_KERNEL += -mdirect-extern-access +endif else cflags-y += $(call cc-option,-mno-explicit-relocs) KBUILD_AFLAGS_KERNEL += -Wa,-mla-global-with-pcrel diff --git a/arch/loongarch/vdso/Makefile b/arch/loongarch/vdso/Makefile index 4c859a0e4754..19f6c75a1106 100644 --- a/arch/loongarch/vdso/Makefile +++ b/arch/loongarch/vdso/Makefile @@ -25,13 +25,17 @@ endif cflags-vdso := $(ccflags-vdso) \ -isystem $(shell $(CC) -print-file-name=include) \ $(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \ - -O2 -g -fno-strict-aliasing -fno-common -fno-builtin -G0 \ + -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \ -fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \ $(call cc-option, -fno-asynchronous-unwind-tables) \ $(call cc-option, -fno-stack-protector) aflags-vdso := $(ccflags-vdso) \ -D__ASSEMBLY__ -Wa,-gdwarf-2 +ifndef CONFIG_CC_IS_CLANG +cflags-vdso += -G0 +endif + ifneq ($(c-gettimeofday-y),) CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y) endif From patchwork Fri Jun 23 13:43:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290620 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D56FBEB64DD for ; Fri, 23 Jun 2023 13:44:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231896AbjFWNoe (ORCPT ); Fri, 23 Jun 2023 09:44:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231767AbjFWNoT (ORCPT ); Fri, 23 Jun 2023 09:44:19 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEBAB26A0; Fri, 23 Jun 2023 06:44:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527856; bh=R+wSgT+F3wMRO69fjSeRvENEk0FsnlxB4dse3vdqbGM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rVJ1+TEL1Mzfomk4I8r6tvyT6fAVTvtqs+kZGN0mHc6VIoSy32rUJ4EEHFG0Id0SP lwsCEmzJzrEs8ZKSuOW2PzmGtVzSc6m0sAjP+8b0eM9Q68OcKb+3izIKkQo+4OMMJk lqg0CXemv+itFmqQdYx+iEQWaD1c3Cnnv6oMtSNg= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 922ED605F6; Fri, 23 Jun 2023 21:44:16 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 8/9] Makefile: Add loongarch target flag for Clang compilation Date: Fri, 23 Jun 2023 21:43:50 +0800 Message-Id: <20230623134351.1898379-9-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui The LoongArch kernel is 64-bit and built with the soft-float ABI, hence the loongarch64-linux-gnusf target. (The "libc" part doesn't matter.) Signed-off-by: WANG Xuerui Reviewed-by: Nick Desaulniers --- scripts/Makefile.clang | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/Makefile.clang b/scripts/Makefile.clang index 058a4c0f864e..6c23c6af797f 100644 --- a/scripts/Makefile.clang +++ b/scripts/Makefile.clang @@ -4,6 +4,7 @@ CLANG_TARGET_FLAGS_arm := arm-linux-gnueabi CLANG_TARGET_FLAGS_arm64 := aarch64-linux-gnu CLANG_TARGET_FLAGS_hexagon := hexagon-linux-musl +CLANG_TARGET_FLAGS_loongarch := loongarch64-linux-gnusf CLANG_TARGET_FLAGS_m68k := m68k-linux-gnu CLANG_TARGET_FLAGS_mips := mipsel-linux-gnu CLANG_TARGET_FLAGS_powerpc := powerpc64le-linux-gnu From patchwork Fri Jun 23 13:43:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WANG Xuerui X-Patchwork-Id: 13290621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBADCEB64D7 for ; Fri, 23 Jun 2023 13:44:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231682AbjFWNou (ORCPT ); Fri, 23 Jun 2023 09:44:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231881AbjFWNoe (ORCPT ); Fri, 23 Jun 2023 09:44:34 -0400 Received: from mailbox.box.xen0n.name (mail.xen0n.name [115.28.160.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CACE226BD; Fri, 23 Jun 2023 06:44:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1687527858; bh=A/+xsnM5BmDYFUpJ1w+uRG48h4f/gI8zKnMGjRgeidc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CjTUhw+2wYJEO4aFkjXMrZWLdyXKMr06aCIb9So6lhCFu6m/TZAv6HBWx8i3reXur 7UPdVIMipxJQKanw4OrOCJi5+Tg57YV8zBuIM7lHjONv3TypbpUj8BLfatdj8jWaHQ IOshJ+oGJdDY+lIF0hd7KGMVMvHgDaXA+cKI46mQ= Received: from ld50.lan (unknown [101.88.25.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id B6473605FA; Fri, 23 Jun 2023 21:44:17 +0800 (CST) From: WANG Xuerui To: Huacai Chen Cc: WANG Rui , Xi Ruoyao , loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, WANG Xuerui Subject: [PATCH 9/9] LoongArch: Mark Clang LTO as working Date: Fri, 23 Jun 2023 21:43:51 +0800 Message-Id: <20230623134351.1898379-10-kernel@xen0n.name> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230623134351.1898379-1-kernel@xen0n.name> References: <20230623134351.1898379-1-kernel@xen0n.name> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: WANG Xuerui Confirmed working with QEMU system emulation. Signed-off-by: WANG Xuerui Acked-by: Nick Desaulniers --- arch/loongarch/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index c8e4f8b03c55..7c5d562b2623 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -51,6 +51,8 @@ config LOONGARCH select ARCH_SUPPORTS_ACPI select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_SUPPORTS_HUGETLBFS + select ARCH_SUPPORTS_LTO_CLANG + select ARCH_SUPPORTS_LTO_CLANG_THIN select ARCH_SUPPORTS_NUMA_BALANCING select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_CMPXCHG_LOCKREF