From patchwork Sun Jun 25 20:48:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292191 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C15FC001B0 for ; Sun, 25 Jun 2023 20:49:46 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554872.866292 (Exim 4.92) (envelope-from ) id 1qDWfe-0002j2-Iw; Sun, 25 Jun 2023 20:49:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554872.866292; Sun, 25 Jun 2023 20:49:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfe-0002h6-Bc; Sun, 25 Jun 2023 20:49:18 +0000 Received: by outflank-mailman (input) for mailman id 554872; Sun, 25 Jun 2023 20:49:17 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfc-0002bq-Vd for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:16 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfc-0003Lu-La; Sun, 25 Jun 2023 20:49:16 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfc-00021M-DA; Sun, 25 Jun 2023 20:49:16 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=9w0nZdIHxyhiPgNJV2nNqGag3fqrurdY4W4q6aF8hO0=; b=P4wzfzxnhQFImT7ocJPK4FhQMa MB+CM/UwBTtJdUqR1QgSF0mVJR/SdxD4ai6WIaLBAXDb6mOj64aShcnNMK89Wv1D1oQic7iEdhmUG p+9uzZu7+P3STuBKaEMsloWfgVqMQDcba58XjSOjwOM9r0ZKgXS6j8ncfXmuFy4eYT20=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 1/9] xen/arm: Check Xen size when linking Date: Sun, 25 Jun 2023 21:48:59 +0100 Message-Id: <20230625204907.57291-2-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 The linker will happily link Xen if it is bigger than what we can handle (e.g 2MB). This will result to unexpected failure after boot. This unexpected failure can be prevented by forbidding linking if Xen is bigger than the area we reversed. Signed-off-by: Julien Grall Reviewed-by: Henry Wang Tested-by: Henry Wang Reviewed-by: Michal Orzel --- xen/arch/arm/xen.lds.S | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index be58c2c39514..c5d8c6201423 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -241,3 +241,4 @@ ASSERT(IS_ALIGNED(__init_begin, 4), "__init_begin is misaligned") ASSERT(IS_ALIGNED(__init_end, 4), "__init_end is misaligned") ASSERT(IS_ALIGNED(__bss_start, POINTER_ALIGN), "__bss_start is misaligned") ASSERT(IS_ALIGNED(__bss_end, POINTER_ALIGN), "__bss_end is misaligned") +ASSERT((_end - start) <= XEN_VIRT_SIZE, "Xen is too big") From patchwork Sun Jun 25 20:49:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292186 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8F09BEB64DC for ; Sun, 25 Jun 2023 20:49:38 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554873.866303 (Exim 4.92) (envelope-from ) id 1qDWff-00035x-Pk; Sun, 25 Jun 2023 20:49:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554873.866303; Sun, 25 Jun 2023 20:49:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWff-00035q-Ms; Sun, 25 Jun 2023 20:49:19 +0000 Received: by outflank-mailman (input) for mailman id 554873; Sun, 25 Jun 2023 20:49:18 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfe-0002fU-7G for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:18 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfd-0003M4-Ut; Sun, 25 Jun 2023 20:49:17 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfd-00021M-Mu; Sun, 25 Jun 2023 20:49:17 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=pIp2Ocf+duFQJxu0URFuhairXV4FCYWfRGikcKVLzqU=; b=qfck+/QFFLkk2WdsWO3K9gtgeW CUyhCCbYpAl5g7ea+HY5mE5aTKWMIldZc7meMakKcwPAC/RAL6UjxXfsMgiUZcmgTdYfyRMyPdepx ipCi91YDVkJvYWGQm9J5CF0/WU6SWZiMOvO7Y6Ke02fWhZLGaz62hTsSoc794BnUXHvA=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 2/9] xen/arm64: head: Don't map too much in boot_third Date: Sun, 25 Jun 2023 21:49:00 +0100 Message-Id: <20230625204907.57291-3-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall At the moment, we are mapping the size of the reserved area for Xen (i.e. 2MB) even if the binary is smaller. We don't exactly know what's after Xen, so it is not a good idea to map more than necessary for a couple of reasons: * We would need to use break-before-make if the extra PTE needs to be updated to point to another region * The extra area mapped may be mapped again by Xen with different memory attribute. This would result to attribue mismatch. Therefore, rework the logic in create_page_tables() to map only what's necessary. To simplify the logic, we also want to make sure _end is page-aligned. So align the symbol in the linker and add an assert to catch any change. Signed-off-by: Julien Grall Reviewed-by: Michal Orzel --- xen/arch/arm/arm64/head.S | 15 ++++++++++++++- xen/arch/arm/xen.lds.S | 3 +++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index f37133cf7ccd..66bc85d4c39e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -572,6 +572,19 @@ create_page_tables: create_table_entry boot_first, boot_second, x0, 1, x1, x2, x3 create_table_entry boot_second, boot_third, x0, 2, x1, x2, x3 + /* + * Find the size of Xen in pages and multiply by the size of a + * PTE. This will then be compared in the mapping loop below. + * + * Note the multiplication is just to avoid using an extra + * register/instruction per iteration. + */ + ldr x0, =_start /* x0 := vaddr(_start) */ + ldr x1, =_end /* x1 := vaddr(_end) */ + sub x0, x1, x0 /* x0 := effective size of Xen */ + lsr x0, x0, #PAGE_SHIFT /* x0 := Number of pages for Xen */ + lsl x0, x0, #3 /* x0 := Number of pages * PTE size */ + /* Map Xen */ adr_l x4, boot_third @@ -585,7 +598,7 @@ create_page_tables: 1: str x2, [x4, x1] /* Map vaddr(start) */ add x2, x2, #PAGE_SIZE /* Next page */ add x1, x1, #8 /* Next slot */ - cmp x1, #(XEN_PT_LPAE_ENTRIES<<3) /* 512 entries per page */ + cmp x1, x0 /* Loop until we map all of Xen */ b.lt 1b /* diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index c5d8c6201423..c4627cea7482 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -212,6 +212,7 @@ SECTIONS . = ALIGN(POINTER_ALIGN); __bss_end = .; } :text + . = ALIGN(PAGE_SIZE); _end = . ; /* Section for the device tree blob (if any). */ @@ -241,4 +242,6 @@ ASSERT(IS_ALIGNED(__init_begin, 4), "__init_begin is misaligned") ASSERT(IS_ALIGNED(__init_end, 4), "__init_end is misaligned") ASSERT(IS_ALIGNED(__bss_start, POINTER_ALIGN), "__bss_start is misaligned") ASSERT(IS_ALIGNED(__bss_end, POINTER_ALIGN), "__bss_end is misaligned") +/* To simplify the logic in head.S, we want to _end to be page aligned */ +ASSERT(IS_ALIGNED(_end, PAGE_SIZE), "_end is not page aligned") ASSERT((_end - start) <= XEN_VIRT_SIZE, "Xen is too big") From patchwork Sun Jun 25 20:49:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67ACAC001B3 for ; Sun, 25 Jun 2023 20:49:46 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554874.866314 (Exim 4.92) (envelope-from ) id 1qDWfh-0003LN-3b; Sun, 25 Jun 2023 20:49:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554874.866314; Sun, 25 Jun 2023 20:49:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfh-0003LF-0C; Sun, 25 Jun 2023 20:49:21 +0000 Received: by outflank-mailman (input) for mailman id 554874; Sun, 25 Jun 2023 20:49:19 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWff-00035f-Fe for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:19 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWff-0003MI-7s; Sun, 25 Jun 2023 20:49:19 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWff-00021M-0M; Sun, 25 Jun 2023 20:49:19 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=ZbAv0laYLu6yT3k2hkA4Gj70LOYt07z08AMTeISDAIs=; b=gBjp3U5esOIGtiVaIIWDIkasBy svhJkygMb8nct3CANun88vUSVtpOSUgtxsaM6oW3LjZYYHAPIee8zHCW8ho+240q28aZEQzi44pwg pxebZGE+aTsoDlUD6yB08cL3CV5xjnmRtJ/oAiFvf7zce6iRzGrBzhB/U/Y9AbW+SdJw=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 3/9] xen/arm32: head: Don't map too much in boot_third Date: Sun, 25 Jun 2023 21:49:01 +0100 Message-Id: <20230625204907.57291-4-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall At the moment, we are mapping the size of the reserved area for Xen (i.e. 2MB) even if the binary is smaller. We don't exactly know what's after Xen, so it is not a good idea to map more than necessary for a couple of reasons: * We would need to use break-before-make if the extra PTE needs to be updated to point to another region * The extra area mapped may be mapped again by Xen with different memory attribute. This would result to attribue mismatch. Therefore, rework the logic in create_page_tables() to map only what's necessary. To simplify the logic, we also want to make sure _end is page-aligned. So align the symbol in the linker and add an assert to catch any change. Signed-off-by: Julien Grall Reviewed-by: Michal Orzel --- xen/arch/arm/arm32/head.S | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index f9f7be9588b1..997c8a4fbbc1 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -462,6 +462,19 @@ create_page_tables: create_table_entry boot_pgtable, boot_second, r0, 1 create_table_entry boot_second, boot_third, r0, 2 + /* + * Find the size of Xen in pages and multiply by the size of a + * PTE. This will then be compared in the mapping loop below. + * + * Note the multiplication is just to avoid using an extra + * register/instruction per iteration. + */ + mov_w r0, _start /* r0 := vaddr(_start) */ + mov_w r1, _end /* r1 := vaddr(_end) */ + sub r0, r1, r0 /* r0 := effective size of Xen */ + lsr r0, r0, #PAGE_SHIFT /* r0 := Number of pages for Xen */ + lsl r0, r0, #3 /* r0 := Number of pages * PTE size */ + /* Setup boot_third: */ adr_l r4, boot_third @@ -476,7 +489,7 @@ create_page_tables: 1: strd r2, r3, [r4, r1] /* Map vaddr(start) */ add r2, r2, #PAGE_SIZE /* Next page */ add r1, r1, #8 /* Next slot */ - cmp r1, #(XEN_PT_LPAE_ENTRIES<<3) /* 512*8-byte entries per page */ + cmp r1, r0 /* Loop until we map all of Xen */ blo 1b /* From patchwork Sun Jun 25 20:49:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7096EB64DD for ; Sun, 25 Jun 2023 20:49:38 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554875.866320 (Exim 4.92) (envelope-from ) id 1qDWfh-0003Ol-Gi; Sun, 25 Jun 2023 20:49:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554875.866320; Sun, 25 Jun 2023 20:49:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfh-0003Nz-9h; Sun, 25 Jun 2023 20:49:21 +0000 Received: by outflank-mailman (input) for mailman id 554875; Sun, 25 Jun 2023 20:49:20 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfg-0003Ku-Qo for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:20 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfg-0003Ma-Hj; Sun, 25 Jun 2023 20:49:20 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfg-00021M-A4; Sun, 25 Jun 2023 20:49:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=e2gQb0HdlWtQqWMde+fvJ6mMzc931ddrnh3muHKVYvo=; b=eJNOekMD1tCqbAAreLgIGPa13F AokNsJsBGvgamZNdOcCJRQ+s8qW+Amune3MrV1lljAZb0IBLpNTpFKqM14P2cDG0erp9GkReF4sPc YCne/lmFLfZ4OZ6oR5fOVPJ6yEcvqYcOjK5THmWJsV0yhj6x57SotdWuZFN/O9zamkmU=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 4/9] xen/arm32: head: Remove 'r6' from the clobber list of create_page_tables() Date: Sun, 25 Jun 2023 21:49:02 +0100 Message-Id: <20230625204907.57291-5-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall Since commit 62529f16c8a2 ("xen/arm32: head: Use a page mapping for the 1:1 mapping in create_page_tables()"), the register 'r6' is not used anymore within create_page_tables(). So remove it from the documentation. Signed-off-by: Julien Grall Reviewed-by: Henry Wang Reviewed-by: Michal Orzel Reviewed-by: Bertrand Marquis --- xen/arch/arm/arm32/head.S | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 997c8a4fbbc1..5e3692eb3abf 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -451,10 +451,7 @@ ENDPROC(cpu_init) * Output: * r12: Was a temporary mapping created? * - * Clobbers r0 - r4, r6 - * - * Register usage within this function: - * r6 : Identity map in place + * Clobbers r0 - r4 */ create_page_tables: /* Prepare the page-tables for mapping Xen */ From patchwork Sun Jun 25 20:49:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9FC32EB64DC for ; Sun, 25 Jun 2023 20:49:45 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554876.866334 (Exim 4.92) (envelope-from ) id 1qDWfj-0003sc-QZ; Sun, 25 Jun 2023 20:49:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554876.866334; Sun, 25 Jun 2023 20:49:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfj-0003sQ-Lp; Sun, 25 Jun 2023 20:49:23 +0000 Received: by outflank-mailman (input) for mailman id 554876; Sun, 25 Jun 2023 20:49:22 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfi-0003jB-9H for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:22 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfh-0003N2-Ul; Sun, 25 Jun 2023 20:49:21 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfh-00021M-Jp; Sun, 25 Jun 2023 20:49:21 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=Zz5lkbOFdCDJuz1jjvaHY6dTr1nKg4m1ZU7qib9ysjI=; b=sMK3CCjnHN2zpPQ1zHwpLwOuf0 JovbFsupmAoHmxoCfwHktot0ya6DZ/FgAGRwVun6BrpeiJk4dCVJ3ifPfAZEQLnNYwf7CuB2HGhFz qW/srwGRUVUeVa7+x5hmnsMyJ9sxJrrJW18Az2bKSmwxpj5fawBp5iN7Ia++ZUx5eWWI=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 5/9] xen/arm: Rework the code mapping Xen to avoid relying on the size of Xen Date: Sun, 25 Jun 2023 21:49:03 +0100 Message-Id: <20230625204907.57291-6-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall At the moment, the maximum size of Xen binary we can support is 2MB. This is what we reserved in the virtual address but also what all the code in Xen relies on as we only allocate one L3 page-table. When feature like UBSAN (will be enabled in a follow-up patch) and GCOV are enabled, the binary will be way over 2MB. The code is now reworked so it doesn't realy on a specific size but will instead look at the reversed size and compute the number of page-table to allocate/map. While at it, replace any reference to 4KB mappings with a more generic word because the page-size may change in the future. Also fix the typo s/tlb/tbl/ in code move in arm32/head.S Signed-off-by: Julien Grall Reviewed-by: Michal Orzel --- xen/arch/arm/arm32/head.S | 61 ++++++++++++++++++++++++------- xen/arch/arm/arm64/head.S | 51 +++++++++++++++++++++----- xen/arch/arm/include/asm/config.h | 1 + xen/arch/arm/include/asm/lpae.h | 8 ++-- xen/arch/arm/mm.c | 24 +++++++----- 5 files changed, 108 insertions(+), 37 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 5e3692eb3abf..5448671de897 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -373,35 +373,55 @@ ENDPROC(cpu_init) .endm /* - * Macro to create a page table entry in \ptbl to \tbl + * Macro to create a page table entry in \ptbl to \tbl (physical + * address) * * ptbl: table symbol where the entry will be created - * tbl: table symbol to point to + * tbl: physical address of the table to point to * virt: virtual address * lvl: page-table level * * Preserves \virt - * Clobbers r1 - r4 + * Clobbers \tbl, r1 - r3 * * Also use r10 for the phys offset. * - * Note that \virt should be in a register other than r1 - r4 + * Note that \tbl and \virt should be in a register other than r1 - r3 */ -.macro create_table_entry, ptbl, tbl, virt, lvl - get_table_slot r1, \virt, \lvl /* r1 := slot in \tlb */ - lsl r1, r1, #3 /* r1 := slot offset in \tlb */ - - load_paddr r4, \tbl +.macro create_table_entry_from_paddr, ptbl, tbl, virt, lvl + get_table_slot r1, \virt, \lvl /* r1 := slot in \tbl */ + lsl r1, r1, #3 /* r1 := slot offset in \tbl */ movw r2, #PT_PT /* r2:r3 := right for linear PT */ - orr r2, r2, r4 /* + \tlb paddr */ + orr r2, r2, \tbl /* + \tbl paddr */ mov r3, #0 - adr_l r4, \ptbl + adr_l \tbl, \ptbl /* \tbl := (v,p)addr of \ptbl */ - strd r2, r3, [r4, r1] + strd r2, r3, [\tbl, r1] .endm + +/* + * Macro to create a page table entry in \ptbl to \tbl (symbol) + * + * ptbl: table symbol where the entry will be created + * tbl: table symbol to point to + * virt: virtual address + * lvl: page-table level + * + * Preserves \virt + * Clobbers r1 - r4 + * + * Also use r10 for the phys offset. + * + * Note that \virt should be in a register other than r1 - r4 + */ +.macro create_table_entry, ptbl, tbl, virt, lvl + load_paddr r4, \tbl + create_table_entry_from_paddr \ptbl, r4, \virt, \lvl + .endm + /* * Macro to create a mapping entry in \tbl to \paddr. Only mapping in 3rd * level table (i.e page granularity) is supported. @@ -451,13 +471,26 @@ ENDPROC(cpu_init) * Output: * r12: Was a temporary mapping created? * - * Clobbers r0 - r4 + * Clobbers r0 - r5 */ create_page_tables: /* Prepare the page-tables for mapping Xen */ mov_w r0, XEN_VIRT_START create_table_entry boot_pgtable, boot_second, r0, 1 - create_table_entry boot_second, boot_third, r0, 2 + + /* + * We need to use a stash register because + * create_table_entry_paddr() will clobber the register storing + * the physical address of the table to point to. + */ + load_paddr r5, boot_third + mov_w r4, XEN_VIRT_START +.rept XEN_NR_ENTRIES(2) + mov r0, r5 /* r0 := paddr(l3 table) */ + create_table_entry_from_paddr boot_second, r0, r4, 2 + add r4, r4, #XEN_PT_LEVEL_SIZE(2) /* r4 := Next vaddr */ + add r5, r5, #PAGE_SIZE /* r5 := Next table */ +.endr /* * Find the size of Xen in pages and multiply by the size of a diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 66bc85d4c39e..c9e2e36506d9 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -490,6 +490,31 @@ ENDPROC(cpu_init) ubfx \slot, \virt, #XEN_PT_LEVEL_SHIFT(\lvl), #XEN_PT_LPAE_SHIFT .endm +/* + * Macro to create a page table entry in \ptbl to \tbl + * ptbl: table symbol where the entry will be created + * tbl: physical address of the table to point to + * virt: virtual address + * lvl: page-table level + * tmp1: scratch register + * tmp2: scratch register + * + * Preserves \virt + * Clobbers \tbl, \tmp1, \tmp2 + * + * Note that all parameters using registers should be distinct. + */ +.macro create_table_entry_from_paddr, ptbl, tbl, virt, lvl, tmp1, tmp2 + get_table_slot \tmp1, \virt, \lvl /* \tmp1 := slot in \tlb */ + + mov \tmp2, #PT_PT /* \tmp2 := right for linear PT */ + orr \tmp2, \tmp2, \tbl /* + \tlb */ + + adr_l \tbl, \ptbl /* \tlb := address(\ptbl) */ + + str \tmp2, [\tbl, \tmp1, lsl #3] +.endm + /* * Macro to create a page table entry in \ptbl to \tbl * @@ -509,15 +534,8 @@ ENDPROC(cpu_init) * Note that all parameters using registers should be distinct. */ .macro create_table_entry, ptbl, tbl, virt, lvl, tmp1, tmp2, tmp3 - get_table_slot \tmp1, \virt, \lvl /* \tmp1 := slot in \tlb */ - - load_paddr \tmp2, \tbl - mov \tmp3, #PT_PT /* \tmp3 := right for linear PT */ - orr \tmp3, \tmp3, \tmp2 /* + \tlb paddr */ - - adr_l \tmp2, \ptbl - - str \tmp3, [\tmp2, \tmp1, lsl #3] + load_paddr \tmp1, \tbl + create_table_entry_from_paddr \ptbl, \tmp1, \virt, \lvl, \tmp2, \tmp3 .endm /* @@ -570,7 +588,20 @@ create_page_tables: ldr x0, =XEN_VIRT_START create_table_entry boot_pgtable, boot_first, x0, 0, x1, x2, x3 create_table_entry boot_first, boot_second, x0, 1, x1, x2, x3 - create_table_entry boot_second, boot_third, x0, 2, x1, x2, x3 + + /* + * We need to use a stash register because + * create_table_entry_paddr() will clobber the register storing + * the physical address of the table to point to. + */ + load_paddr x4, boot_third + ldr x1, =XEN_VIRT_START +.rept XEN_NR_ENTRIES(2) + mov x0, x4 /* x0 := paddr(l3 table) */ + create_table_entry_from_paddr boot_second, x0, x1, 2, x2, x3 + add x1, x1, #XEN_PT_LEVEL_SIZE(2) /* x1 := Next vaddr */ + add x4, x4, #PAGE_SIZE /* x4 := Next table */ +.endr /* * Find the size of Xen in pages and multiply by the size of a diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index c969e6da589d..6d246ab23c48 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -125,6 +125,7 @@ #endif #define XEN_VIRT_SIZE _AT(vaddr_t, MB(2)) +#define XEN_NR_ENTRIES(lvl) (XEN_VIRT_SIZE / XEN_PT_LEVEL_SIZE(lvl)) #define FIXMAP_VIRT_START (XEN_VIRT_START + XEN_VIRT_SIZE) #define FIXMAP_VIRT_SIZE _AT(vaddr_t, MB(2)) diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h index 7d2f6fd1bd5a..93e824f01125 100644 --- a/xen/arch/arm/include/asm/lpae.h +++ b/xen/arch/arm/include/asm/lpae.h @@ -267,15 +267,17 @@ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr); /* * Macros to define page-tables: - * - DEFINE_BOOT_PAGE_TABLE is used to define page-table that are used + * - DEFINE_BOOT_PAGE_TABLE{,S} are used to define page-table that are used * in assembly code before BSS is zeroed. * - DEFINE_PAGE_TABLE{,S} are used to define one or multiple * page-tables to be used after BSS is zeroed (typically they are only used * in C). */ -#define DEFINE_BOOT_PAGE_TABLE(name) \ +#define DEFINE_BOOT_PAGE_TABLES(name, nr) \ lpae_t __aligned(PAGE_SIZE) __section(".data.page_aligned") \ - name[XEN_PT_LPAE_ENTRIES] + name[XEN_PT_LPAE_ENTRIES * (nr)] + +#define DEFINE_BOOT_PAGE_TABLE(name) DEFINE_BOOT_PAGE_TABLES(name, 1) #define DEFINE_PAGE_TABLES(name, nr) \ lpae_t __aligned(PAGE_SIZE) name[XEN_PT_LPAE_ENTRIES * (nr)] diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index e460249736c3..2b2ff6015ebd 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -53,8 +53,8 @@ mm_printk(const char *fmt, ...) {} * to the CPUs own pagetables. * * These pagetables have a very simple structure. They include: - * - 2MB worth of 4K mappings of xen at XEN_VIRT_START, boot_first and - * boot_second are used to populate the tables down to boot_third + * - XEN_VIRT_SIZE worth of L3 mappings of xen at XEN_VIRT_START, boot_first + * and boot_second are used to populate the tables down to boot_third * which contains the actual mapping. * - a 1:1 mapping of xen at its current physical address. This uses a * section mapping at whichever of boot_{pgtable,first,second} @@ -79,7 +79,7 @@ DEFINE_BOOT_PAGE_TABLE(boot_first_id); DEFINE_BOOT_PAGE_TABLE(boot_second_id); DEFINE_BOOT_PAGE_TABLE(boot_third_id); DEFINE_BOOT_PAGE_TABLE(boot_second); -DEFINE_BOOT_PAGE_TABLE(boot_third); +DEFINE_BOOT_PAGE_TABLES(boot_third, XEN_NR_ENTRIES(2)); /* Main runtime page tables */ @@ -115,7 +115,7 @@ DEFINE_BOOT_PAGE_TABLE(xen_fixmap); * Third level page table used to map Xen itself with the XN bit set * as appropriate. */ -static DEFINE_PAGE_TABLE(xen_xenmap); +static DEFINE_PAGE_TABLES(xen_xenmap, XEN_NR_ENTRIES(2)); /* Non-boot CPUs use this to find the correct pagetables. */ uint64_t init_ttbr; @@ -518,15 +518,15 @@ void __init setup_pagetables(unsigned long boot_phys_offset) p[0].pt.table = 1; p[0].pt.xn = 0; - /* Break up the Xen mapping into 4k pages and protect them separately. */ - for ( i = 0; i < XEN_PT_LPAE_ENTRIES; i++ ) + /* Break up the Xen mapping into pages and protect them separately. */ + for ( i = 0; i < XEN_NR_ENTRIES(3); i++ ) { vaddr_t va = XEN_VIRT_START + (i << PAGE_SHIFT); if ( !is_kernel(va) ) break; pte = pte_of_xenaddr(va); - pte.pt.table = 1; /* 4k mappings always have this bit set */ + pte.pt.table = 1; /* third level mappings always have this bit set */ if ( is_kernel_text(va) || is_kernel_inittext(va) ) { pte.pt.xn = 0; @@ -539,10 +539,14 @@ void __init setup_pagetables(unsigned long boot_phys_offset) /* Initialise xen second level entries ... */ /* ... Xen's text etc */ + for ( i = 0; i < XEN_NR_ENTRIES(2); i++ ) + { + vaddr_t va = XEN_VIRT_START + i * XEN_PT_LEVEL_SIZE(2); - pte = pte_of_xenaddr((vaddr_t)xen_xenmap); - pte.pt.table = 1; - xen_second[second_table_offset(XEN_VIRT_START)] = pte; + pte = pte_of_xenaddr((vaddr_t)(xen_xenmap + i * XEN_PT_LPAE_ENTRIES)); + pte.pt.table = 1; + xen_second[second_table_offset(va)] = pte; + } /* ... Fixmap */ pte = pte_of_xenaddr((vaddr_t)xen_fixmap); From patchwork Sun Jun 25 20:49:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292187 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 74C0FC001B3 for ; Sun, 25 Jun 2023 20:49:39 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554877.866343 (Exim 4.92) (envelope-from ) id 1qDWfl-0004Ck-9n; Sun, 25 Jun 2023 20:49:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554877.866343; Sun, 25 Jun 2023 20:49:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfl-0004By-64; Sun, 25 Jun 2023 20:49:25 +0000 Received: by outflank-mailman (input) for mailman id 554877; Sun, 25 Jun 2023 20:49:23 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfj-0003s5-H5 for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:23 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfj-0003NJ-85; Sun, 25 Jun 2023 20:49:23 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfj-00021M-0W; Sun, 25 Jun 2023 20:49:23 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=gXqnczAjb+wnpPlcEiazaR11OD9Idwd3JlF3anBSmFw=; b=M75UERkVFu8wYlEek+C2JfO+dv TQuIiQ7/8/x6ybcfQg6nQUAkWVJ+j7FiLj8nuoFsM5pOfYZ/hvJMuduIaPYsNytfkCids2kQ/Uzta z+2wjsPjKPTvP1KjE9MPrrAPtqiY3pt06ytqG6cXmWFvwN8CEMhOzXT69U5JKf/cfgxk=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 6/9] xen/arm64: entry: Don't jump outside of an alternative Date: Sun, 25 Jun 2023 21:49:04 +0100 Message-Id: <20230625204907.57291-7-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall The instruction CBNZ can only jump to a pc-relative that is in the range +/- 1MB. Alternative instructions replacement are living in a separate subsection of the init section. This is usually placed towards the end of the linker. Whereas text is towards the beginning. While today Xen is quite small (~1MB), it could grow up to 2MB in the current setup. So there is no guarantee that the target address in the text section will be within the range +/- 1MB of the CBNZ in alternative section. The easiest solution is to have the target address within the same section of the alternative. This means that we need to duplicate a couple of instructions. Signed-off-by: Julien Grall ---- I couldn't come up with a solution that would not change the number of instructions executed in the entry path. Reviewed-by: Michal Orzel --- xen/arch/arm/arm64/entry.S | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/arm64/entry.S b/xen/arch/arm/arm64/entry.S index 95f1a9268419..492591fdef54 100644 --- a/xen/arch/arm/arm64/entry.S +++ b/xen/arch/arm/arm64/entry.S @@ -242,13 +242,24 @@ msr daifclr, \iflags bl enter_hypervisor_from_guest + /* + * CBNZ can only address an offset of +/- 1MB. This means, it is + * not possible to jump outside of an alternative because + * the .text section and .altinstr_replacement may be further + * appart. The easiest way is to duplicate the few instructions + * that need to be skipped. + */ alternative_if SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT - cbnz x19, 1f - alternative_else_nop_endif - - mov x0, sp - bl do_trap_\trap + cbnz x19, 1f + mov x0, sp + bl do_trap_\trap 1: + alternative_else + nop + mov x0, sp + bl do_trap_\trap + alternative_endif + exit hyp=0, compat=\compat .endm From patchwork Sun Jun 25 20:49:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292189 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6317EEB64DD for ; Sun, 25 Jun 2023 20:49:41 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554879.866348 (Exim 4.92) (envelope-from ) id 1qDWfl-0004GB-KT; Sun, 25 Jun 2023 20:49:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554879.866348; Sun, 25 Jun 2023 20:49:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfl-0004Fu-Fd; Sun, 25 Jun 2023 20:49:25 +0000 Received: by outflank-mailman (input) for mailman id 554879; Sun, 25 Jun 2023 20:49:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfk-00049b-Sq for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfk-0003Nd-Hy; Sun, 25 Jun 2023 20:49:24 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfk-00021M-AE; Sun, 25 Jun 2023 20:49:24 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=ze41TrTEDnEX29OT1AHfqfE9eyz1GRWB/h0Tzh6x6sw=; b=t6JvaOPPa7AuK8mxOH+M6lRRH7 I7kQWX8z/QU8gxHbAC6LKuGGrtQToawvnjjGsoCOSw3r/IigPeVa4W9ajiG/uxS/75QnIhFRrYJ4S lCebwDwGR9sJlg3z/TrvVzzoEhHiZzHZAnnAk5NHW/3l5kpMZdcnX3kH7i5yMgbCIWNA=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 7/9] xen/arm64: head: Rework PRINT() to work when the string is not withing +/- 1MB Date: Sun, 25 Jun 2023 21:49:05 +0100 Message-Id: <20230625204907.57291-8-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall The instruction ADR is able to load an address of a symbol that is within the range +/- 1 MB of the instruction. While today Xen is quite small (~1MB), it could grow up to 2MB in the current setup. So there is no guarantee that the instruction can load the string address (stored in rodata). So replace the instruction ADR with the pseudo-instruction ADR_L which is able to handle symbol within the range +/- 4GB. Signed-off-by: Julien Grall Reviewed-by: Michal Orzel Reviewed-by: Henry Wang --- xen/arch/arm/arm64/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index c9e2e36506d9..38f896bdb8e2 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -90,7 +90,7 @@ */ #define PRINT(_s) \ mov x3, lr ; \ - adr x0, 98f ; \ + adr_l x0, 98f ; \ bl puts ; \ mov lr, x3 ; \ RODATA_STR(98, _s) From patchwork Sun Jun 25 20:49:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292194 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 31D92EB64DD for ; Sun, 25 Jun 2023 20:49:46 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554880.866363 (Exim 4.92) (envelope-from ) id 1qDWfm-0004hf-Ug; Sun, 25 Jun 2023 20:49:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554880.866363; Sun, 25 Jun 2023 20:49:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfm-0004gk-PM; Sun, 25 Jun 2023 20:49:26 +0000 Received: by outflank-mailman (input) for mailman id 554880; Sun, 25 Jun 2023 20:49:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfm-0004Sx-1W for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfl-0003O0-Rk; Sun, 25 Jun 2023 20:49:25 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfl-00021M-KD; Sun, 25 Jun 2023 20:49:25 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=eAiFR9Z75adT3afecve41CD/1YrEKTUVp4d/ZLD9OoM=; b=4W0vSFoPDDHqErzNGySTz6h8Jv JqYRViLF8SPwgIwLVedJ358uQtJ+hqaB1eiSYfiHArgGMUF/LhSrHjhsvtBTJcyV82+JwgNn2a82X 1vb4dZGj8oRKgssx7usH/om0pK3m999c76x9bA3tjewmM0TBH9MhxFPzf0loV0woqpHY=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 8/9] xen/arm: Allow the user to build Xen with USBAN Date: Sun, 25 Jun 2023 21:49:06 +0100 Message-Id: <20230625204907.57291-9-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall UBSAN has been enabled a few years ago on x86 but was never enabled on Arm because the final binary is bigger than 2MB ( the maximum we can currently handled). With the recent rework, it is now possible to grow Xen over 2MB. So there is no more roadblock to enable Xen other than increasing the reserved area. On my setup, for arm32, the final binaray was very close to 4MB. Furthermore, one may want to enable USBAN and GCOV which would put the binary well-over 4MB (both features require for some space). Therefore, increase the size to 8MB which should us some margin. Signed-off-by: Julien Grall ---- The drawback with this approach is that we are adding 6 new page-table (3 for boot and 3 for runtime) that are statically allocated. So the final Xen binary will be 24KB bigger when neither UBSAN nor GCOV. If this is not considered acceptable, then we could make the size of configurable in the Kconfig and decide it based on the features enabled. Reviewed-by: Henry Wang Tested-by: Henry Wang Reviewed-by: Michal Orzel --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/include/asm/config.h | 18 +++++++++--------- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 61e581b8c2b0..06b5ff755c95 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -17,6 +17,7 @@ config ARM select HAS_PASSTHROUGH select HAS_PDX select HAS_PMAP + select HAS_UBSAN select IOMMU_FORCE_PT_SHARE config ARCH_DEFCONFIG diff --git a/xen/arch/arm/include/asm/config.h b/xen/arch/arm/include/asm/config.h index 6d246ab23c48..1bbf4cc9958d 100644 --- a/xen/arch/arm/include/asm/config.h +++ b/xen/arch/arm/include/asm/config.h @@ -74,10 +74,10 @@ /* * ARM32 layout: * 0 - 2M Unmapped - * 2M - 4M Xen text, data, bss - * 4M - 6M Fixmap: special-purpose 4K mapping slots - * 6M - 10M Early boot mapping of FDT - * 10M - 12M Livepatch vmap (if compiled in) + * 2M - 10M Xen text, data, bss + * 10M - 12M Fixmap: special-purpose 4K mapping slots + * 12M - 16M Early boot mapping of FDT + * 16M - 18M Livepatch vmap (if compiled in) * * 32M - 128M Frametable: 32 bytes per page for 12GB of RAM * 256M - 1G VMAP: ioremap and early_ioremap use this virtual address @@ -94,10 +94,10 @@ * 0x0000020000000000 - 0x0000027fffffffff (512GB, L0 slot [4]) * (Relative offsets) * 0 - 2M Unmapped - * 2M - 4M Xen text, data, bss - * 4M - 6M Fixmap: special-purpose 4K mapping slots - * 6M - 10M Early boot mapping of FDT - * 10M - 12M Livepatch vmap (if compiled in) + * 2M - 10M Xen text, data, bss + * 10M - 12M Fixmap: special-purpose 4K mapping slots + * 12M - 16M Early boot mapping of FDT + * 16M - 18M Livepatch vmap (if compiled in) * * 1G - 2G VMAP: ioremap and early_ioremap * @@ -124,7 +124,7 @@ #define XEN_VIRT_START (SLOT0(4) + _AT(vaddr_t, MB(2))) #endif -#define XEN_VIRT_SIZE _AT(vaddr_t, MB(2)) +#define XEN_VIRT_SIZE _AT(vaddr_t, MB(8)) #define XEN_NR_ENTRIES(lvl) (XEN_VIRT_SIZE / XEN_PT_LEVEL_SIZE(lvl)) #define FIXMAP_VIRT_START (XEN_VIRT_START + XEN_VIRT_SIZE) From patchwork Sun Jun 25 20:49:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13292188 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B3735C001B0 for ; Sun, 25 Jun 2023 20:49:39 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.554882.866373 (Exim 4.92) (envelope-from ) id 1qDWfp-000578-6K; Sun, 25 Jun 2023 20:49:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 554882.866373; Sun, 25 Jun 2023 20:49:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfp-000571-1e; Sun, 25 Jun 2023 20:49:29 +0000 Received: by outflank-mailman (input) for mailman id 554882; Sun, 25 Jun 2023 20:49:27 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfn-0004qK-B4 for xen-devel@lists.xenproject.org; Sun, 25 Jun 2023 20:49:27 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDWfn-0003OM-5t; Sun, 25 Jun 2023 20:49:27 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qDWfm-00021M-Tw; Sun, 25 Jun 2023 20:49:27 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=s5wm0nqS6ULfC32q998/nCfZN762L79rLlqFVp1Zzow=; b=3rFaz7ovZPFJqdziFudpeKwltt yK1oQknZmDQSWUTCxfUks5nR5563d3DSYGRBd9QuHvGZ9SvWBbVSkPQ3vYyH3pnSSIE8RwOb/P/9u 90k/rQfumuIroJo1j60n5fmEPB5SCNN0A/7Yg0lnGjAjjT7XZBlQmdRWwFDUNIzwRO2A=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 9/9] xen/arm32: vfp: Add missing U for shifted constant Date: Sun, 25 Jun 2023 21:49:07 +0100 Message-Id: <20230625204907.57291-10-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625204907.57291-1-julien@xen.org> References: <20230625204907.57291-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall When enabling UBSAN on arm32, the following splat will be printed: (XEN) ================================================================================ (XEN) UBSAN: Undefined behaviour in arch/arm/arm32/vfp.c:75:22 (XEN) left shift of 255 by 24 places cannot be represented in type 'int' This is referring to the shift in FPSID_IMPLEMENTER_MASK. While we could only add the U to the value shift there, it would be better to be consistent and also add it for every value shifted. This should also addressing MISRA Rule 7.2: A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type Signed-off-by: Julien Grall Reviewed-by: Henry Wang Reviewed-by: Bertrand Marquis --- xen/arch/arm/include/asm/arm32/vfp.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/vfp.h b/xen/arch/arm/include/asm/arm32/vfp.h index bade3bc66e1f..2f2e4b24bb40 100644 --- a/xen/arch/arm/include/asm/arm32/vfp.h +++ b/xen/arch/arm/include/asm/arm32/vfp.h @@ -1,23 +1,23 @@ #ifndef _ARM_ARM32_VFP_H #define _ARM_ARM32_VFP_H -#define FPEXC_EX (1u << 31) -#define FPEXC_EN (1u << 30) -#define FPEXC_FP2V (1u << 28) +#define FPEXC_EX (1U << 31) +#define FPEXC_EN (1U << 30) +#define FPEXC_FP2V (1U << 28) -#define MVFR0_A_SIMD_MASK (0xf << 0) +#define MVFR0_A_SIMD_MASK (0xfU << 0) #define FPSID_IMPLEMENTER_BIT (24) -#define FPSID_IMPLEMENTER_MASK (0xff << FPSID_IMPLEMENTER_BIT) +#define FPSID_IMPLEMENTER_MASK (0xffU << FPSID_IMPLEMENTER_BIT) #define FPSID_ARCH_BIT (16) -#define FPSID_ARCH_MASK (0xf << FPSID_ARCH_BIT) +#define FPSID_ARCH_MASK (0xfU << FPSID_ARCH_BIT) #define FPSID_PART_BIT (8) -#define FPSID_PART_MASK (0xff << FPSID_PART_BIT) +#define FPSID_PART_MASK (0xffU << FPSID_PART_BIT) #define FPSID_VARIANT_BIT (4) -#define FPSID_VARIANT_MASK (0xf << FPSID_VARIANT_BIT) +#define FPSID_VARIANT_MASK (0xfU << FPSID_VARIANT_BIT) #define FPSID_REV_BIT (0) -#define FPSID_REV_MASK (0xf << FPSID_REV_BIT) +#define FPSID_REV_MASK (0xfU << FPSID_REV_BIT) struct vfp_state {