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[78.94.0.51]) by smtp.gmail.com with ESMTPSA id f10-20020adff98a000000b003159d2dabbasm2590377wrr.94.2023.07.11.09.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 09:05:12 -0700 (PDT) From: Naresh Solanki X-Google-Original-From: Naresh Solanki To: linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, iwona.winiarska@intel.com, linux@roeck-us.net, jdelvare@suse.com Cc: Naresh Solanki , Patrick Rudolph , openbmc@lists.ozlabs.org Subject: [PATCH 1/3] peci: Add Intel Sapphire Rapids support Date: Tue, 11 Jul 2023 18:04:49 +0200 Message-ID: <20230711160452.818914-1-Naresh.Solanki@9elements.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add support for detection of Intel Sapphire Rapids processor based on CPU family & model. Sapphire Rapids Xeon processors with the family set to 6 and the model set to INTEL_FAM6_SAPPHIRERAPIDS_X. The data field for this entry is "spr". Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki --- drivers/peci/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) base-commit: 4dbbaf8fbdbd13adc80731b2452257857e4c2d8b diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c index de4a7b3e5966..3668a908d259 100644 --- a/drivers/peci/cpu.c +++ b/drivers/peci/cpu.c @@ -318,6 +318,11 @@ static const struct peci_device_id peci_cpu_device_ids[] = { .model = INTEL_FAM6_ICELAKE_X, .data = "icx", }, + { /* Sapphire Rapids Xeon */ + .family = 6, + .model = INTEL_FAM6_SAPPHIRERAPIDS_X, + .data = "spr", + }, { /* Icelake Xeon D */ .family = 6, .model = INTEL_FAM6_ICELAKE_D, From patchwork Tue Jul 11 16:04:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naresh Solanki X-Patchwork-Id: 13309017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3706EEB64DC for ; Tue, 11 Jul 2023 16:05:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231493AbjGKQFR (ORCPT ); Tue, 11 Jul 2023 12:05:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231494AbjGKQFQ (ORCPT ); Tue, 11 Jul 2023 12:05:16 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53E4319B for ; Tue, 11 Jul 2023 09:05:15 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3fbf1b82dc7so60833495e9.2 for ; Tue, 11 Jul 2023 09:05:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1689091514; x=1691683514; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HJ6zIJuacID5DOSHqnnoP33bErwpH8EdehQ+RhKIoRY=; b=cqjF8kmNdfLVDPdvvG0sxY2ov+69drHqon+x5ZIHqNYWu2KVbRJ2ZOezhBVyUdUP7O 1S7rGwrbbM3zMg4RrJCNLPTb4HLyAZUehEJ1byJE+MTryZPOFsKn81ZXDGyoPgn71IPx dZrzv/Ky7QoyympNY6vi1vEL0GBc6Nkh9L3fKN5TuwlRmFfmeaQTKSIAt/QPb5jItfjm CzeYstqAhC7uow8E7tB1MRWWrfeg4AtsYmkKwaB6EsxzrsbtoiiNB7pg3CNbF159CuU9 F1/QJJGQMM88ap0e9rzz2bzim2XhajupwwwB1su6u8GY4+sM39VByq2VOIFrFpAhhDPb ZnaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689091514; x=1691683514; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HJ6zIJuacID5DOSHqnnoP33bErwpH8EdehQ+RhKIoRY=; b=ORj+fSxs3q8Z4EFfzjG7p2KjzBbv6kN9suC1Utxe8eDmq3QYDKe1x0wJ/mm8PFGLbp pw7gCZgR3MszV/57lLOOUieXhRPVUN/JVbpH6F9bknZnkNlLuSbvUAwqLaqKHnabbC0M d/s7RsBf/JjeDGIHTrVBCJyDqxpc+4/EBx1zxkhtxFkXjlcpr68k1t65AM2nH5BmSPcP XS9gZ7bPeVF++zdeb5SlTsM4OnHaJUtzKlNQaTV1PnbkZ+df5CSYg9uyNeIrAPLsAejo tWwnyh3y7P/7HlA5DFLx0zLyeyzv3JcfKRW0QjvKfXZ1N1DA1tRQzeg1aeBTpu44Nr+L OAoQ== X-Gm-Message-State: ABy/qLZNzp/hWa4mC9xPe3q1xWskMK1dA7g/OQpy8ak2kuQCj3bUuLPA 3RlRenAPmQuIYAEfHvoksOIAPQ== X-Google-Smtp-Source: APBJJlFBlmktdcZYIUZKA4HPuooXWyZXhV79B7dghEn80d1rlfC9GDjz+NJ8H2jGbQTKlzdbL6NX6A== X-Received: by 2002:a5d:58cf:0:b0:313:f399:6cea with SMTP id o15-20020a5d58cf000000b00313f3996ceamr16513594wrf.4.1689091513872; Tue, 11 Jul 2023 09:05:13 -0700 (PDT) Received: from stroh80.sec.9e.network (ip-078-094-000-051.um19.pools.vodafone-ip.de. [78.94.0.51]) by smtp.gmail.com with ESMTPSA id f10-20020adff98a000000b003159d2dabbasm2590377wrr.94.2023.07.11.09.05.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 09:05:13 -0700 (PDT) From: Naresh Solanki X-Google-Original-From: Naresh Solanki To: linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, iwona.winiarska@intel.com, linux@roeck-us.net, jdelvare@suse.com Cc: Patrick Rudolph Subject: [PATCH 2/3] hwmon: (peci/cputemp) Add Intel Sapphire Rapids support Date: Tue, 11 Jul 2023 18:04:50 +0200 Message-ID: <20230711160452.818914-2-Naresh.Solanki@9elements.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230711160452.818914-1-Naresh.Solanki@9elements.com> References: <20230711160452.818914-1-Naresh.Solanki@9elements.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org From: Patrick Rudolph Add support to read DTS for reading Intel Sapphire Rapids platform. Signed-off-by: Patrick Rudolph --- drivers/hwmon/peci/cputemp.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c index e5b65a382772..a812c15948d9 100644 --- a/drivers/hwmon/peci/cputemp.c +++ b/drivers/hwmon/peci/cputemp.c @@ -363,6 +363,7 @@ static int init_core_mask(struct peci_cputemp *priv) switch (peci_dev->info.model) { case INTEL_FAM6_ICELAKE_X: case INTEL_FAM6_ICELAKE_D: + case INTEL_FAM6_SAPPHIRERAPIDS_X: ret = peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev, reg->func, reg->offset + 4, &data); if (ret) @@ -531,6 +532,13 @@ static struct resolved_cores_reg resolved_cores_reg_icx = { .offset = 0xd0, }; +static struct resolved_cores_reg resolved_cores_reg_spr = { + .bus = 31, + .dev = 30, + .func = 6, + .offset = 0x80, +}; + static const struct cpu_info cpu_hsx = { .reg = &resolved_cores_reg_hsx, .min_peci_revision = 0x33, @@ -549,6 +557,12 @@ static const struct cpu_info cpu_icx = { .thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree, }; +static const struct cpu_info cpu_spr = { + .reg = &resolved_cores_reg_spr, + .min_peci_revision = 0x40, + .thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree, +}; + static const struct auxiliary_device_id peci_cputemp_ids[] = { { .name = "peci_cpu.cputemp.hsx", @@ -574,6 +588,10 @@ static const struct auxiliary_device_id peci_cputemp_ids[] = { .name = "peci_cpu.cputemp.icxd", .driver_data = (kernel_ulong_t)&cpu_icx, }, + { + .name = "peci_cpu.cputemp.spr", + .driver_data = (kernel_ulong_t)&cpu_spr, + }, { } }; MODULE_DEVICE_TABLE(auxiliary, peci_cputemp_ids); From patchwork Tue Jul 11 16:04:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naresh Solanki X-Patchwork-Id: 13309018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6812DC001DC for ; Tue, 11 Jul 2023 16:05:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231509AbjGKQFT (ORCPT ); Tue, 11 Jul 2023 12:05:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231535AbjGKQFR (ORCPT ); Tue, 11 Jul 2023 12:05:17 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75DEF9B for ; Tue, 11 Jul 2023 09:05:16 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-314172bb818so6368057f8f.1 for ; Tue, 11 Jul 2023 09:05:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1689091515; x=1691683515; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4VNB55+Kj0EnFZI/6YA+WsjU8eHtTcvYjmA+69rBlFU=; b=V0CL4KppxA7FXEGPQn5AbE9Edqfb6QVfaGTeFJsRyl8EZbGVgDnQzmuUl4+YIE1+98 bzrrNWKjYbZXYHxau15yEYhtx5dK1vVKgt5Vg7gVjtoqTi3w0/nwVpoMf/He50w1pVhM BtWqlGKXO2nEyElPGsSTRb99Kr5ws5yT5Z/+oEKVDFxscTJY5ffZCF/r9rjIhQZDN5DS MzlWZVejVnDzX3TmXQrnl1kS35ImQ7V8IvUE+Xdr5A7FHq8o81OYNPEZ4VjfS22yEssT f4Nl26KoNxPDRqfxsJmoy3fBkcubmuwmQNToFHbJbjBx5yNXqsZH+Q3k2DQQQYAc6ZCR XcwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689091515; x=1691683515; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4VNB55+Kj0EnFZI/6YA+WsjU8eHtTcvYjmA+69rBlFU=; b=IaXeaoKaG94gOJT7ztyFMUWptXjX/i2DyAbFV9qWBWfM1z+PVWJoqEaQUxzzF1OON+ 4mKqVGS+DW5d0WygN6Le4Sz/nGNOtM6I8sSvtZBsc8lXs7T7sscvCOfC+a+AF0mxHYZa 6wvNm5mDKiVzZYbFZiDJ9KmQg/3rtc35HQIMcveVl6k7iFviOJDqapn5WS5mvvhcWDBo ti29Xw7vSy/C1XLccvX5IYDUjwXD9X+2nyLMDR/1b4biBX+m4935PUzqF6o+ixgHwgPS YJsjUPmByXyIF6yFsUFY43vtyktLEk+PqhuwU4oQdaEGpi0N9BcsxrMmxYbhC95prKg/ yTXg== X-Gm-Message-State: ABy/qLYEfHMCvO/7oPYiB6quQVkhYWoR/ki1yKXqmVpMjdb+196mbKEa 0h/hdHsLg7nKsf+GEpXBGX3Tcg== X-Google-Smtp-Source: APBJJlFSmv5mhuu2nFtdTbkI81Uwo9zlsf1jpmKSUjRjHpww7prtSSW2+g+SpsfUtRyvqpDnRFEnTg== X-Received: by 2002:adf:ce01:0:b0:314:36c5:e4c0 with SMTP id p1-20020adfce01000000b0031436c5e4c0mr16432328wrn.11.1689091515075; Tue, 11 Jul 2023 09:05:15 -0700 (PDT) Received: from stroh80.sec.9e.network (ip-078-094-000-051.um19.pools.vodafone-ip.de. [78.94.0.51]) by smtp.gmail.com with ESMTPSA id f10-20020adff98a000000b003159d2dabbasm2590377wrr.94.2023.07.11.09.05.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 09:05:14 -0700 (PDT) From: Naresh Solanki X-Google-Original-From: Naresh Solanki To: linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, iwona.winiarska@intel.com, linux@roeck-us.net, jdelvare@suse.com Cc: Patrick Rudolph Subject: [PATCH 3/3] hwmon: (dimmtemp) Add Sapphire Rapids support Date: Tue, 11 Jul 2023 18:04:51 +0200 Message-ID: <20230711160452.818914-3-Naresh.Solanki@9elements.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230711160452.818914-1-Naresh.Solanki@9elements.com> References: <20230711160452.818914-1-Naresh.Solanki@9elements.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org From: Patrick Rudolph This patch extends the functionality of the hwmon (dimmtemp) to include support for Sapphire Rapids platform. Sapphire Rapids can accommodate up to 8 CPUs, each with 16 DIMMs. To accommodate this configuration, the maximum supported DIMM count is increased, and the corresponding Sapphire Rapids ID and threshold code are added. The patch has been tested on a 4S system with 64 DIMMs installed. Default thresholds are utilized for Sapphire Rapids, as accessing the threshold requires accessing the UBOX device on Uncore bus 0, which can only be achieved using MSR access. The non-PCI-compliant MMIO BARs are not available for this purpose. Signed-off-by: Patrick Rudolph --- drivers/hwmon/peci/dimmtemp.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c index ed968401f93c..edafbfd66fef 100644 --- a/drivers/hwmon/peci/dimmtemp.c +++ b/drivers/hwmon/peci/dimmtemp.c @@ -30,8 +30,10 @@ #define DIMM_IDX_MAX_ON_ICX 2 #define CHAN_RANK_MAX_ON_ICXD 4 #define DIMM_IDX_MAX_ON_ICXD 2 +#define CHAN_RANK_MAX_ON_SPR 128 +#define DIMM_IDX_MAX_ON_SPR 2 -#define CHAN_RANK_MAX CHAN_RANK_MAX_ON_HSX +#define CHAN_RANK_MAX CHAN_RANK_MAX_ON_SPR #define DIMM_IDX_MAX DIMM_IDX_MAX_ON_HSX #define DIMM_NUMS_MAX (CHAN_RANK_MAX * DIMM_IDX_MAX) @@ -530,6 +532,15 @@ read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u return 0; } +static int +read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data) +{ + /* Use defaults */ + *data = (95 << 16) | (90 << 8); + + return 0; +} + static const struct dimm_info dimm_hsx = { .chan_rank_max = CHAN_RANK_MAX_ON_HSX, .dimm_idx_max = DIMM_IDX_MAX_ON_HSX, @@ -572,6 +583,13 @@ static const struct dimm_info dimm_icxd = { .read_thresholds = &read_thresholds_icx, }; +static const struct dimm_info dimm_spr = { + .chan_rank_max = CHAN_RANK_MAX_ON_SPR, + .dimm_idx_max = DIMM_IDX_MAX_ON_SPR, + .min_peci_revision = 0x40, + .read_thresholds = &read_thresholds_spr, +}; + static const struct auxiliary_device_id peci_dimmtemp_ids[] = { { .name = "peci_cpu.dimmtemp.hsx", @@ -597,6 +615,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = { .name = "peci_cpu.dimmtemp.icxd", .driver_data = (kernel_ulong_t)&dimm_icxd, }, + { + .name = "peci_cpu.dimmtemp.spr", + .driver_data = (kernel_ulong_t)&dimm_spr, + }, { } }; MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);