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But this method meet issue when do the system PM stress test. IC can't fix it easily. So in the new imx93 A1 chip, IC drop this method, and involve back the old way,use the GPR method to trigger the Flex-CAN stop mode signal. Now NXP claim to drop imx93 A0, and only support imx93 A1. So here add the stop mode through GPR. This patch also fix a typo for aonmix_ns_gpr. Signed-off-by: Haibo Chen --- arch/arm64/boot/dts/freescale/imx93.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 4ec9df78f205..e0282c4ba11d 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -185,7 +185,7 @@ aips1: bus@44000000 { #size-cells = <1>; ranges; - anomix_ns_gpr: syscon@44210000 { + aonmix_ns_gpr: syscon@44210000 { compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon"; reg = <0x44210000 0x1000>; }; @@ -319,6 +319,7 @@ flexcan1: can@443a0000 { assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; assigned-clock-rates = <40000000>; fsl,clk-source = /bits/ 8 <0>; + fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>; status = "disabled"; }; @@ -591,6 +592,7 @@ flexcan2: can@425b0000 { assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; assigned-clock-rates = <40000000>; fsl,clk-source = /bits/ 8 <0>; + fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5PvQl5XkUj8yu3b/BTpzMkUCGr6ka3u7h36FJ/Ok6rDc0mdAQeTMmmeLPdSqcyZRNsbV6iRcAPNO/z3Y2gWJTP/FfxstEJ54J79vbY8wKl/bzLGntmIdFBX/errNsQon7KNAjpQUntndEgxqNQJY7Qa6YtP1J6eN023Fg5gyboiiseJLn/m4YdktutY5+jP5tjLnxsBbeakj8cTsiXD8dp1pqD2kKMs8WOpiXBz01jzdIIvrjG+1MzYQX67GjTDL2NMv7kpT75lp6XFWgfDoMOvNUOE7Htk9nNsIVhzya34e21FxHckNPZj5NSzI2aCRjEBTAwpjl65L1xwssdnQ9q1v6KDRsbuo3M4sD3mVXQofCdkezyNpyECqiECECXuNUKwkVMQHMluFNoc3E+p5/XVmC48rm1xwUsJeobeF+fLjvP/2OO1XBl8qyWrhjI4syD048Y7Z8e7PSswzSfwPy5SZEr/8PtZa9bF39GNXiBYai/VMwp/Oi7jmz+rpJtHrcUv53mUAx4lDvnRQsvpPOl8QQeTstI9bQZ1HD/QzDOcnxKyoph1kWToxODoz/BYiAk/UW3hc3Te1XIbo3Bj64xa0MwCerCjuwOM+8Y/Z7wDmIXMSlnQcoeys6uhuxbhKRos3QYnO+0YdyDCjsXCAkO8isa9Ow30FJlbaKCC4I1xXXceHvNI3uEJlsLl1r0AaC32OsKFoJz0SfDh7Avsp2laqIUu7sl4t071JmucrkFhitQUQNUF7muHIwT1wO3NhXGroTZg3Z+wg5R9SSB3JdF7f7wmo+0+Ayj52VjJ3F+kyIRgdpOpDlGNTEr5Ukran2hjSnonsj6QWckL/bG7li2OCBmPJpWPL8hWpc6ZDQZ0YWxKqa4KWIVAgms8z0WbAdMPw0smTeBhJIWmvnhLwLboEOcfwwniBWjHixD602RH7PpWSKHXfalHVT+XZrWcGeOdnfiXSYyA63pM0lrfxnFZ6177HdlzsbxC3rnhzCn3LVW3x4pZRdP31DWatvXsbj6/2UrpI1MA8si1C9MezXaEK2ls10HoIWfSOdIaJJ+p6KlABVhbN6kFx8Kz8N+o0oP3Mb5k0PNhogycuUCg1W7LJtYIwTLtArZS7vRQmiQhWVUjhBGDYIwb9erVQLqU3tCs4v/gmYZ17lezXDWDCbm7eA/vtkuAlBmUDFJX3RM0SRXWuEYhu9zVPIK7XqxqPH8Lp/N6OC2BSnytAiYP4U6PHi6tgQQPVEc7c2QidniLutwYNEk2H4bD73mgNHApVacytXa4sW7Wc0i5yu61tkq8D0eJefIHtELHq7pt6zU6gxWaS6HXh6lyCEoin9T4sAdp64m+aiC3JYjdwGNrcH5HB0Nwy/hoalan0aqHJcnE60HT4kihuNL3aWd/MEbvhdDG3W6qHjL1ah1t64ekFVh791DmKI9u9lWZ5EBip4FbyljDOgrgARoe/X5Cc1C/6wKYv67Oi1J0dovR7Bh0mgC/Yl5w90v62XfQmtAoJqnH7w/fRYvKxlrbeleioLgwHXhgqldvbJmATfgu3l9y4GKKgTntB4onefY90Ala9ikfPy9lfMpY1y+RjqbcrAcXG X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f02a20f3-a5f0-4210-a13b-08db8dca7979 X-MS-Exchange-CrossTenant-AuthSource: DB7PR04MB4010.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jul 2023 11:21:36.6684 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Y3xxxGIq7NkbnmTRiXWlKbJ42OHw0eSRyAG1Pqo7nnRkylRLGVXgNveXp0/Z4yk49jSNbw0hiGMGkbz1XTKk4A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR04MB6892 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Haibo Chen IMX93 A0 chip involve the internal q-channel handshake in LPCG and CCM to automatically handle the Flex-CAN IPG STOP signal. Only after FLEX-CAN enter stop mode then can support the self-wakeup feature. But meet issue when do the continue system PM stress test. When config the CAN as wakeup source, the first time after system suspend, any data on CAN bus can wakeup the system, this is as expect. But the second time when system suspend, data on CAN bus can't wakeup the system. If continue this test, we find in odd time system enter suspend, CAN can wakeup the system, but in even number system enter suspend, CAN can't wakeup the system. IC find a bug in the auto stop mode logic, and can't fix it easily. So for the new imx93 A1, IC drop the auto stop mode and involve the GPR to support stop mode (used before). IC define a bit in GPR which can trigger the IPG STOP signal to Flex-CAN, let it go into stop mode. And NXP claim to drop IMX93 A0, and only support IMX93 A1. So this patch remove the auto stop mode, and add flag FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR to imx93. Signed-off-by: Haibo Chen --- drivers/net/can/flexcan/flexcan-core.c | 46 ++++++++------------------ drivers/net/can/flexcan/flexcan.h | 2 -- 2 files changed, 13 insertions(+), 35 deletions(-) diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c index ff0fc18baf13..d8be69f4a0c3 100644 --- a/drivers/net/can/flexcan/flexcan-core.c +++ b/drivers/net/can/flexcan/flexcan-core.c @@ -348,7 +348,7 @@ static struct flexcan_devtype_data fsl_imx8mp_devtype_data = { static struct flexcan_devtype_data fsl_imx93_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_RX_MAILBOX | - FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_AUTO_STOP_MODE | + FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR | FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR, @@ -544,11 +544,6 @@ static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv) } else if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) { regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr, 1 << priv->stm.req_bit, 1 << priv->stm.req_bit); - } else if (priv->devtype_data.quirks & FLEXCAN_QUIRK_AUTO_STOP_MODE) { - /* For the auto stop mode, software do nothing, hardware will cover - * all the operation automatically after system go into low power mode. - */ - return 0; } return flexcan_low_power_enter_ack(priv); @@ -574,12 +569,6 @@ static inline int flexcan_exit_stop_mode(struct flexcan_priv *priv) reg_mcr &= ~FLEXCAN_MCR_SLF_WAK; priv->write(reg_mcr, ®s->mcr); - /* For the auto stop mode, hardware will exist stop mode - * automatically after system go out of low power mode. - */ - if (priv->devtype_data.quirks & FLEXCAN_QUIRK_AUTO_STOP_MODE) - return 0; - return flexcan_low_power_exit_ack(priv); } @@ -1994,13 +1983,18 @@ static int flexcan_setup_stop_mode(struct platform_device *pdev) ret = flexcan_setup_stop_mode_scfw(pdev); else if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) ret = flexcan_setup_stop_mode_gpr(pdev); - else if (priv->devtype_data.quirks & FLEXCAN_QUIRK_AUTO_STOP_MODE) - ret = 0; else /* return 0 directly if doesn't support stop mode feature */ return 0; - if (ret) + /* If ret is -EINVAL, this means SoC claim to support stop mode, but + * dts file lack the stop mode property definition. For this case, + * directly return 0, this will skip the wakeup capable setting and + * will not block the driver probe. + */ + if (ret == -EINVAL) + return 0; + else if (ret) return ret; device_set_wakeup_capable(&pdev->dev, true); @@ -2320,16 +2314,8 @@ static int __maybe_unused flexcan_noirq_suspend(struct device *device) if (netif_running(dev)) { int err; - if (device_may_wakeup(device)) { + if (device_may_wakeup(device)) flexcan_enable_wakeup_irq(priv, true); - /* For auto stop mode, need to keep the clock on before - * system go into low power mode. After system go into - * low power mode, hardware will config the flexcan into - * stop mode, and gate off the clock automatically. - */ - if (priv->devtype_data.quirks & FLEXCAN_QUIRK_AUTO_STOP_MODE) - return 0; - } err = pm_runtime_force_suspend(device); if (err) @@ -2347,15 +2333,9 @@ static int __maybe_unused flexcan_noirq_resume(struct device *device) if (netif_running(dev)) { int err; - /* For the wakeup in auto stop mode, no need to gate on the - * clock here, hardware will do this automatically. - */ - if (!(device_may_wakeup(device) && - priv->devtype_data.quirks & FLEXCAN_QUIRK_AUTO_STOP_MODE)) { - err = pm_runtime_force_resume(device); - if (err) - return err; - } + err = pm_runtime_force_resume(device); + if (err) + return err; if (device_may_wakeup(device)) flexcan_enable_wakeup_irq(priv, false); diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h index 91402977780b..025c3417031f 100644 --- a/drivers/net/can/flexcan/flexcan.h +++ b/drivers/net/can/flexcan/flexcan.h @@ -68,8 +68,6 @@ #define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(15) /* Device supports RX via FIFO */ #define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16) -/* auto enter stop mode to support wakeup */ -#define FLEXCAN_QUIRK_AUTO_STOP_MODE BIT(17) struct flexcan_devtype_data { u32 quirks; /* quirks needed for different IP cores */