From patchwork Thu Jul 27 14:59:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C49E4C0015E for ; Thu, 27 Jul 2023 15:00:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233033AbjG0PAE (ORCPT ); Thu, 27 Jul 2023 11:00:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231882AbjG0PAD (ORCPT ); Thu, 27 Jul 2023 11:00:03 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 181F7A0; Thu, 27 Jul 2023 08:00:00 -0700 (PDT) X-QQ-mid: bizesmtp79t1690469990tez9w7ke Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 22:59:49 +0800 (CST) X-QQ-SSF: 01200000002000D0X000B00A0000000 X-QQ-FEAT: o+V1LJLjbvzV3UWkDlfl9YJBiuBSM8q6mhAUqw4CiQqpVl10jabxOV5BRj1oV HbzdwK1dZfSy9Si9hrkpLKYGVHNSIqbKzaZuKQe0ENfUC4t4+J1jtY56QV01f9qWUs0MEBj xO1n0TCs6dg3AKUkFjGSUtxXn69Rph8EuhFVPTY26qAGIheptJzjtSC1r3+VpRV/HhkyebM iI9K6GKuhdpCBcIDmqBkRLwdORKtzZ1BqMbxCkPVwRRWDkhK9ySSfydZTf4TOlPBHX5PdLP 0q8FSIGPts2qoYrcuIVfWnEgXfn7z8ArlmsXarZzdscmHKYjVFNQber2igt7jVoK0H6jh1U 1aavyKkizfApndAaRzKENcdMgenrKR2qf0teNAv24lwMMp8xcUj5+irv7XUDTM1+aL6M8Fp FxvKqiFczpw= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 13764612502148830925 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 1/7] tools/nolibc: add support for powerpc Date: Thu, 27 Jul 2023 22:59:48 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Both syscall declarations and _start code definition are added for powerpc to nolibc. Like mips, powerpc uses a register (exactly, the summary overflow bit) to record the error occurred, and uses another register to return the value [1]. So, the return value of every syscall declaration must be normalized to match the __sysret() helper, return -value when there is an error, otheriwse, return value directly. Glibc and musl use different methods to check the summary overflow bit, glibc (sysdeps/unix/sysv/linux/powerpc/sysdep.h) saves the cr register to r0 at first, and then check the summary overflow bit in cr0: mfcr r0 r0 & (1 << 28) ? -r3 : r3 --> 10003c14: 7c 00 00 26 mfcr r0 10003c18: 74 09 10 00 andis. r9,r0,4096 10003c1c: 41 82 00 08 beq 0x10003c24 10003c20: 7c 63 00 d0 neg r3,r3 Musl (arch/powerpc/syscall_arch.h) directly checks the summary overflow bit with the 'bns' instruction, it is smaller: /* no summary overflow bit means no error, return value directly */ bns+ 1f /* otherwise, return negated value */ neg r3, r3 1: --> 10000418: 40 a3 00 08 bns 0x10000420 1000041c: 7c 63 00 d0 neg r3,r3 Like musl, Linux (arch/powerpc/include/asm/vdso/gettimeofday.h) uses the same method for do_syscall_2() too. Here applies the second method to get smaller size. [1]: https://man7.org/linux/man-pages/man2/syscall.2.html Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/include/nolibc/arch-powerpc.h | 188 ++++++++++++++++++++++++++++ tools/include/nolibc/arch.h | 2 + 2 files changed, 190 insertions(+) create mode 100644 tools/include/nolibc/arch-powerpc.h diff --git a/tools/include/nolibc/arch-powerpc.h b/tools/include/nolibc/arch-powerpc.h new file mode 100644 index 000000000000..caa943e1521a --- /dev/null +++ b/tools/include/nolibc/arch-powerpc.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: LGPL-2.1 OR MIT */ +/* + * PowerPC specific definitions for NOLIBC + * Copyright (C) 2023 Zhangjin Wu + */ + +#ifndef _NOLIBC_ARCH_POWERPC_H +#define _NOLIBC_ARCH_POWERPC_H + +#include "compiler.h" +#include "crt.h" + +/* Syscalls for PowerPC : + * - stack is 16-byte aligned + * - syscall number is passed in r0 + * - arguments are in r3, r4, r5, r6, r7, r8, r9 + * - the system call is performed by calling "sc" + * - syscall return comes in r3, and the summary overflow bit is checked + * to know if an error occurred, in which case errno is in r3. + * - the arguments are cast to long and assigned into the target + * registers which are then simply passed as registers to the asm code, + * so that we don't have to experience issues with register constraints. + */ + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "memory", "cr0", "r12", "r11", "r10", "r9" + +#define my_syscall0(num) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num) \ + : \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5", "r4" \ + ); \ + _ret; \ +}) + +#define my_syscall1(num, arg1) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5", "r4" \ + ); \ + _ret; \ +}) + + +#define my_syscall2(num, arg1, arg2) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5" \ + ); \ + _ret; \ +}) + + +#define my_syscall3(num, arg1, arg2, arg3) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6" \ + ); \ + _ret; \ +}) + + +#define my_syscall4(num, arg1, arg2, arg3, arg4) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7" \ + ); \ + _ret; \ +}) + + +#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + register long _arg5 __asm__ ("r7") = (long)(arg5); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4), "+r"(_arg5) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8" \ + ); \ + _ret; \ +}) + +#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + register long _arg5 __asm__ ("r7") = (long)(arg5); \ + register long _arg6 __asm__ ("r8") = (long)(arg6); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4), "+r"(_arg5), "+r"(_arg6) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _ret; \ +}) + +/* startup code */ +void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void) +{ + __asm__ volatile ( + "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ + "clrrwi 1, 1, 4\n" /* align the stack to 16 bytes */ + "li 0, 0\n" /* zero the frame pointer */ + "stwu 1, -16(1)\n" /* the initial stack frame */ + "bl _start_c\n" /* transfer to c runtime */ + ); + __builtin_unreachable(); +} + +#endif /* _NOLIBC_ARCH_POWERPC_H */ diff --git a/tools/include/nolibc/arch.h b/tools/include/nolibc/arch.h index 82b43935650f..e276fb0680af 100644 --- a/tools/include/nolibc/arch.h +++ b/tools/include/nolibc/arch.h @@ -25,6 +25,8 @@ #include "arch-aarch64.h" #elif defined(__mips__) && defined(_ABIO32) #include "arch-mips.h" +#elif defined(__powerpc__) +#include "arch-powerpc.h" #elif defined(__riscv) #include "arch-riscv.h" #elif defined(__s390x__) From patchwork Thu Jul 27 15:00:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01182C41513 for ; Thu, 27 Jul 2023 15:01:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234125AbjG0PBb (ORCPT ); Thu, 27 Jul 2023 11:01:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234165AbjG0PBR (ORCPT ); Thu, 27 Jul 2023 11:01:17 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 369AC30E1; Thu, 27 Jul 2023 08:01:08 -0700 (PDT) X-QQ-mid: bizesmtp84t1690470057tpm9d056 Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 23:00:56 +0800 (CST) X-QQ-SSF: 01200000002000D0X000B00A0000000 X-QQ-FEAT: 5q30pvLz2ifSFQC7zAtcmth9BQ99F3QX7jMGoQfR1aNIOgCwn9uvi1jOuq6K5 0PuPYGvo/MV8ecWP78qlbHD5Awh9SpdMM/dij1uNd4CvRexxNDfexvqQSBSh2Gx0+JEeZ+Y NZGOLfnN2Q72xcYqj7hFOxdWUeT7TfAzG3gm13y+ZkO7eI4AWQ8ktTS8Yq0bd+AM4wt1wgv dZOpd8MvbaVt5IZYU79INQkqbWvU5PbeCA4X45OFVtOeLI4E8zkdfFq9efIB25HUOPCOeDX qw1kZdwDIGJqcSTg6i4GkDspbEI/UYdpVFmre2OMqG6HKLadRhxsQU4aqpwp/+x5JKCvLLZ tfZ5dugbMcB5eAaLWf5qbZVzlcrRoxqiz0n+a+kLIX8Va6VSg7Azn9v5YxnmS8nkDPegwS3 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14503850201614126736 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 2/7] tools/nolibc: add support for powerpc64 Date: Thu, 27 Jul 2023 23:00:55 +0800 Message-Id: <6f9c496695b5d44a3a694abc571e183b80d9081d.1690468707.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org This follows the 64-bit PowerPC ABI [1], refers to the slides: "A new ABI for little-endian PowerPC64 Design & Implementation" [2] and the musl code in arch/powerpc64/crt_arch.h. First, stdu and clrrdi are used instead of stwu and clrrwi for powerpc64. Second, the stack frame size is increased to 32 bytes for powerpc64, 32 bytes is the minimal stack frame size supported described in [2]. Besides, the TOC pointer (GOT pointer) must be saved to r2. This works on both little endian and big endian 64-bit PowerPC. [1]: https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.pdf [2]: https://www.llvm.org/devmtg/2014-04/PDFs/Talks/Euro-LLVM-2014-Weigand.pdf Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/include/nolibc/arch-powerpc.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/include/nolibc/arch-powerpc.h b/tools/include/nolibc/arch-powerpc.h index caa943e1521a..d783ed0b5dbd 100644 --- a/tools/include/nolibc/arch-powerpc.h +++ b/tools/include/nolibc/arch-powerpc.h @@ -175,6 +175,19 @@ /* startup code */ void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void) { +#ifdef __powerpc64__ + /* On 64-bit PowerPC, save TOC/GOT pointer to r2 */ + extern char TOC __asm__ (".TOC."); + register volatile long r2 __asm__ ("r2") = (void *)&TOC - (void *)_start; + + __asm__ volatile ( + "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ + "clrrdi 1, 1, 4\n" /* align the stack to 16 bytes */ + "li 0, 0\n" /* zero the frame pointer */ + "stdu 1, -32(1)\n" /* the initial stack frame */ + "bl _start_c\n" /* transfer to c runtime */ + ); +#else __asm__ volatile ( "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ "clrrwi 1, 1, 4\n" /* align the stack to 16 bytes */ @@ -182,6 +195,7 @@ void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_ "stwu 1, -16(1)\n" /* the initial stack frame */ "bl _start_c\n" /* transfer to c runtime */ ); +#endif __builtin_unreachable(); } From patchwork Thu Jul 27 15:02:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B3B7C0015E for ; Thu, 27 Jul 2023 15:02:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234050AbjG0PC3 (ORCPT ); Thu, 27 Jul 2023 11:02:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231825AbjG0PCX (ORCPT ); Thu, 27 Jul 2023 11:02:23 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66E1230DD; Thu, 27 Jul 2023 08:02:21 -0700 (PDT) X-QQ-mid: bizesmtp83t1690470132tx5a4qcf Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 23:02:11 +0800 (CST) X-QQ-SSF: 01200000002000D0X000B00A0000000 X-QQ-FEAT: 0b1/4t+gNkKytBjCTqeXnq1dFQWJAzuDxRmoAl6R9LQsxrXNcL71OJByKVTCI OFdLjLXL1o+c7vcbOerWQMZZosERU2yYpAZQGKmyHfwhFQXp3ksXlOXeGrA/hYoGsGZeLd+ EYdJXpJm7Ym/nQZlWxOUOkCyI4hN88LC5uMwCYGd8VEKSc1Zsa5rpEerxrnBY2/U3JW828A bWi0k0tb7ZG1Ao68fLJ1H1folKBub3b2By8QBwFT7HZbx6kWVLi6exJprTYBbZ+aUm7Q40W hWFvLT5vYQXYg62jpuLqSfltc27lyaenFJ2nzrkercv63NSzdf2CJ+7CNt4M9hW7RbPkof0 eVpiON3gzl8JwNr7UbaE7I9fU3plbmRKrIFp/Du6XpUvmi4UE55yZu9TLnZIcAKWk3+WxN8 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 1921293056862354421 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 3/7] selftests/nolibc: add extra configs customize support Date: Thu, 27 Jul 2023 23:02:02 +0800 Message-Id: <8e9e5ac6283c6ec2ecf10a70ce55b219028497c1.1690468707.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org The default DEFCONFIG_ may not always work for all architectures, some architectures require to add extra kernel config options, this allows to add extra options in the defconfig target. Based on the .config generated from DEFCONFIG_, It allows to customize extra kernel config options via both the common common.config and the architecture specific .config, at last trigger 'allnoconfig' to let them take effect with missing config options as disabled. The scripts/kconfig/merge_config.sh tool is used to merge the extra config files. Suggested-by: Thomas Weißschuh Link: https://lore.kernel.org/lkml/67eb70d4-c9ff-4afc-bac7-7f36cc2c81bc@t-8ch.de/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index f42adef87e12..9576f1a0a98d 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -39,6 +39,9 @@ DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig DEFCONFIG = $(DEFCONFIG_$(ARCH)) +# extra kernel config files under configs/, include common + architecture specific +EXTCONFIG = common.config $(ARCH).config + # optional tests to run (default = all) TEST = @@ -161,6 +164,8 @@ initramfs: nolibc-test defconfig: $(Q)$(MAKE) -C $(srctree) ARCH=$(ARCH) CC=$(CC) CROSS_COMPILE=$(CROSS_COMPILE) mrproper $(DEFCONFIG) prepare + $(Q)$(srctree)/scripts/kconfig/merge_config.sh -O "$(srctree)" -m "$(srctree)/.config" $(foreach c,$(EXTCONFIG),$(wildcard $(CURDIR)/configs/$c)) + $(Q)$(MAKE) -C $(srctree) ARCH=$(ARCH) CC=$(CC) CROSS_COMPILE=$(CROSS_COMPILE) KCONFIG_ALLCONFIG="$(srctree)/.config" allnoconfig kernel: initramfs $(Q)$(MAKE) -C $(srctree) ARCH=$(ARCH) CC=$(CC) CROSS_COMPILE=$(CROSS_COMPILE) $(IMAGE_NAME) CONFIG_INITRAMFS_SOURCE=$(CURDIR)/initramfs From patchwork Thu Jul 27 15:03:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0390DC0015E for ; Thu, 27 Jul 2023 15:03:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232774AbjG0PDc (ORCPT ); Thu, 27 Jul 2023 11:03:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234106AbjG0PDb (ORCPT ); Thu, 27 Jul 2023 11:03:31 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5406CA0; Thu, 27 Jul 2023 08:03:29 -0700 (PDT) X-QQ-mid: bizesmtp77t1690470199tpjd4kf7 Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 23:03:18 +0800 (CST) X-QQ-SSF: 01200000002000D0X000B00A0000000 X-QQ-FEAT: rZJGTgY0+YMRpS1qYEzYM26oLmGEy05P+ZWt64uSt0g1LCQW3zax2yYj9/qE/ IAqlig2SaXfAtDFWaLCNxZmPwrueHkgrcNnbL1xx/W3qKbQd1y/hoyrrbHEBZZNioU2VNkz NwqYZ3Mx9mOxo6WGpa4NpdfNmDVYc6CcadAUbBBaj46f+OSCxq1WzoFKsW7YA7Yn/sgn+5z MR8/omeirrpLVw8B6PgInOT4aMPnXBPb7m9eovpqVLfpuFYBkqRUO2xlN5TAsruSQi5bmar H4y4KSPH5lx5BFqs2EEhJ5UEzGrO3I6KF6h4Jt3IFdFxHVfIHhlBUQ7iTiWgblGTvr1/cNJ mXtn9RdCG9PuJT7FzaAeRwaaxwKEZtjNvKEbAk1HA10VnWg1fZyFBV5UeCaC9WbiFd6mShN FPhi3BB9CkM= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 16471828213070841702 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 4/7] selftests/nolibc: add XARCH and ARCH mapping support Date: Thu, 27 Jul 2023 23:03:17 +0800 Message-Id: <45cc24c1cf8794782be2ae631ca01bcd136da6d9.1690468707.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Most of the CPU architectures have different variants, but kernel usually only accepts parts of them via the ARCH variable, the others should be customized via kernel config files. To simplify testing, the external ARCH variable is extended to accept more CPU variants from user's input, a new internal XARCH variable is added to save users' ARCH input and used to customize variant specific variables, at last XARCH is converted to the internal ARCH variable acceptable by kernel: e.g. make run ARCH= / v external ARCH from cmdline -> internal XARCH -> internal ARCH for kernel | `--> variant specific variables XARCH and ARCH are carefully mapped to allow users to pass architecture variants via external ARCH (or XARCH) from cmdline: - From developers' perspective - XARCH records the architecture variant from user's ARCH input, after 'override ARCH', ARCH is overridden and mapped from XARCH to the one supported by kernel - Map from XARCH to the kernel supported ARCH: 'ARCH_ = ' - Configure a default variant for kernel supported ARCH: 'XARCH_ = ' - From users' perspective - ARCH (or XARCH) are architecture variants of a target architecture - the variants are XARCH names from the "ARCH_ = " mapping list PowerPC is the first user and also a very good reference architecture of this mapping, it has variants with different combinations of 32-bit/64-bit and bit endian/little endian. To use this mapping, the other architectures can refer to PowerPC, If the target architecture only has one variant, XARCH is simply an alias of ARCH, no additional mapping required. Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/20230702171715.GD16233@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 9576f1a0a98d..5afb3e7d7723 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -14,6 +14,14 @@ include $(srctree)/scripts/subarch.include ARCH = $(SUBARCH) endif +# XARCH is used to save user-input ARCH variant +# configure default variants for target kernel supported architectures +XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) + +# ARCH is supported by kernel +# map from user input variants to their kernel supported architectures +override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) + # kernel image names by architecture IMAGE_i386 = arch/x86/boot/bzImage IMAGE_x86_64 = arch/x86/boot/bzImage @@ -24,7 +32,7 @@ IMAGE_mips = vmlinuz IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi -IMAGE = $(IMAGE_$(ARCH)) +IMAGE = $(IMAGE_$(XARCH)) IMAGE_NAME = $(notdir $(IMAGE)) # default kernel configurations that appear to be usable @@ -37,10 +45,10 @@ DEFCONFIG_mips = malta_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig -DEFCONFIG = $(DEFCONFIG_$(ARCH)) +DEFCONFIG = $(DEFCONFIG_$(XARCH)) # extra kernel config files under configs/, include common + architecture specific -EXTCONFIG = common.config $(ARCH).config +EXTCONFIG = common.config $(XARCH).config # optional tests to run (default = all) TEST = @@ -55,7 +63,7 @@ QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 -QEMU_ARCH = $(QEMU_ARCH_$(ARCH)) +QEMU_ARCH = $(QEMU_ARCH_$(XARCH)) # QEMU_ARGS : some arch-specific args to pass to qemu QEMU_ARGS_i386 = -M pc -append "console=ttyS0,9600 i8042.noaux panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -67,7 +75,7 @@ QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" -QEMU_ARGS = $(QEMU_ARGS_$(ARCH)) $(QEMU_ARGS_EXTRA) +QEMU_ARGS = $(QEMU_ARGS_$(XARCH)) $(QEMU_ARGS_EXTRA) # OUTPUT is only set when run from the main makefile, otherwise # it defaults to this nolibc directory. @@ -84,7 +92,7 @@ CFLAGS_mips = -EL CFLAGS_STACKPROTECTOR ?= $(call cc-option,-mstack-protector-guard=global $(call cc-option,-fstack-protector-all)) CFLAGS ?= -Os -fno-ident -fno-asynchronous-unwind-tables -std=c89 \ $(call cc-option,-fno-stack-protector) \ - $(CFLAGS_$(ARCH)) $(CFLAGS_STACKPROTECTOR) + $(CFLAGS_$(XARCH)) $(CFLAGS_STACKPROTECTOR) LDFLAGS := -s REPORT ?= awk '/\[OK\][\r]*$$/{p++} /\[FAIL\][\r]*$$/{if (!f) printf("\n"); f++; print;} /\[SKIPPED\][\r]*$$/{s++} \ @@ -111,12 +119,13 @@ help: @echo "" @echo "Currently using the following variables:" @echo " ARCH = $(ARCH)" + @echo " XARCH = $(XARCH)" @echo " CROSS_COMPILE = $(CROSS_COMPILE)" @echo " CC = $(CC)" @echo " OUTPUT = $(OUTPUT)" @echo " TEST = $(TEST)" - @echo " QEMU_ARCH = $(if $(QEMU_ARCH),$(QEMU_ARCH),UNKNOWN_ARCH) [determined from \$$ARCH]" - @echo " IMAGE_NAME = $(if $(IMAGE_NAME),$(IMAGE_NAME),UNKNOWN_ARCH) [determined from \$$ARCH]" + @echo " QEMU_ARCH = $(if $(QEMU_ARCH),$(QEMU_ARCH),UNKNOWN_ARCH) [determined from \$$XARCH]" + @echo " IMAGE_NAME = $(if $(IMAGE_NAME),$(IMAGE_NAME),UNKNOWN_ARCH) [determined from \$$XARCH]" @echo "" all: run From patchwork Thu Jul 27 15:04:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38237C04A6A for ; Thu, 27 Jul 2023 15:04:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234276AbjG0PEj (ORCPT ); Thu, 27 Jul 2023 11:04:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232513AbjG0PEi (ORCPT ); Thu, 27 Jul 2023 11:04:38 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 243061B8; Thu, 27 Jul 2023 08:04:34 -0700 (PDT) X-QQ-mid: bizesmtp70t1690470266t586bzuu Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 23:04:25 +0800 (CST) X-QQ-SSF: 01200000002000D0X000B00A0000000 X-QQ-FEAT: 3M0okmaRx3gPFTAlMPOq33XYBppQ3ibHL9kcA4lcT102GiH/EzFE2/pUKdKg/ qX746XefN/rEXBljm6dggSvFNhOHt957ygPgTxnvJDL8JQuUCQhkrUB/2CT/zuq1iuCqXxz X3enym8Rq/k8b/Ex50PlgNuPDG11o6TQHTdWK5gR9JBdQxtqcFZQG2oNeXGqbQW66HJQv/g 44i3g4qQQaZgDCTy5SChRCYUYs1rq3zW9h2ZJBr7KkJHhMYikt750oVmV3M0KLZbQVYLVPA sH6GpIGoWlyh+iQB0EZ14rHAetiIANAQlOyk3o918hY9MfrU7lkwNgDo2RzT8R61jTasdTg aey92Igt3Y4evnlgFO5IrY+GpTTvO1VprhEewU5/qacrSvOqXBQSqUP7U7sxDEFCOi3W93c CuqI6uKNy58= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14717604939975229498 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 5/7] selftests/nolibc: add test support for ppc Date: Thu, 27 Jul 2023 23:04:24 +0800 Message-Id: <8019280baee8efb6c82f5ce766fcd826b7d1ffa2.1690468707.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc variant for 32-bit PowerPC and uses it as the default variant of powerpc architecture. Users can pass ARCH=powerpc or ARCH=ppc to test 32-bit PowerPC. The default qemu-system-ppc g3beige machine [1] is used to run 32-bit powerpc kernel. The pmac32_defconfig is used with extra PMACZILOG console options to enable normal print. Note, zImage doesn't boot due to "qemu-system-ppc: Some ROM regions are overlapping" error, so, vmlinux is used instead. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powermac.html Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/ZL9leVOI25S2+0+g@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ tools/testing/selftests/nolibc/configs/ppc.config | 3 +++ 2 files changed, 9 insertions(+) create mode 100644 tools/testing/selftests/nolibc/configs/ppc.config diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 5afb3e7d7723..832b9ffcbac4 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -16,10 +16,12 @@ endif # XARCH is used to save user-input ARCH variant # configure default variants for target kernel supported architectures +XARCH_powerpc = ppc XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) # ARCH is supported by kernel # map from user input variants to their kernel supported architectures +ARCH_ppc = powerpc override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) # kernel image names by architecture @@ -29,6 +31,7 @@ IMAGE_x86 = arch/x86/boot/bzImage IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz +IMAGE_ppc = vmlinux IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi @@ -42,6 +45,7 @@ DEFCONFIG_x86 = defconfig DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig +DEFCONFIG_ppc = pmac32_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig @@ -60,6 +64,7 @@ QEMU_ARCH_x86 = x86_64 QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig +QEMU_ARCH_ppc = ppc QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 @@ -72,6 +77,7 @@ QEMU_ARGS_x86 = -M pc -append "console=ttyS0,9600 i8042.noaux panic=-1 $( QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" diff --git a/tools/testing/selftests/nolibc/configs/ppc.config b/tools/testing/selftests/nolibc/configs/ppc.config new file mode 100644 index 000000000000..b1975f8253f7 --- /dev/null +++ b/tools/testing/selftests/nolibc/configs/ppc.config @@ -0,0 +1,3 @@ +CONFIG_SERIAL_PMACZILOG=y +CONFIG_SERIAL_PMACZILOG_TTYS=y +CONFIG_SERIAL_PMACZILOG_CONSOLE=y From patchwork Thu Jul 27 15:05:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A3C7C0015E for ; Thu, 27 Jul 2023 15:06:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234238AbjG0PGK (ORCPT ); Thu, 27 Jul 2023 11:06:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234071AbjG0PGC (ORCPT ); Thu, 27 Jul 2023 11:06:02 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DC513580; Thu, 27 Jul 2023 08:05:41 -0700 (PDT) X-QQ-mid: bizesmtp67t1690470333tzc09r3u Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 23:05:31 +0800 (CST) X-QQ-SSF: 00200000002000D0X000B00A0000000 X-QQ-FEAT: 5BP7ZNt7eRyf34CxtucAQAfsvm30aKLxWwpGcUMdbIAkEmUhQACiIYB6RDjgg aJwCWkc9z28OPeCuI3KZo0CdSLLs8Sizs3GF7e8WGhYgbAjTn9r2PtzGecsF5dX8ueplQMX Wi2+Tbpu81qCIXK8hNhZcHEeOfo818u2cMH+8NEFxem5un8Dq6TZC0XG/IISIAy2NKAIz9g KQCPmtYoCmMVYiKyiEwEZ3GX8PYInd4y1RIXll+/z5CcK7Vz8AFslSmnG33418nngUV52PO 7aS+2DOpRDU0veUAeUWrBOwEp5jk9OSmgl5hjYfwc1bsXawYVuewNBHqYKI3fsS8mI8flf6 AlTOENlVSptSEDVu7eYim07up29Dvw41djYiGxfl3TfgO18r2qC6HcqC6nMeirnivno5Lsq talUDGXePso= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 2722823772800316655 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 6/7] selftests/nolibc: add test support for ppc64le Date: Thu, 27 Jul 2023 23:05:31 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc64le variant for little endian 64-bit PowerPC, users can pass ARCH=ppc64le to test it. The powernv machine of qemu-system-ppc64le is used for there is just a working powernv_defconfig. As the document [1] shows: PowerNV (as Non-Virtualized) is the “bare metal” platform using the OPAL firmware. It runs Linux on IBM and OpenPOWER systems and it can be used as an hypervisor OS, running KVM guests, or simply as a host OS. Note, since the VSX support may be disabled in kernel side, to avoid "illegal instruction" errors due to missing VSX kernel support, let's simply let compiler not generate vector/scalar (VSX) instructions via the '-mno-vsx' option. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powernv.html Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/20230722120747.GC17311@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 832b9ffcbac4..dfc411cd4f10 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -22,6 +22,7 @@ XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) # ARCH is supported by kernel # map from user input variants to their kernel supported architectures ARCH_ppc = powerpc +ARCH_ppc64le = powerpc override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) # kernel image names by architecture @@ -32,6 +33,7 @@ IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz IMAGE_ppc = vmlinux +IMAGE_ppc64le = arch/powerpc/boot/zImage IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi @@ -46,6 +48,7 @@ DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig DEFCONFIG_ppc = pmac32_defconfig +DEFCONFIG_ppc64le = powernv_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig @@ -65,6 +68,7 @@ QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_ppc = ppc +QEMU_ARCH_ppc64le = ppc64le QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 @@ -78,6 +82,7 @@ QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc64le = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -93,6 +98,7 @@ else Q=@ endif +CFLAGS_ppc64le = -m64 -mlittle-endian -Wl,-EL,-melf64ppc -mno-vsx CFLAGS_s390 = -m64 CFLAGS_mips = -EL CFLAGS_STACKPROTECTOR ?= $(call cc-option,-mstack-protector-guard=global $(call cc-option,-fstack-protector-all)) From patchwork Thu Jul 27 15:06:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 13330272 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EBE8C0015E for ; Thu, 27 Jul 2023 15:07:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233337AbjG0PHK (ORCPT ); Thu, 27 Jul 2023 11:07:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229965AbjG0PHJ (ORCPT ); Thu, 27 Jul 2023 11:07:09 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C6DE3AB1; Thu, 27 Jul 2023 08:06:53 -0700 (PDT) X-QQ-mid: bizesmtp87t1690470403thpm20hj Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 27 Jul 2023 23:06:42 +0800 (CST) X-QQ-SSF: 00200000002000D0X000B00A0000000 X-QQ-FEAT: 3M0okmaRx3grTgKwDU4jisbzGh+NZB7/xNo7K2n7uIroM5MCBcugnNk/fjg7e lQqqPh9SBo2j9DNGY7/7MXuFTe06T2qvVSYMBDAn2ENkrV0kQwdMV6eC5OouGaK6zJDhNEI +WDXje/sDVWhnrPey77Lwqa5xhgbPbrqJt0wqv8ABuqd5xCSh/2YAzGjIv6m5psSufdeLFM EE29nEQzSH0b8yQx4cYaqEk/50MVNrWCfIcv+sNF4E+K7D77ajYyJ9wxfWewJSiFdVRkxcI 3qKxYr8A60XCB4fOIc6rq6SieoZQGb/dppeNFPzjsV1bG04O2CgIZVcMF4vm5yphsrVuNWz zMOB9OQ1uQPYjP8o3DDSi9ytLgZhrJDMb7F6SfkkERr0lazpROqTJC+rWIpOAW/WsVGxmCb Ry4Nx2LKCsQ= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 100620124007279467 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v3 7/7] selftests/nolibc: add test support for ppc64 Date: Thu, 27 Jul 2023 23:06:38 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc64 variant for big endian 64-bit PowerPC, users can pass ARCH=ppc64 to test it. The powernv machine of qemu-system-ppc64 is used with powernv_be_defconfig. As the document [1] shows: PowerNV (as Non-Virtualized) is the “bare metal” platform using the OPAL firmware. It runs Linux on IBM and OpenPOWER systems and it can be used as an hypervisor OS, running KVM guests, or simply as a host OS. Notes, - differs from little endian 64-bit PowerPC, vmlinux is used instead of zImage, because big endian zImage [2] only boot on qemu with x-vof=on (added from qemu v7.0) and a fixup patch [3] for qemu v7.0.51: - since the VSX support may be disabled in kernel side, to avoid "illegal instruction" errors due to missing VSX kernel support, let's simply let compiler not generate vector/scalar (VSX) instructions via the '-mno-vsx' option. - as 'man gcc' shows, '-mmultiple' is used to generate code that uses the load multiple word instructions and the store multiple word instructions. Those instructions do not work when the processor is in little-endian mode (except PPC740/PPC750), so, we only enable it for big endian powerpc. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powernv.html [2]: https://github.com/linuxppc/issues/issues/402 [3]: https://lore.kernel.org/qemu-devel/20220504065536.3534488-1-aik@ozlabs.ru/ Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/20230722121019.GD17311@1wt.eu/ Link: https://lore.kernel.org/lkml/20230719043353.GC5331@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index dfc411cd4f10..2e9694370913 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -22,6 +22,7 @@ XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) # ARCH is supported by kernel # map from user input variants to their kernel supported architectures ARCH_ppc = powerpc +ARCH_ppc64 = powerpc ARCH_ppc64le = powerpc override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) @@ -33,6 +34,7 @@ IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz IMAGE_ppc = vmlinux +IMAGE_ppc64 = vmlinux IMAGE_ppc64le = arch/powerpc/boot/zImage IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage @@ -48,6 +50,7 @@ DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig DEFCONFIG_ppc = pmac32_defconfig +DEFCONFIG_ppc64 = powernv_be_defconfig DEFCONFIG_ppc64le = powernv_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig @@ -68,6 +71,7 @@ QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_ppc = ppc +QEMU_ARCH_ppc64 = ppc64 QEMU_ARCH_ppc64le = ppc64le QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x @@ -82,6 +86,7 @@ QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc64 = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc64le = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -98,6 +103,7 @@ else Q=@ endif +CFLAGS_ppc64 = -m64 -mbig-endian -Wl,-EB,-melf64ppc -mmultiple -mno-vsx CFLAGS_ppc64le = -m64 -mlittle-endian -Wl,-EL,-melf64ppc -mno-vsx CFLAGS_s390 = -m64 CFLAGS_mips = -EL