From patchwork Fri Jul 28 07:58:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alejandro Vallejo X-Patchwork-Id: 13331340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4E8E8C0015E for ; Fri, 28 Jul 2023 07:59:36 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.571350.894988 (Exim 4.92) (envelope-from ) id 1qPINc-0006qL-VT; Fri, 28 Jul 2023 07:59:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 571350.894988; Fri, 28 Jul 2023 07:59:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qPINc-0006ot-Sb; Fri, 28 Jul 2023 07:59:20 +0000 Received: by outflank-mailman (input) for mailman id 571350; Fri, 28 Jul 2023 07:59:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qPINb-0006EL-9V for xen-devel@lists.xenproject.org; Fri, 28 Jul 2023 07:59:19 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a61b6bde-2d1c-11ee-8613-37d641c3527e; Fri, 28 Jul 2023 09:59:16 +0200 (CEST) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-31771bb4869so1859753f8f.0 for ; Fri, 28 Jul 2023 00:59:16 -0700 (PDT) Received: from EMEAENGAAD19049.citrite.net ([2.223.46.215]) by smtp.gmail.com with ESMTPSA id x2-20020adfdd82000000b0030e56a9ff25sm4089629wrl.31.2023.07.28.00.59.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Jul 2023 00:59:15 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a61b6bde-2d1c-11ee-8613-37d641c3527e DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1690531155; x=1691135955; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z6LGxVoqrbyniZKGQimBNpKjG2ea1pNL9RlwcBoVEA0=; b=ZqisHGXjloTP0NJo+9UiMSWXzZrPHs0fUyBrdm+3M0pJU8kPD1Fuu5Z3Pu4ELNuofe qR9hDkHuaYzNguYnGATiWrzxeqWN1FUU0t72yN8cIxUj/+0yd0lC0ES1RnPZ1dnBO4yy KVBq/GLMcGgM8bGVfQwjl0ZGlASfIL9NuO1ME= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690531155; x=1691135955; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z6LGxVoqrbyniZKGQimBNpKjG2ea1pNL9RlwcBoVEA0=; b=SpOEADcPxk5tE8gVUmBOeuvrnlJRpBvOyeV5QcxxdsyPvWB4tNZCTrMDgk3bJd2PGX BrF6zhgl2b4YQwf5tU4WiB9YSzMHvlp2amMqHD8TiMfThQpl+XoFL1FAN7VF1rW0LEBK fpdSR870elunJ1WyRvkz67rEHs+WywRFTCR62tAN52vIqX/u6WjCeMMQ5OD5ujKp0L3p VRXwP75NGoLaj1X56JrbNzjQgLm+0zMLhr+b4aMHN4YL689c1BGmRjQFYoHXBfh1bT8J GsmkANDR+qrnNVrMUqca8JAwZiJWXmsjGcNhGQQFimenv4sPFcr7okrjU2SRjbZT7Ub4 yVYQ== X-Gm-Message-State: ABy/qLbcOJmzwaW9frm6f9ZgktHh1bgb17DJfF02nchKxUS6S7c9D3Wn /Au954kmxH6R5BT30SPcyn+pCXgELzhpxwYPvdBgBw== X-Google-Smtp-Source: APBJJlEf1wAZoLY/cYf2pZpXrEVC0OGLC9BXQ/87moiBUOlRFOu3rvFqU/5SQogyDrsr7f6W7RffRA== X-Received: by 2002:a5d:43c3:0:b0:314:1aed:8f5f with SMTP id v3-20020a5d43c3000000b003141aed8f5fmr1129148wrr.34.1690531155546; Fri, 28 Jul 2023 00:59:15 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v2 1/5] arm/mm: Document the differences between arm32 and arm64 directmaps Date: Fri, 28 Jul 2023 08:58:59 +0100 Message-Id: <20230728075903.7838-2-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728075903.7838-1-alejandro.vallejo@cloud.com> References: <20230728075903.7838-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 arm32 merely covers the XENHEAP, whereas arm64 currently covers anything in the frame table. These comments highlight why arm32 doesn't need to account for PDX compression in its __va() implementation while arm64 does. Signed-off-by: Alejandro Vallejo Reviewed-by: Julien Grall --- v2: * Removed statement about "containing GiB" (Julien) --- xen/arch/arm/include/asm/mm.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 4262165ce2..5b530f0f40 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -280,6 +280,19 @@ static inline paddr_t __virt_to_maddr(vaddr_t va) #define virt_to_maddr(va) __virt_to_maddr((vaddr_t)(va)) #ifdef CONFIG_ARM_32 +/** + * Find the virtual address corresponding to a machine address + * + * Only memory backing the XENHEAP has a corresponding virtual address to + * be found. This is so we can save precious virtual space, as it's in + * short supply on arm32. This mapping is not subject to PDX compression + * because XENHEAP is known to be physically contiguous and can't hence + * jump over the PDX hole. This means we can avoid the roundtrips + * converting to/from pdx. + * + * @param ma Machine address + * @return Virtual address mapped to `ma` + */ static inline void *maddr_to_virt(paddr_t ma) { ASSERT(is_xen_heap_mfn(maddr_to_mfn(ma))); @@ -287,6 +300,19 @@ static inline void *maddr_to_virt(paddr_t ma) return (void *)(unsigned long) ma + XENHEAP_VIRT_START; } #else +/** + * Find the virtual address corresponding to a machine address + * + * The directmap covers all conventional memory accesible by the + * hypervisor. This means it's subject to PDX compression. + * + * Note there's an extra offset applied (directmap_base_pdx) on top of the + * regular PDX compression logic. Its purpose is to skip over the initial + * range of non-existing memory, should there be one. + * + * @param ma Machine address + * @return Virtual address mapped to `ma` + */ static inline void *maddr_to_virt(paddr_t ma) { ASSERT((mfn_to_pdx(maddr_to_mfn(ma)) - directmap_base_pdx) < From patchwork Fri Jul 28 07:59:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alejandro Vallejo X-Patchwork-Id: 13331341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2497C0015E for ; Fri, 28 Jul 2023 07:59:38 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.571348.894967 (Exim 4.92) (envelope-from ) id 1qPINb-0006GR-AW; Fri, 28 Jul 2023 07:59:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 571348.894967; Fri, 28 Jul 2023 07:59:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qPINb-0006GD-6L; Fri, 28 Jul 2023 07:59:19 +0000 Received: by outflank-mailman (input) for mailman id 571348; Fri, 28 Jul 2023 07:59:18 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qPINZ-0006Dw-W6 for xen-devel@lists.xenproject.org; Fri, 28 Jul 2023 07:59:17 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a6a4c6db-2d1c-11ee-b24d-6b7b168915f2; Fri, 28 Jul 2023 09:59:17 +0200 (CEST) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3fe078dcc3aso3667735e9.2 for ; Fri, 28 Jul 2023 00:59:17 -0700 (PDT) Received: from EMEAENGAAD19049.citrite.net ([2.223.46.215]) by smtp.gmail.com with ESMTPSA id x2-20020adfdd82000000b0030e56a9ff25sm4089629wrl.31.2023.07.28.00.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Jul 2023 00:59:15 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a6a4c6db-2d1c-11ee-b24d-6b7b168915f2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1690531157; x=1691135957; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gt7MNId42NKzPH0LoomOcyWXMl9Ow7M05CuxT4VL3vE=; b=ihzhbyOMiOe6/fCo3LmEqaQjxwMArNoiDj9g23OikZX3YEN+jnulWtI+iCqwhRCpVf Vdhy+DqWq0Vf9fL72lxJ3krkkuyHZ3SkABo4+/2yhmg+8sQv4qh94aHW+EYq/9IqIboN l+FVMc9ipD4SHHa4uhKJ4345dMi74v/8HEm1k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690531157; x=1691135957; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gt7MNId42NKzPH0LoomOcyWXMl9Ow7M05CuxT4VL3vE=; b=KvAWZM0WOda0pAovmZIUs7+lQS8c90iwRN7KP6ajSXNjkdsyr6w56oyhUB9jJmgRn3 0yCmfrfAR2BRV+SHpb4F4CD6WZBzZ4mUQ+CWThRlg1Wiu9avpceYalhWghreDg5+YlAg AEAbDKDBIB1ZR7JBsxC7L3y76hkrPf84y1GAhIej4LYmLoqiih5PkLxTLOtfs+iXBu/Y 8wYU0skirw0RbEJfbIe9njpnFGU8Ujw+AK5Lp+a60/cfMcPzykEH1x+ENceAObwFpH13 bQlwFANQQJSP5IP+v8pZ7hI7/NlG6Doqe6wgYUIXfIM+DqjMd+zH5h1FY6H33Brs/CJg 2rjA== X-Gm-Message-State: ABy/qLZq5Z9OI6tuSxZgHeWvnLyimV6Iwgbn5FWc4HcofnXjCxG0ibPm raiduS1ReRmB/FPx7/qMvJIOheNWQ/ZTj1i9eVn9nQ== X-Google-Smtp-Source: APBJJlEAvsPA2G6iRDxTSJAWiZjDXyB+jNdecDwz4ksSRdcfd3N5Whf7AuucdMUNf6QHOHK68TUHNA== X-Received: by 2002:a05:600c:2048:b0:3f9:b30f:a013 with SMTP id p8-20020a05600c204800b003f9b30fa013mr1237444wmg.6.1690531156785; Fri, 28 Jul 2023 00:59:16 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , George Dunlap , Jan Beulich , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [PATCH v2 2/5] mm: Factor out the pdx compression logic in ma/va converters Date: Fri, 28 Jul 2023 08:59:00 +0100 Message-Id: <20230728075903.7838-3-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728075903.7838-1-alejandro.vallejo@cloud.com> References: <20230728075903.7838-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 This patch factors out the pdx compression logic hardcoded in both ports for the maddr<->vaddr conversion functions. Touches both x86 and arm ports. Signed-off-by: Alejandro Vallejo Reviewed-by: Julien Grall --- v2: * Cast variable to u64 before shifting left to avoid overflow (Julien) --- xen/arch/arm/include/asm/mm.h | 3 +-- xen/arch/x86/include/asm/x86_64/page.h | 28 +++++++++++--------------- xen/include/xen/pdx.h | 25 +++++++++++++++++++++++ 3 files changed, 38 insertions(+), 18 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 5b530f0f40..c0d7f0f181 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -319,8 +319,7 @@ static inline void *maddr_to_virt(paddr_t ma) (DIRECTMAP_SIZE >> PAGE_SHIFT)); return (void *)(XENHEAP_VIRT_START - (directmap_base_pdx << PAGE_SHIFT) + - ((ma & ma_va_bottom_mask) | - ((ma & ma_top_mask) >> pfn_pdx_hole_shift))); + maddr_to_directmapoff(ma)); } #endif diff --git a/xen/arch/x86/include/asm/x86_64/page.h b/xen/arch/x86/include/asm/x86_64/page.h index 53faa7875b..b589c93e77 100644 --- a/xen/arch/x86/include/asm/x86_64/page.h +++ b/xen/arch/x86/include/asm/x86_64/page.h @@ -36,26 +36,22 @@ static inline unsigned long __virt_to_maddr(unsigned long va) { ASSERT(va < DIRECTMAP_VIRT_END); if ( va >= DIRECTMAP_VIRT_START ) - va -= DIRECTMAP_VIRT_START; - else - { - BUILD_BUG_ON(XEN_VIRT_END - XEN_VIRT_START != GB(1)); - /* Signed, so ((long)XEN_VIRT_START >> 30) fits in an imm32. */ - ASSERT(((long)va >> (PAGE_ORDER_1G + PAGE_SHIFT)) == - ((long)XEN_VIRT_START >> (PAGE_ORDER_1G + PAGE_SHIFT))); - - va += xen_phys_start - XEN_VIRT_START; - } - return (va & ma_va_bottom_mask) | - ((va << pfn_pdx_hole_shift) & ma_top_mask); + return directmapoff_to_maddr(va - DIRECTMAP_VIRT_START); + + BUILD_BUG_ON(XEN_VIRT_END - XEN_VIRT_START != GB(1)); + /* Signed, so ((long)XEN_VIRT_START >> 30) fits in an imm32. */ + ASSERT(((long)va >> (PAGE_ORDER_1G + PAGE_SHIFT)) == + ((long)XEN_VIRT_START >> (PAGE_ORDER_1G + PAGE_SHIFT))); + + return xen_phys_start + va - XEN_VIRT_START; } static inline void *__maddr_to_virt(unsigned long ma) { - ASSERT(pfn_to_pdx(ma >> PAGE_SHIFT) < (DIRECTMAP_SIZE >> PAGE_SHIFT)); - return (void *)(DIRECTMAP_VIRT_START + - ((ma & ma_va_bottom_mask) | - ((ma & ma_top_mask) >> pfn_pdx_hole_shift))); + /* Offset in the direct map, accounting for pdx compression */ + size_t va_offset = maddr_to_directmapoff(ma); + ASSERT(va_offset < DIRECTMAP_SIZE); + return (void *)(DIRECTMAP_VIRT_START + va_offset); } /* read access (should only be used for debug printk's) */ diff --git a/xen/include/xen/pdx.h b/xen/include/xen/pdx.h index de5439a5e5..d96f03d6e6 100644 --- a/xen/include/xen/pdx.h +++ b/xen/include/xen/pdx.h @@ -160,6 +160,31 @@ static inline unsigned long pdx_to_pfn(unsigned long pdx) #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) +/** + * Computes the offset into the direct map of an maddr + * + * @param ma Machine address + * @return Offset on the direct map where that + * machine address can be accessed + */ +static inline unsigned long maddr_to_directmapoff(uint64_t ma) +{ + return ((ma & ma_top_mask) >> pfn_pdx_hole_shift) | + (ma & ma_va_bottom_mask); +} + +/** + * Computes a machine address given a direct map offset + * + * @param offset Offset into the direct map + * @return Corresponding machine address of that virtual location + */ +static inline uint64_t directmapoff_to_maddr(unsigned long offset) +{ + return (((uint64_t)offset << pfn_pdx_hole_shift) & ma_top_mask) | + (offset & ma_va_bottom_mask); +} + /** * Initializes global variables with information about the compressible * range of the current memory regions. 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That is, whether any of the machine addresses spanning the region have a bit set in the pdx "hole" (which is expected to always contain zeroes). There are a few such tests through the code, and they all check for different things. This patch replaces all such occurrences with a call to a centralized function that checks a region for validity. Signed-off-by: Alejandro Vallejo Reviewed-by: Julien Grall --- v2: * s/occurences/ocurrences in commit message (Julien) * Use pfn_to_paddr()/paddr_to_pfn() (Julien) * Use (paddr_t,unsigned long) in pdx_is_region_compressible() (Julien, Jan) --- xen/arch/x86/x86_64/mm.c | 7 +++++-- xen/common/efi/boot.c | 13 ++++++++++--- xen/common/pdx.c | 10 ++++++++-- xen/include/xen/pdx.h | 9 +++++++++ 4 files changed, 32 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 60db439af3..652e787934 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1159,6 +1159,9 @@ static int mem_hotadd_check(unsigned long spfn, unsigned long epfn) { unsigned long s, e, length, sidx, eidx; + paddr_t mem_base = pfn_to_paddr(spfn); + unsigned long mem_npages = epfn - spfn; + if ( (spfn >= epfn) ) return 0; @@ -1168,7 +1171,7 @@ static int mem_hotadd_check(unsigned long spfn, unsigned long epfn) if ( (spfn | epfn) & ((1UL << PAGETABLE_ORDER) - 1) ) return 0; - if ( (spfn | epfn) & pfn_hole_mask ) + if ( !pdx_is_region_compressible(mem_base, mem_npages) ) return 0; /* Make sure the new range is not present now */ @@ -1207,7 +1210,7 @@ static int mem_hotadd_check(unsigned long spfn, unsigned long epfn) length += (e - s) * sizeof(struct page_info); - if ((length >> PAGE_SHIFT) > (epfn - spfn)) + if ((length >> PAGE_SHIFT) > mem_npages) return 0; return 1; diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index 79a654af69..52a7239389 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #if EFI_PAGE_SIZE != PAGE_SIZE # error Cannot use xen/pfn.h here! @@ -1645,9 +1646,11 @@ static __init void copy_mapping(unsigned long mfn, unsigned long end, static bool __init cf_check ram_range_valid(unsigned long smfn, unsigned long emfn) { + paddr_t ram_base = pfn_to_paddr(smfn); + unsigned long ram_npages = emfn - smfn; unsigned long sz = pfn_to_pdx(emfn - 1) / PDX_GROUP_COUNT + 1; - return !(smfn & pfn_hole_mask) && + return pdx_is_region_compressible(ram_base, ram_npages) && find_next_bit(pdx_group_valid, sz, pfn_to_pdx(smfn) / PDX_GROUP_COUNT) < sz; } @@ -1660,6 +1663,8 @@ static bool __init cf_check rt_range_valid(unsigned long smfn, unsigned long emf void __init efi_init_memory(void) { + paddr_t mem_base; + unsigned long mem_npages; unsigned int i; l4_pgentry_t *efi_l4t; struct rt_extra { @@ -1732,6 +1737,9 @@ void __init efi_init_memory(void) smfn = PFN_DOWN(desc->PhysicalStart); emfn = PFN_UP(desc->PhysicalStart + len); + mem_base = pfn_to_paddr(smfn); + mem_npages = emfn - smfn; + if ( desc->Attribute & EFI_MEMORY_WB ) prot |= _PAGE_WB; else if ( desc->Attribute & EFI_MEMORY_WT ) @@ -1759,8 +1767,7 @@ void __init efi_init_memory(void) prot |= _PAGE_NX; if ( pfn_to_pdx(emfn - 1) < (DIRECTMAP_SIZE >> PAGE_SHIFT) && - !(smfn & pfn_hole_mask) && - !((smfn ^ (emfn - 1)) & ~pfn_pdx_bottom_mask) ) + pdx_is_region_compressible(mem_base, mem_npages)) { if ( (unsigned long)mfn_to_virt(emfn - 1) >= HYPERVISOR_VIRT_END ) prot &= ~_PAGE_GLOBAL; diff --git a/xen/common/pdx.c b/xen/common/pdx.c index 99d4a90a50..3c88ceeb9c 100644 --- a/xen/common/pdx.c +++ b/xen/common/pdx.c @@ -88,7 +88,7 @@ bool __mfn_valid(unsigned long mfn) } /* Sets all bits from the most-significant 1-bit down to the LSB */ -static uint64_t __init fill_mask(uint64_t mask) +static uint64_t fill_mask(uint64_t mask) { while (mask & (mask + 1)) mask |= mask + 1; @@ -96,6 +96,12 @@ static uint64_t __init fill_mask(uint64_t mask) return mask; } +bool pdx_is_region_compressible(paddr_t base, unsigned long npages) +{ + return !(paddr_to_pfn(base) & pfn_hole_mask) && + !(pdx_region_mask(base, npages * PAGE_SIZE) & ~ma_va_bottom_mask); +} + /* We don't want to compress the low MAX_ORDER bits of the addresses. */ uint64_t __init pdx_init_mask(uint64_t base_addr) { @@ -103,7 +109,7 @@ uint64_t __init pdx_init_mask(uint64_t base_addr) (uint64_t)1 << (MAX_ORDER + PAGE_SHIFT)) - 1); } -uint64_t __init pdx_region_mask(uint64_t base, uint64_t len) +uint64_t pdx_region_mask(uint64_t base, uint64_t len) { /* * We say a bit "moves" in a range if there exist 2 addresses in that diff --git a/xen/include/xen/pdx.h b/xen/include/xen/pdx.h index d96f03d6e6..8c6aec2aea 100644 --- a/xen/include/xen/pdx.h +++ b/xen/include/xen/pdx.h @@ -79,6 +79,15 @@ extern unsigned long pfn_top_mask, ma_top_mask; (sizeof(*frame_table) & -sizeof(*frame_table))) extern unsigned long pdx_group_valid[]; +/** + * Validate a region's compatibility with the current compression runtime + * + * @param base Base address of the region + * @param npages Number of PAGE_SIZE-sized pages in the region + * @return True iff the region can be used with the current compression + */ +bool pdx_is_region_compressible(paddr_t base, unsigned long npages); + /** * Calculates a mask covering "moving" bits of all addresses of a region * From patchwork Fri Jul 28 07:59:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alejandro Vallejo X-Patchwork-Id: 13331345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F4BFC04A94 for ; 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Fri, 28 Jul 2023 00:59:18 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu Subject: [PATCH v2 4/5] pdx: Reorder pdx.[ch] Date: Fri, 28 Jul 2023 08:59:02 +0100 Message-Id: <20230728075903.7838-5-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728075903.7838-1-alejandro.vallejo@cloud.com> References: <20230728075903.7838-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 The next patch compiles out compression-related chunks, and it's helpful to have them grouped together beforehand. Signed-off-by: Alejandro Vallejo Acked-by: Julien Grall --- v2: * Fix rebase error by which some function prototypes were left intact when they should've been removed --- xen/common/pdx.c | 58 +++++++++++++++++++++--------------------- xen/include/xen/pdx.h | 59 ++++++++++++++++++++++--------------------- 2 files changed, 59 insertions(+), 58 deletions(-) diff --git a/xen/common/pdx.c b/xen/common/pdx.c index 3c88ceeb9c..d3d38965bd 100644 --- a/xen/common/pdx.c +++ b/xen/common/pdx.c @@ -20,6 +20,35 @@ #include #include +/** + * Maximum (non-inclusive) usable pdx. Must be + * modifiable after init due to memory hotplug + */ +unsigned long __read_mostly max_pdx; + +unsigned long __read_mostly pdx_group_valid[BITS_TO_LONGS( + (FRAMETABLE_NR + PDX_GROUP_COUNT - 1) / PDX_GROUP_COUNT)] = { [0] = 1 }; + +bool __mfn_valid(unsigned long mfn) +{ + if ( unlikely(evaluate_nospec(mfn >= max_page)) ) + return false; + return likely(!(mfn & pfn_hole_mask)) && + likely(test_bit(pfn_to_pdx(mfn) / PDX_GROUP_COUNT, + pdx_group_valid)); +} + +void set_pdx_range(unsigned long smfn, unsigned long emfn) +{ + unsigned long idx, eidx; + + idx = pfn_to_pdx(smfn) / PDX_GROUP_COUNT; + eidx = (pfn_to_pdx(emfn - 1) + PDX_GROUP_COUNT) / PDX_GROUP_COUNT; + + for ( ; idx < eidx; ++idx ) + __set_bit(idx, pdx_group_valid); +} + /* * Diagram to make sense of the following variables. The masks and shifts * are done on mfn values in order to convert to/from pdx: @@ -47,12 +76,6 @@ * ones. */ -/** - * Maximum (non-inclusive) usable pdx. Must be - * modifiable after init due to memory hotplug - */ -unsigned long __read_mostly max_pdx; - /** Mask for the lower non-compressible bits of an mfn */ unsigned long __ro_after_init pfn_pdx_bottom_mask = ~0UL; @@ -75,18 +98,6 @@ unsigned long __ro_after_init pfn_hole_mask = 0; /** Number of bits of the "compressible" bit slice of an mfn */ unsigned int __ro_after_init pfn_pdx_hole_shift = 0; -unsigned long __read_mostly pdx_group_valid[BITS_TO_LONGS( - (FRAMETABLE_NR + PDX_GROUP_COUNT - 1) / PDX_GROUP_COUNT)] = { [0] = 1 }; - -bool __mfn_valid(unsigned long mfn) -{ - if ( unlikely(evaluate_nospec(mfn >= max_page)) ) - return false; - return likely(!(mfn & pfn_hole_mask)) && - likely(test_bit(pfn_to_pdx(mfn) / PDX_GROUP_COUNT, - pdx_group_valid)); -} - /* Sets all bits from the most-significant 1-bit down to the LSB */ static uint64_t fill_mask(uint64_t mask) { @@ -124,17 +135,6 @@ uint64_t pdx_region_mask(uint64_t base, uint64_t len) return fill_mask(base ^ (base + len - 1)); } -void set_pdx_range(unsigned long smfn, unsigned long emfn) -{ - unsigned long idx, eidx; - - idx = pfn_to_pdx(smfn) / PDX_GROUP_COUNT; - eidx = (pfn_to_pdx(emfn - 1) + PDX_GROUP_COUNT) / PDX_GROUP_COUNT; - - for ( ; idx < eidx; ++idx ) - __set_bit(idx, pdx_group_valid); -} - void __init pfn_pdx_hole_setup(unsigned long mask) { unsigned int i, j, bottom_shift = 0, hole_shift = 0; diff --git a/xen/include/xen/pdx.h b/xen/include/xen/pdx.h index 8c6aec2aea..5a82b6bde2 100644 --- a/xen/include/xen/pdx.h +++ b/xen/include/xen/pdx.h @@ -70,15 +70,41 @@ #ifdef CONFIG_HAS_PDX extern unsigned long max_pdx; -extern unsigned long pfn_pdx_bottom_mask, ma_va_bottom_mask; -extern unsigned int pfn_pdx_hole_shift; -extern unsigned long pfn_hole_mask; -extern unsigned long pfn_top_mask, ma_top_mask; #define PDX_GROUP_COUNT ((1 << PDX_GROUP_SHIFT) / \ (sizeof(*frame_table) & -sizeof(*frame_table))) extern unsigned long pdx_group_valid[]; +/** + * Mark [smfn, emfn) as allocatable in the frame table + * + * @param smfn Start mfn + * @param emfn End mfn + */ +void set_pdx_range(unsigned long smfn, unsigned long emfn); + +/** + * Invoked to determine if an mfn has an associated valid frame table entry + * + * In order for it to be legal it must pass bounds, grouping and + * compression sanity checks. + * + * @param mfn To-be-checked mfn + * @return True iff all checks pass + */ +bool __mfn_valid(unsigned long mfn); + +#define page_to_pdx(pg) ((pg) - frame_table) +#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) + +#define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) +#define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) + +extern unsigned long pfn_pdx_bottom_mask, ma_va_bottom_mask; +extern unsigned int pfn_pdx_hole_shift; +extern unsigned long pfn_hole_mask; +extern unsigned long pfn_top_mask, ma_top_mask; + /** * Validate a region's compatibility with the current compression runtime * @@ -120,28 +146,6 @@ uint64_t pdx_region_mask(uint64_t base, uint64_t len); */ uint64_t pdx_init_mask(uint64_t base_addr); -/** - * Mark [smfn, emfn) as accesible in the frame table - * - * @param smfn Start mfn - * @param emfn End mfn - */ -void set_pdx_range(unsigned long smfn, unsigned long emfn); - -#define page_to_pdx(pg) ((pg) - frame_table) -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) - -/** - * Invoked to determine if an mfn has an associated valid frame table entry - * - * In order for it to be legal it must pass bounds, grouping and - * compression sanity checks. - * - * @param mfn To-be-checked mfn - * @return True iff all checks pass - */ -bool __mfn_valid(unsigned long mfn); - /** * Map pfn to its corresponding pdx * @@ -166,9 +170,6 @@ static inline unsigned long pdx_to_pfn(unsigned long pdx) ((pdx << pfn_pdx_hole_shift) & pfn_top_mask); } -#define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) -#define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) - /** * Computes the offset into the direct map of an maddr * From patchwork Fri Jul 28 07:59:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alejandro Vallejo X-Patchwork-Id: 13331342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5CCE9C0015E for ; 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Fri, 28 Jul 2023 00:59:19 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , George Dunlap , Jan Beulich , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [PATCH v2 5/5] pdx: Add CONFIG_HAS_PDX_COMPRESSION as a common Kconfig option Date: Fri, 28 Jul 2023 08:59:03 +0100 Message-Id: <20230728075903.7838-6-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728075903.7838-1-alejandro.vallejo@cloud.com> References: <20230728075903.7838-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Adds a new compile-time flag to allow disabling pdx compression and compiles out compression-related code/data. It also shorts the pdx<->pfn conversion macros and creates stubs for masking fucntions. While at it, removes the old arch-defined CONFIG_HAS_PDX flag, as it was not removable in practice. Signed-off-by: Alejandro Vallejo Reviewed-by: Julien Grall --- v2: * Merged v1/patch2: Removal of CONFIG_HAS_PDX here (Jan) --- xen/arch/arm/Kconfig | 1 - xen/arch/x86/Kconfig | 1 - xen/arch/x86/domain.c | 19 +++++++++++++------ xen/common/Kconfig | 13 ++++++++++--- xen/common/Makefile | 2 +- xen/common/pdx.c | 15 +++++++++++---- xen/include/xen/pdx.h | 37 ++++++++++++++++++++++++++++++++++--- 7 files changed, 69 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 439cc94f33..ea1949fbaa 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -14,7 +14,6 @@ config ARM select HAS_ALTERNATIVE select HAS_DEVICE_TREE select HAS_PASSTHROUGH - select HAS_PDX select HAS_PMAP select HAS_UBSAN select IOMMU_FORCE_PT_SHARE diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 92f3a627da..30df085d96 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -24,7 +24,6 @@ config X86 select HAS_PASSTHROUGH select HAS_PCI select HAS_PCI_MSI - select HAS_PDX select HAS_SCHED_GRANULARITY select HAS_UBSAN select HAS_VPCI if HVM diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 5f66c2ae33..ee2830aad7 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -458,7 +458,7 @@ void domain_cpu_policy_changed(struct domain *d) } } -#ifndef CONFIG_BIGMEM +#if !defined(CONFIG_BIGMEM) && defined(CONFIG_PDX_COMPRESSION) /* * The hole may be at or above the 44-bit boundary, so we need to determine * the total bit count until reaching 32 significant (not squashed out) bits @@ -485,13 +485,20 @@ static unsigned int __init noinline _domain_struct_bits(void) struct domain *alloc_domain_struct(void) { struct domain *d; -#ifdef CONFIG_BIGMEM - const unsigned int bits = 0; -#else + /* - * We pack the PDX of the domain structure into a 32-bit field within - * the page_info structure. Hence the MEMF_bits() restriction. + * Without CONFIG_BIGMEM, we pack the PDX of the domain structure into + * a 32-bit field within the page_info structure. Hence the MEMF_bits() + * restriction. With PDX compression in place the number of bits must + * be calculated at runtime, but it's fixed otherwise. + * + * On systems with CONFIG_BIGMEM there's no packing, and so there's no + * such restriction. */ +#if defined(CONFIG_BIGMEM) || !defined(CONFIG_PDX_COMPRESSION) + const unsigned int bits = IS_ENABLED(CONFIG_BIGMEM) ? 0 : + 32 + PAGE_SHIFT; +#else static unsigned int __read_mostly bits; if ( unlikely(!bits) ) diff --git a/xen/common/Kconfig b/xen/common/Kconfig index dd8d7c3f1c..3a0afd8e83 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -23,6 +23,16 @@ config GRANT_TABLE If unsure, say Y. +config PDX_COMPRESSION + bool "PDX (Page inDeX) compression support" + default ARM + help + PDX compression is a technique that allows the hypervisor to + represent physical addresses in a very space-efficient manner. + This is very helpful reducing memory wastage in systems with + memory banks with base addresses far from each other, but carrier + a performance cost. + config ALTERNATIVE_CALL bool @@ -53,9 +63,6 @@ config HAS_IOPORTS config HAS_KEXEC bool -config HAS_PDX - bool - config HAS_PMAP bool diff --git a/xen/common/Makefile b/xen/common/Makefile index 46049eac35..0020cafb8a 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -29,7 +29,7 @@ obj-y += multicall.o obj-y += notifier.o obj-$(CONFIG_NUMA) += numa.o obj-y += page_alloc.o -obj-$(CONFIG_HAS_PDX) += pdx.o +obj-y += pdx.o obj-$(CONFIG_PERF_COUNTERS) += perfc.o obj-bin-$(CONFIG_HAS_PMAP) += pmap.init.o obj-y += preempt.o diff --git a/xen/common/pdx.c b/xen/common/pdx.c index d3d38965bd..a3b1ba9fbb 100644 --- a/xen/common/pdx.c +++ b/xen/common/pdx.c @@ -31,11 +31,15 @@ unsigned long __read_mostly pdx_group_valid[BITS_TO_LONGS( bool __mfn_valid(unsigned long mfn) { - if ( unlikely(evaluate_nospec(mfn >= max_page)) ) + bool invalid = mfn >= max_page; +#ifdef CONFIG_PDX_COMPRESSION + invalid |= mfn & pfn_hole_mask; +#endif + + if ( unlikely(evaluate_nospec(invalid)) ) return false; - return likely(!(mfn & pfn_hole_mask)) && - likely(test_bit(pfn_to_pdx(mfn) / PDX_GROUP_COUNT, - pdx_group_valid)); + + return test_bit(pfn_to_pdx(mfn) / PDX_GROUP_COUNT, pdx_group_valid); } void set_pdx_range(unsigned long smfn, unsigned long emfn) @@ -49,6 +53,8 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn) __set_bit(idx, pdx_group_valid); } +#ifdef CONFIG_PDX_COMPRESSION + /* * Diagram to make sense of the following variables. The masks and shifts * are done on mfn values in order to convert to/from pdx: @@ -175,6 +181,7 @@ void __init pfn_pdx_hole_setup(unsigned long mask) pfn_top_mask = ~(pfn_pdx_bottom_mask | pfn_hole_mask); ma_top_mask = pfn_top_mask << PAGE_SHIFT; } +#endif /* CONFIG_PDX_COMPRESSION */ /* diff --git a/xen/include/xen/pdx.h b/xen/include/xen/pdx.h index 5a82b6bde2..dfb475c8dc 100644 --- a/xen/include/xen/pdx.h +++ b/xen/include/xen/pdx.h @@ -67,8 +67,6 @@ * region involved. */ -#ifdef CONFIG_HAS_PDX - extern unsigned long max_pdx; #define PDX_GROUP_COUNT ((1 << PDX_GROUP_SHIFT) / \ @@ -100,6 +98,8 @@ bool __mfn_valid(unsigned long mfn); #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) +#ifdef CONFIG_PDX_COMPRESSION + extern unsigned long pfn_pdx_bottom_mask, ma_va_bottom_mask; extern unsigned int pfn_pdx_hole_shift; extern unsigned long pfn_hole_mask; @@ -205,8 +205,39 @@ static inline uint64_t directmapoff_to_maddr(unsigned long offset) * position marks a potentially compressible bit. */ void pfn_pdx_hole_setup(unsigned long mask); +#else /* CONFIG_PDX_COMPRESSION */ + +/* Without PDX compression we can skip some computations */ + +/* pdx<->pfn == identity */ +#define pdx_to_pfn(x) (x) +#define pfn_to_pdx(x) (x) + +/* directmap is indexed by by maddr */ +#define maddr_to_directmapoff(x) (x) +#define directmapoff_to_maddr(x) (x) + +static inline bool pdx_is_region_compressible(unsigned long smfn, + unsigned long emfn) +{ + return true; +} + +static inline uint64_t pdx_init_mask(uint64_t base_addr) +{ + return 0; +} + +static inline uint64_t pdx_region_mask(uint64_t base, uint64_t len) +{ + return 0; +} + +static inline void pfn_pdx_hole_setup(unsigned long mask) +{ +} -#endif /* HAS_PDX */ +#endif /* CONFIG_PDX_COMPRESSION */ #endif /* __XEN_PDX_H__ */ /*