From patchwork Tue Aug 1 12:56:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Udit" X-Patchwork-Id: 13336698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB5CCC0015E for ; Tue, 1 Aug 2023 12:57:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=fWmBeJ/isbst/3ISGy2uhzYNojUYRbyryN7k+Cc6mX0=; b=Vo2S9ylemNyXQJ JAD4W1I8UUnLtUF9m/KNTCJNkxfuglALMzpE+lKw4vSo/ZeXS/3WotPm5RZPEI022Ac63pXa0KuYB w+irDDK4KsxQiPLQ+eDf8DyaV2deuZoApQnhTP7wVbFLXReO8WFtawpQ+6JUqwlbhYD+rsy24IX0P 8H9BuQRhzSzEvpA8JToLS9iInHjZQpuF0xoq8ojMFc5iZ8yoes+grBP2gRlwfAZuoTmN/ZfmEVdKy GkIhqk5eevJEe8iw3KvtrBFjRQl2GC8AjtDOekTUR4i+KQnDsOYX8+nw5rK7Zt3ZS1N3lWpjPQ4aX /HKcVcTT+mEvdff5zi0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qQove-002P5Z-2W; Tue, 01 Aug 2023 12:56:46 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qQova-002P59-2B for linux-arm-kernel@lists.infradead.org; Tue, 01 Aug 2023 12:56:44 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 371Cuaaq039783; Tue, 1 Aug 2023 07:56:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1690894596; bh=x1Go1UoptslckA14tMiSKOBHZznYjXt+QYrFnxphHQA=; h=From:To:CC:Subject:Date; b=izXC6hV0HM6F6C+4YwTGvAEbQk3B6mn+8UGKqXHCTnq+G9AdgBFNpDktx7bPM0q7M ulcE1YYDFqMlJWjgOMyGzCzYzD/55q9VQoGIYe/dexCiwba7QsihFA1VXjT4HykqlP iKXrf7dwFOMrDy4XX1JV9qTGYv//NqkcGIdZQ/Zc= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 371Cuafk061129 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 1 Aug 2023 07:56:36 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 1 Aug 2023 07:56:36 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 1 Aug 2023 07:56:36 -0500 Received: from udit-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 371CuWId009627; Tue, 1 Aug 2023 07:56:33 -0500 From: Udit Kumar To: , , , , , , , , , , CC: Udit Kumar Subject: [PATCH] arm64: dts: ti: k3-j721s2-som-p0: Correct pinmux offset for ospi0 Date: Tue, 1 Aug 2023 18:26:26 +0530 Message-ID: <20230801125626.3287306-1-u-kumar1@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230801_055642_813788_21502D24 X-CRM114-Status: GOOD ( 11.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Due to non-addressable regions in J721S2 SOC wkup_pmx was split into four regions from wkup_pmx0 to wkup_pmx3. After split while updating the pin mux references to newly defined four wkup_pmx, pin mux for OSPI0 was left. Pin mux for OSPI0 is spread over two range wkup_pmx0 and wkup_pmx1, along with correcting pin mux for ospi adding correct pin mux setting within ospi node. Fixes: 6bc829ceea41 ("arm64: dts: ti: k3-j721s2: Fix wkup pinmux range") Signed-off-by: Udit Kumar --- Test log without patch https://gist.github.com/uditkumarti/41d3d7ccf278d4e00e6da349478e58aa (line 1192) reports pin mux is out of range for ospi Test log with patch https://gist.github.com/uditkumarti/46999c99911c9ff3777493fbaea243c6 arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index d57dd43da0ef..1a9d13237c2d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -45,8 +45,6 @@ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */ J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */ J721S2_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (G17) MCU_OSPI0_CSn1 */ - J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */ - J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */ J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */ J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */ J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */ @@ -61,6 +59,15 @@ J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */ }; }; +&wkup_pmx1 { + mcu_fss0_ospi0_pins1_default: mcu-fss0-ospi0-default-pins1 { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */ + J721S2_WKUP_IOPAD(0x004, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */ + >; + }; +}; + &wkup_pmx2 { wkup_i2c0_pins_default: wkup-i2c0-default-pins { pinctrl-single,pins = < @@ -127,7 +134,7 @@ &main_mcan16 { &ospi0 { status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>, <&mcu_fss0_ospi0_pins1_default>; flash@0 { compatible = "jedec,spi-nor";