From patchwork Wed Aug 2 17:26:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Easwar Hariharan X-Patchwork-Id: 13338622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 776A8C04A94 for ; Wed, 2 Aug 2023 17:26:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7DJhIN/lx6aM5ukuKoaBSVipytDnEW84/dTNDBoJq0A=; b=IDbQduSitcs+TK aUptcpHaQd6+3X8KVW/34aNj8FgYY7yIqq/haBhsODWcF1GAIjAMu33oEP+/3Nz6U1DlnRAA6RFUb TIfVtAUAeQyn+u/2erqhXbI4YP9qSE5HFYlcUuBc52ihgnaKC+Y4B77pwyQxfH7dAaW8pKefMkcOQ +xSHudGiy7U/UtAJDvzmrVFdbhjorzbZ16c6DS29WpBRKALfhmk1BM9f9qLmHgTHg6iauCaKH+cjO 1cGrXFQlsjqmf7dSz93BEuSUcBzsji8lGm7g2WozHIz4r0jjJOSVehHCs8rxUAWykxG4D7GMZ+wIq lIp1u1VK5UZCJYchb5ag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcK-005VPO-00; Wed, 02 Aug 2023 17:26:36 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcH-005VO1-1p for linux-arm-kernel@lists.infradead.org; Wed, 02 Aug 2023 17:26:35 +0000 Received: from rrs24-12-35.corp.microsoft.com (unknown [131.107.147.181]) by linux.microsoft.com (Postfix) with ESMTPSA id 39F7C238C432; Wed, 2 Aug 2023 10:26:33 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 39F7C238C432 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1690997193; bh=grB6IwgKY6uW6thOdbcP7vHZnb96+Bu8P/F0IvDJKqE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ip5/PTWWUAQszh6u6a9IAXCjipL9rOj0Zqu5PG10PAB3jS1x8E1mEY/noEOL4fDXe Q0WgvOPOB0lpr3XtmDahnkkEAg5uxT3rRgKKRKoJRxx8/yN6ykiQjIpirS9Q2hda62 QI2b4e4x1JBOWHQCzmjF7Hd74DBU1CfRwuBTYCmc= From: Easwar Hariharan To: stable@vger.kernel.org Cc: easwar.hariharan@microsoft.com, Robin Murphy , Nicolin Chen , Will Deacon , Catalin Marinas , Jonathan Corbet , Joerg Roedel , Lu Baolu , Jason Gunthorpe , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Vladimir Oltean , Yicong Yang , Tomas Krcka , Jean-Philippe Brucker , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM) Subject: [PATCH v2 6.4 1/4] iommu/arm-smmu-v3: Work around MMU-600 erratum 1076982 Date: Wed, 2 Aug 2023 17:26:17 +0000 Message-Id: <20230802172620.1628017-2-eahariha@linux.microsoft.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802172620.1628017-1-eahariha@linux.microsoft.com> References: <20230802172620.1628017-1-eahariha@linux.microsoft.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_102633_649666_AF1ABB40 X-CRM114-Status: GOOD ( 14.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Robin Murphy commit f322e8af35c7f23a8c08b595c38d6c855b2d836f upstream MMU-600 versions prior to r1p0 fail to correctly generate a WFE wakeup event when the command queue transitions fom full to non-full. We can easily work around this by simply hiding the SEV capability such that we fall back to polling for space in the queue - since MMU-600 implements MSIs we wouldn't expect to need SEV for sync completion either, so this should have little to no impact. Signed-off-by: Robin Murphy Reviewed-by: Nicolin Chen Tested-by: Nicolin Chen Link: https://lore.kernel.org/r/08adbe3d01024d8382a478325f73b56851f76e49.1683731256.git.robin.murphy@arm.com Signed-off-by: Will Deacon Signed-off-by: Easwar Hariharan --- Documentation/arm64/silicon-errata.rst | 2 ++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 29 +++++++++++++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 +++++ 3 files changed, 37 insertions(+) diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index cd46e2b20a81..fd0d60827b08 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -143,6 +143,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-500 | #841119,826419 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | MMU-600 | #1076982 | N/A | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 3fd83fb75722..667e7a90706e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3429,6 +3429,33 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) return 0; } +#define IIDR_IMPLEMENTER_ARM 0x43b +#define IIDR_PRODUCTID_ARM_MMU_600 0x483 + +static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu) +{ + u32 reg; + unsigned int implementer, productid, variant, revision; + + reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR); + implementer = FIELD_GET(IIDR_IMPLEMENTER, reg); + productid = FIELD_GET(IIDR_PRODUCTID, reg); + variant = FIELD_GET(IIDR_VARIANT, reg); + revision = FIELD_GET(IIDR_REVISION, reg); + + switch (implementer) { + case IIDR_IMPLEMENTER_ARM: + switch (productid) { + case IIDR_PRODUCTID_ARM_MMU_600: + /* Arm erratum 1076982 */ + if (variant == 0 && revision <= 2) + smmu->features &= ~ARM_SMMU_FEAT_SEV; + break; + } + break; + } +} + static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) { u32 reg; @@ -3635,6 +3662,8 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu->ias = max(smmu->ias, smmu->oas); + arm_smmu_device_iidr_probe(smmu); + if (arm_smmu_sva_supported(smmu)) smmu->features |= ARM_SMMU_FEAT_SVA; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index b574c58a3487..5ce47f2e3402 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -69,6 +69,12 @@ #define IDR5_VAX GENMASK(11, 10) #define IDR5_VAX_52_BIT 1 +#define ARM_SMMU_IIDR 0x18 +#define IIDR_PRODUCTID GENMASK(31, 20) +#define IIDR_VARIANT GENMASK(19, 16) +#define IIDR_REVISION GENMASK(15, 12) +#define IIDR_IMPLEMENTER GENMASK(11, 0) + #define ARM_SMMU_CR0 0x20 #define CR0_ATSCHK (1 << 4) #define CR0_CMDQEN (1 << 3) From patchwork Wed Aug 2 17:26:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Easwar Hariharan X-Patchwork-Id: 13338623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F409BC001E0 for ; Wed, 2 Aug 2023 17:26:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kmvKJDkGUJCVXBqHZP+RfXxy+xLjZuSytA7PIXjBmF4=; b=OpALG3OulW0My6 oGt0JX4AiUuduA27NnoooBRlGJRpuOqTEoca+c7+mz7mbF8zxpokfXRoudU4pqUydKGRZE8sAvMdv Xjes962hfGHX2jja4MTw/H5ZMevgGfbcpVDvu8CnbhWkte9yhAmGcrGYGbdEOTZleY/H8Hv/5BRD3 7Ri2uA9CzpAwZAyK4q9DmfFw2AVRZ1Jl4b7ClkqV9vXjM6XUNUnYt5R8x7Oz9mo5kPN79G3gFq2Xw EN2+MOKjLQeWhlOYx4y79jsej/+S1OO1/xl7NXBiIiGJUQNug7sZBBhym0nzoYaMjTtY6slrdklqO AZI4WCsQi7Feg+PcP9SQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcO-005VS0-24; Wed, 02 Aug 2023 17:26:40 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcL-005VQH-1l for linux-arm-kernel@lists.infradead.org; Wed, 02 Aug 2023 17:26:39 +0000 Received: from rrs24-12-35.corp.microsoft.com (unknown [131.107.147.181]) by linux.microsoft.com (Postfix) with ESMTPSA id 3699E238C435; Wed, 2 Aug 2023 10:26:37 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 3699E238C435 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1690997197; bh=3PXY2VvlT3nfYjchGavlVsenUShvn2PDaXDTz5PBuD8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rn2fqLTjEYMoHG7DFqvKpcXxjYsOzxoX3NfV6f0HOduUjNBrdgwpZO+umLnKGdUkW +uPxawVtV+SEqzPQP4rUgh/ds4wgonPIJhAiVPfmbBPnQyrcNW1Ax37w+sLUNShsHx XU6nDF5UyHIKMOGL0gxMqeIMhaQjFElpy2ee2DXs= From: Easwar Hariharan To: stable@vger.kernel.org Cc: easwar.hariharan@microsoft.com, Robin Murphy , Nicolin Chen , Will Deacon , Catalin Marinas , Jonathan Corbet , Joerg Roedel , Lu Baolu , Jason Gunthorpe , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jean-Philippe Brucker , Yicong Yang , Tomas Krcka , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM) Subject: [PATCH v2 6.4 2/4] iommu/arm-smmu-v3: Document MMU-700 erratum 2812531 Date: Wed, 2 Aug 2023 17:26:18 +0000 Message-Id: <20230802172620.1628017-3-eahariha@linux.microsoft.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802172620.1628017-1-eahariha@linux.microsoft.com> References: <20230802172620.1628017-1-eahariha@linux.microsoft.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_102637_626197_A5207F5D X-CRM114-Status: GOOD ( 20.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Robin Murphy commit 309a15cb16bb075da1c99d46fb457db6a1a2669e upstream To work around MMU-700 erratum 2812531 we need to ensure that certain sequences of commands cannot be issued without an intervening sync. In practice this falls out of our current command-batching machinery anyway - each batch only contains a single type of invalidation command, and ends with a sync. The only exception is when a batch is sufficiently large to need issuing across multiple command queue slots, wherein the earlier slots will not contain a sync and thus may in theory interleave with another batch being issued in parallel to create an affected sequence across the slot boundary. Since MMU-700 supports range invalidate commands and thus we will prefer to use them (which also happens to avoid conditions for other errata), I'm not entirely sure it's even possible for a single high-level invalidate call to generate a batch of more than 63 commands, but for the sake of robustness and documentation, wire up an option to enforce that a sync is always inserted for every slot issued. The other aspect is that the relative order of DVM commands cannot be controlled, so DVM cannot be used. Again that is already the status quo, but since we have at least defined ARM_SMMU_FEAT_BTM, we can explicitly disable it for documentation purposes even if it's not wired up anywhere yet. Signed-off-by: Robin Murphy Reviewed-by: Nicolin Chen Link: https://lore.kernel.org/r/330221cdfd0003cd51b6c04e7ff3566741ad8374.1683731256.git.robin.murphy@arm.com Signed-off-by: Will Deacon Signed-off-by: Easwar Hariharan --- Documentation/arm64/silicon-errata.rst | 2 ++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 12 ++++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + 3 files changed, 15 insertions(+) diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index fd0d60827b08..b0346968765d 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -145,6 +145,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-600 | #1076982 | N/A | +----------------+-----------------+-----------------+-----------------------------+ +| ARM | MMU-700 | #2812531 | N/A | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 667e7a90706e..b0ccd735f8bb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -894,6 +894,12 @@ static void arm_smmu_cmdq_batch_add(struct arm_smmu_device *smmu, { int index; + if (cmds->num == CMDQ_BATCH_ENTRIES - 1 && + (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC)) { + arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, true); + cmds->num = 0; + } + if (cmds->num == CMDQ_BATCH_ENTRIES) { arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, false); cmds->num = 0; @@ -3431,6 +3437,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) #define IIDR_IMPLEMENTER_ARM 0x43b #define IIDR_PRODUCTID_ARM_MMU_600 0x483 +#define IIDR_PRODUCTID_ARM_MMU_700 0x487 static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu) { @@ -3451,6 +3458,11 @@ static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu) if (variant == 0 && revision <= 2) smmu->features &= ~ARM_SMMU_FEAT_SEV; break; + case IIDR_PRODUCTID_ARM_MMU_700: + /* Arm erratum 2812531 */ + smmu->features &= ~ARM_SMMU_FEAT_BTM; + smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC; + break; } break; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 5ce47f2e3402..1555c8220381 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -650,6 +650,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) #define ARM_SMMU_OPT_PAGE0_REGS_ONLY (1 << 1) #define ARM_SMMU_OPT_MSIPOLL (1 << 2) +#define ARM_SMMU_OPT_CMDQ_FORCE_SYNC (1 << 3) u32 options; struct arm_smmu_cmdq cmdq; From patchwork Wed Aug 2 17:26:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Easwar Hariharan X-Patchwork-Id: 13338624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32B0FC001E0 for ; Wed, 2 Aug 2023 17:27:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=g+Am9G+84yN1vSx2d+qfeo+Wy735IkbWS27++fF1EyU=; b=egry3qCjLn/nuk yW6CMC/3I6DnutpOW6Mq461SSPO4nfY1UHnz5ttGzNzsWcrpYzsSSbO18WMfoTRq/kFPXGQ4UldO4 dUjU3qS7nCnPvvxHd4sDzjJdTclHNvfB7AZ7Tm7PWODmAchoOy4EPvdaeYbvm4rRpsavCQ2B/gsgk aDCB4Q+mK2zxxs2Yf/UN8cUugCzeg9r4ZwrZoeF+XDq8wEQPo/W2qNwV1XBQhQoIsgS9LTl5J6PTP FFh/UX5USuBUaagveLi4UqWKUeUWsb80vNa+z8SEaKbbB1Rlu0fH5qIf9aZYGwWIXQCkIZRjwuoda XPYU8yl+cM0bMfa8qqow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcR-005VV3-30; Wed, 02 Aug 2023 17:26:43 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcP-005VSj-1E for linux-arm-kernel@lists.infradead.org; Wed, 02 Aug 2023 17:26:42 +0000 Received: from rrs24-12-35.corp.microsoft.com (unknown [131.107.147.181]) by linux.microsoft.com (Postfix) with ESMTPSA id 09BB3238C432; Wed, 2 Aug 2023 10:26:41 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 09BB3238C432 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1690997201; bh=veFcr7QIuujJbF+cPPo/BT02ofZ8XtwDGisaF+dPAVs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gdZywKBXcJCK6VmK09jSnkr53SbRVbm33OMn7ckJ1BFTax9jOLcoSlRWx3mRAqoaO +Lk5pOWEnmpGqJC+aNFs+H97H1eY6aSs7fD8xuACXB7oNVbKJjHIlYm8vK1aypl0b7 UvAsS+vajWhqUPbUxPhM6RI7Gem9Eq6KQz5i+8jc= From: Easwar Hariharan To: stable@vger.kernel.org Cc: easwar.hariharan@microsoft.com, Robin Murphy , Nicolin Chen , Will Deacon , Joerg Roedel , Lu Baolu , Jean-Philippe Brucker , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Vladimir Oltean , Yicong Yang , Tomas Krcka , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 6.4 3/4] iommu/arm-smmu-v3: Add explicit feature for nesting Date: Wed, 2 Aug 2023 17:26:19 +0000 Message-Id: <20230802172620.1628017-4-eahariha@linux.microsoft.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802172620.1628017-1-eahariha@linux.microsoft.com> References: <20230802172620.1628017-1-eahariha@linux.microsoft.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_102641_445128_728C3DE9 X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Robin Murphy commit 1d9777b9f3d55b4b6faf186ba4f1d6fb560c0523 upstream In certain cases we may want to refuse to allow nested translation even when both stages are implemented, so let's add an explicit feature for nesting support which we can control in its own right. For now this merely serves as documentation, but it means a nice convenient check will be ready and waiting for the future nesting code. Signed-off-by: Robin Murphy Reviewed-by: Nicolin Chen Link: https://lore.kernel.org/r/136c3f4a3a84cc14a5a1978ace57dfd3ed67b688.1683731256.git.robin.murphy@arm.com Signed-off-by: Will Deacon Signed-off-by: Easwar Hariharan --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 ++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b0ccd735f8bb..7e08ec55df2a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3674,6 +3674,10 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu->ias = max(smmu->ias, smmu->oas); + if ((smmu->features & ARM_SMMU_FEAT_TRANS_S1) && + (smmu->features & ARM_SMMU_FEAT_TRANS_S2)) + smmu->features |= ARM_SMMU_FEAT_NESTING; + arm_smmu_device_iidr_probe(smmu); if (arm_smmu_sva_supported(smmu)) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 1555c8220381..dcab85698a4e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -645,6 +645,7 @@ struct arm_smmu_device { #define ARM_SMMU_FEAT_BTM (1 << 16) #define ARM_SMMU_FEAT_SVA (1 << 17) #define ARM_SMMU_FEAT_E2H (1 << 18) +#define ARM_SMMU_FEAT_NESTING (1 << 19) u32 features; #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) From patchwork Wed Aug 2 17:26:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Easwar Hariharan X-Patchwork-Id: 13338625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58854C04A94 for ; Wed, 2 Aug 2023 17:27:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q4jcAf83PA42YRp/a16bU8Ohgeu42NDv3VmKBSxbTM8=; b=zSYeDoLfJBUjpb 0hLO/kHuub8Mxbfpj0FtdypgbhAG2aOxo4IROe8pwM6fkylO0bHnOu6EDM3ZAuxX91ZA2Q3RXy2UB nA1Wh5v11wbeNXgcMvDuGRFRtTx4usJYa+D+AUbqV5hICmrhuYdpF3dIgdaQyK/zJD60hAsAUBV5D Pliqvor1HEuhAW77ZOpW8e7OqRvOTkouKW1qI1kwpqqiDn8YMEpXqDmFioAayHvtSvipjt9HZfLDJ 76/uVURTTnF3wYwTfqi02g7/R5GVghPnRzM5H0tuxlTmYd6dWuANGb4eufOzIlVR8vlGHyemqzZZs SEc+OhNVz1Dq16uBmzVw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcU-005VWi-1h; Wed, 02 Aug 2023 17:26:46 +0000 Received: from linux.microsoft.com ([13.77.154.182]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRFcR-005VUj-2H for linux-arm-kernel@lists.infradead.org; Wed, 02 Aug 2023 17:26:45 +0000 Received: from rrs24-12-35.corp.microsoft.com (unknown [131.107.147.181]) by linux.microsoft.com (Postfix) with ESMTPSA id 5E652238C435; Wed, 2 Aug 2023 10:26:43 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 5E652238C435 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1690997203; bh=JxNu19adZsu3M0z/z3GFu4USKc1JYfzjTR+eXKUvlDs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WP2U/xqOlg9dXus047uOQXiWeS1uOyD1f5yFXMPeDHHAErxOn36jTxi8wnAmpH02A JU2Ni3Wy3G6AnIKF0bfXMiALAu7srGzIz9tPLmDvmiCjRyzShf36ejAObu/IEqszGv /hdJjYPo0dyRR6HJSdMKGo8WpMTyuOmiLuPaqFKw= From: Easwar Hariharan To: stable@vger.kernel.org Cc: easwar.hariharan@microsoft.com, Robin Murphy , Nicolin Chen , Will Deacon , Catalin Marinas , Jonathan Corbet , Joerg Roedel , Lu Baolu , Jean-Philippe Brucker , Vladimir Oltean , Yicong Yang , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Tomas Krcka , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM) Subject: [PATCH v2 6.4 4/4] iommu/arm-smmu-v3: Document nesting-related errata Date: Wed, 2 Aug 2023 17:26:20 +0000 Message-Id: <20230802172620.1628017-5-eahariha@linux.microsoft.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802172620.1628017-1-eahariha@linux.microsoft.com> References: <20230802172620.1628017-1-eahariha@linux.microsoft.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_102643_785567_B566443B X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Robin Murphy commit 0bfbfc526c70606bf0fad302e4821087cbecfaf4 upstream Both MMU-600 and MMU-700 have similar errata around TLB invalidation while both stages of translation are active, which will need some consideration once nesting support is implemented. For now, though, it's very easy to make our implicit lack of nesting support explicit for those cases, so they're less likely to be missed in future. Signed-off-by: Robin Murphy Reviewed-by: Nicolin Chen Link: https://lore.kernel.org/r/696da78d32bb4491f898f11b0bb4d850a8aa7c6a.1683731256.git.robin.murphy@arm.com Signed-off-by: Will Deacon Signed-off-by: Easwar Hariharan --- Documentation/arm64/silicon-errata.rst | 4 ++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst index b0346968765d..3ce6e4aebdef 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -143,9 +143,9 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | ARM | MMU-500 | #841119,826419 | N/A | +----------------+-----------------+-----------------+-----------------------------+ -| ARM | MMU-600 | #1076982 | N/A | +| ARM | MMU-600 | #1076982,1209401| N/A | +----------------+-----------------+-----------------+-----------------------------+ -| ARM | MMU-700 | #2812531 | N/A | +| ARM | MMU-700 | #2268618,2812531| N/A | +----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 7e08ec55df2a..bbad54aa6c8c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3457,11 +3457,16 @@ static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu) /* Arm erratum 1076982 */ if (variant == 0 && revision <= 2) smmu->features &= ~ARM_SMMU_FEAT_SEV; + /* Arm erratum 1209401 */ + if (variant < 2) + smmu->features &= ~ARM_SMMU_FEAT_NESTING; break; case IIDR_PRODUCTID_ARM_MMU_700: /* Arm erratum 2812531 */ smmu->features &= ~ARM_SMMU_FEAT_BTM; smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC; + /* Arm errata 2268618, 2812531 */ + smmu->features &= ~ARM_SMMU_FEAT_NESTING; break; } break;