From patchwork Thu Aug 10 09:09:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinrong Liang X-Patchwork-Id: 13349067 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18893C04A94 for ; Thu, 10 Aug 2023 09:10:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234231AbjHJJKI (ORCPT ); Thu, 10 Aug 2023 05:10:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229730AbjHJJKF (ORCPT ); Thu, 10 Aug 2023 05:10:05 -0400 Received: from mail-oi1-x244.google.com (mail-oi1-x244.google.com [IPv6:2607:f8b0:4864:20::244]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32A7B2123; Thu, 10 Aug 2023 02:10:05 -0700 (PDT) Received: by mail-oi1-x244.google.com with SMTP id 5614622812f47-3a6f3ef3155so542291b6e.1; Thu, 10 Aug 2023 02:10:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691658604; x=1692263404; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5fZ8QJ/lFE+KqunXBF6YeESlrgzpkDcP9LFRc/q76fs=; b=h1COgyNE2Fnhw6y4HlZ/rn7ahGyPVZfMFZR6aQUmA1bYLiEaIaE7afeIFZMzdoMz7d XKSI7JFtgkNM+T4DwM6VTy9CIdDmck2YbnbWxLau5M9G+BN62iucAiSzEtPjp3d0YfHh aIZBjooAfDKCeS/dsgui7eF0wY70S17wp+kvglzTypz8Kw3Y+MO0CeqkkHPvq2zTl1xx H1Mucy51RI9AOjQKba306oGmNud0/OP9/rJCUHsbZ9EyEcSmE2n0m3YbXlyTWyXGAMcm q6PkTgbh9UWjJa6LLsM3sKN9skFfKe0dFuW+PxVd8nhTUSEweS79ZywXkHO2yG7ydMqn W2iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691658604; x=1692263404; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5fZ8QJ/lFE+KqunXBF6YeESlrgzpkDcP9LFRc/q76fs=; b=eiU1B+y4W1klXxCjzsDE/JeeLAhrjJ3Jdmk0CYTiO5R2d8i4yD+3i2lq1kqfgV8L41 WAwVmrqYgH0hXGajKIfluMdRgCr3dYBqUmL8pjqBl2+75EVyBo3GuOqFs9YgPpq0k4dm entYBc/6G6R2PMDec078xA1b4Mhyii/aDaiG6kjWjQ9kRacPaQv0XbfTQsdxkwpJmaw9 oCPCB/o4neOz+94zyImkMcF14Yg17M9IR9OfupqY3E2/pGC6tBxziNS/8Qq4/M/5uC81 iWDnS2xgCftvuDGGPk3KpX585I7OWhnKQZvgKB6DEEXu1dbuVG1SN3wM8Yf1P7suLDLf VUHQ== X-Gm-Message-State: AOJu0YxrxjSk6kGl3DLNIRfvwZU4H6QvwTbm2D5Sb8jREH1MSmr7YzkP 8DpvvE2zBhpzufTFV3Jo55w= X-Google-Smtp-Source: AGHT+IFGOfucLHi5JdWUYTTL+vg8JOMqmJ/MAHjQv0YrxzjyW9qAB+dGucj5G470Ubz/jXCrHI1V3Q== X-Received: by 2002:a05:6808:6395:b0:3a4:3072:e597 with SMTP id ec21-20020a056808639500b003a43072e597mr1983326oib.54.1691658604433; Thu, 10 Aug 2023 02:10:04 -0700 (PDT) Received: from CLOUDLIANG-MB2.tencent.com ([103.7.29.32]) by smtp.gmail.com with ESMTPSA id pc16-20020a17090b3b9000b00263154aab24sm970704pjb.57.2023.08.10.02.10.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Aug 2023 02:10:04 -0700 (PDT) From: Jinrong Liang X-Google-Original-From: Jinrong Liang To: Sean Christopherson Cc: Paolo Bonzini , Isaku Yamahata , Jim Mattson , Shuah Khan , Aaron Lewis , David Matlack , Vishal Annapurve , Wanpeng Li , Like Xu , Jinrong Liang , linux-kselftest@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 1/6] KVM: selftests: Add x86 properties for Intel PMU in processor.h Date: Thu, 10 Aug 2023 17:09:40 +0800 Message-Id: <20230810090945.16053-2-cloudliang@tencent.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810090945.16053-1-cloudliang@tencent.com> References: <20230810090945.16053-1-cloudliang@tencent.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jinrong Liang Add x86 properties for Intel PMU so that tests don't have to manually retrieve the correct CPUID leaf+register, and so that the resulting code is self-documenting. Suggested-by: Sean Christopherson Signed-off-by: Jinrong Liang --- tools/testing/selftests/kvm/include/x86_64/processor.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h index aa434c8f19c5..4fd042112526 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -239,7 +239,12 @@ struct kvm_x86_cpu_property { #define X86_PROPERTY_MAX_BASIC_LEAF KVM_X86_CPU_PROPERTY(0, 0, EAX, 0, 31) #define X86_PROPERTY_PMU_VERSION KVM_X86_CPU_PROPERTY(0xa, 0, EAX, 0, 7) #define X86_PROPERTY_PMU_NR_GP_COUNTERS KVM_X86_CPU_PROPERTY(0xa, 0, EAX, 8, 15) +#define X86_PROPERTY_PMU_GP_COUNTERS_BIT_WIDTH KVM_X86_CPU_PROPERTY(0xa, 0, EAX, 16, 23) #define X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH KVM_X86_CPU_PROPERTY(0xa, 0, EAX, 24, 31) +#define X86_PROPERTY_PMU_EVENTS_MASK KVM_X86_CPU_PROPERTY(0xa, 0, EBX, 0, 7) +#define X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK KVM_X86_CPU_PROPERTY(0xa, 0, ECX, 0, 31) +#define X86_PROPERTY_PMU_NR_FIXED_COUNTERS KVM_X86_CPU_PROPERTY(0xa, 0, EDX, 0, 4) +#define X86_PROPERTY_PMU_FIXED_COUNTERS_BIT_WIDTH KVM_X86_CPU_PROPERTY(0xa, 0, EDX, 5, 12) #define X86_PROPERTY_SUPPORTED_XCR0_LO KVM_X86_CPU_PROPERTY(0xd, 0, EAX, 0, 31) #define X86_PROPERTY_XSTATE_MAX_SIZE_XCR0 KVM_X86_CPU_PROPERTY(0xd, 0, EBX, 0, 31) From patchwork Thu Aug 10 09:09:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinrong Liang X-Patchwork-Id: 13349068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15093C001DE for ; Thu, 10 Aug 2023 09:10:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234362AbjHJJKM (ORCPT ); Thu, 10 Aug 2023 05:10:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231948AbjHJJKK (ORCPT ); Thu, 10 Aug 2023 05:10:10 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64A092103; Thu, 10 Aug 2023 02:10:08 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id 98e67ed59e1d1-267fcd6985cso460890a91.2; Thu, 10 Aug 2023 02:10:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691658608; x=1692263408; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/UWSTTF0t3sjG9vObIBOdAveTAVD8mKJIqcoJ5daziA=; b=bBWZ3k3LvxqFNCvuXrXWNymGyhzEQZm+pshphOBL6ASXMc8kO8xop/9Mbp1He5ufBv 3zFWrqYK/Wyj2qEu/usQUg1tyYaor+0ryXaQneuE4yxxpPCwXIixe43JhD1FT3XEqEQJ 5Y7YLG0RVwkJ70CnUzL01om+jGyGhGMoFqLHqdgz9s2/DLEX1rgTrZMQpIUN+U9DhLfC 0xt4AzsYxoX44r+MjKAECYRXopeieQg1ED2BirfcYtrzRavSsm8zUiVCWq0yu33w7MQn +EkexVreRotkSliBMub0ScirgGec75EnH1kgDYIRiev17EBbKlUQPUd98NdprJFnzfHm sUUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691658608; x=1692263408; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/UWSTTF0t3sjG9vObIBOdAveTAVD8mKJIqcoJ5daziA=; b=g6HU9ER68kKrjZowbe8ZZ/yQ0BpJTteU4U3TYzLDi1dPy2YGo2psluH7oBlr9Vo9FK qwbLZgnBWE2I7nhN//hTP2uzHuyYyJ+haIErr4nOP1OoaPvwa2Nn4Qq0bBfA37+Y2qv6 i2rooRom30iUeKh7/zGWMf7n+UMJdHl5CcOunRjAAsuZC7CqImXvpSb/ND7tolldhq2j qENPuT993zHNHze9R4A4rwV9iFNVYMX3xol2oK/Hh6ZRUtjLuWtXBkbCAT6hKL5bwoIC dLrD80lMAxUz7tL39C0SMpFIjwxcbIHwBkB8CHUS4Pj7hZnBG3pU7t/cv7zVmQbi286F TBPA== X-Gm-Message-State: AOJu0YxRjV8iGZkUqQdyYozTFAOhm9y6Pd1JZK6BI09QEzQ/GqGRXz/3 NYoRgsPGhbMXKay3dMhNpQs= X-Google-Smtp-Source: AGHT+IHruBOiRgXAXIhOGv3HEhG0TXfntjZC3EZX7hm8XsOve5jeSF6mQkJABnCE8Po3yB5rkc0b/A== X-Received: by 2002:a17:90a:d356:b0:268:14a0:f8a with SMTP id i22-20020a17090ad35600b0026814a00f8amr1481466pjx.39.1691658607856; Thu, 10 Aug 2023 02:10:07 -0700 (PDT) Received: from CLOUDLIANG-MB2.tencent.com ([103.7.29.32]) by smtp.gmail.com with ESMTPSA id pc16-20020a17090b3b9000b00263154aab24sm970704pjb.57.2023.08.10.02.10.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Aug 2023 02:10:07 -0700 (PDT) From: Jinrong Liang X-Google-Original-From: Jinrong Liang To: Sean Christopherson Cc: Paolo Bonzini , Isaku Yamahata , Jim Mattson , Shuah Khan , Aaron Lewis , David Matlack , Vishal Annapurve , Wanpeng Li , Like Xu , Jinrong Liang , linux-kselftest@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 2/6] KVM: selftests: Drop the return of remove_event() Date: Thu, 10 Aug 2023 17:09:41 +0800 Message-Id: <20230810090945.16053-3-cloudliang@tencent.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810090945.16053-1-cloudliang@tencent.com> References: <20230810090945.16053-1-cloudliang@tencent.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jinrong Liang None of the callers consume remove_event(), and it incorrectly implies that the incoming filter isn't modified. Drop the return. Suggested-by: Sean Christopherson Signed-off-by: Jinrong Liang --- tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 40507ed9fe8a..5ac05e64bec9 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -265,8 +265,7 @@ static struct kvm_pmu_event_filter *event_filter(uint32_t action) * Remove the first occurrence of 'event' (if any) from the filter's * event list. */ -static struct kvm_pmu_event_filter *remove_event(struct kvm_pmu_event_filter *f, - uint64_t event) +static void remove_event(struct kvm_pmu_event_filter *f, uint64_t event) { bool found = false; int i; @@ -279,7 +278,6 @@ static struct kvm_pmu_event_filter *remove_event(struct kvm_pmu_event_filter *f, } if (found) f->nevents--; - return f; } #define ASSERT_PMC_COUNTING_INSTRUCTIONS() \ From patchwork Thu Aug 10 09:09:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinrong Liang X-Patchwork-Id: 13349069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FC6AC001DE for ; Thu, 10 Aug 2023 09:10:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234484AbjHJJKV (ORCPT ); Thu, 10 Aug 2023 05:10:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233949AbjHJJKN (ORCPT ); Thu, 10 Aug 2023 05:10:13 -0400 Received: from mail-oi1-x242.google.com (mail-oi1-x242.google.com [IPv6:2607:f8b0:4864:20::242]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3720B212E; Thu, 10 Aug 2023 02:10:12 -0700 (PDT) Received: by mail-oi1-x242.google.com with SMTP id 5614622812f47-3a7ca8720a0so515131b6e.2; Thu, 10 Aug 2023 02:10:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691658611; x=1692263411; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p3EW3BDEjWekLeMIR76LBV2Wl1B/g3sy8ytWbgdNx00=; b=fTb/cxtSOx6/yR7yc9JvTYDasexipQReCW0r0FDJx4TeMMLxRbGWyy1daUGLaairLZ OM2ctXVqe1aeRKEothTZ9KLGb64g8ncUOXgJjW5PgZGu7mz5CbdCe9XL1FsCyoezgmi2 wqCag9boZ6HUGWgkiJV91cYDhCTJnrNwp3iEyqzABoOl+V+BGLQDYQJvs0ug468RQ1XB Wh4ERK7aujLHHrkIyN9hwgGSB5I/rOvEZfxqgiL4t8b4ClkADlVoOs7JI/tiAJGtZyag fiooWoGK6ZCUECjHf3pv4ckzPmndaVPHzQ9lmjDTsqXPIDXk2wFm0mfcGFVvGsfYI0ka 7Z2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691658611; x=1692263411; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p3EW3BDEjWekLeMIR76LBV2Wl1B/g3sy8ytWbgdNx00=; b=T/UdF5sKVHZ88YFK3jUcq8/Kj48NMIjM0jcfHzh8DMPJfY5FSvGYgq6n4sk5Mdmtnk 5D/J//tS073x7Gre0Mv7idZYo41nK9VsH0+17PxKblHbwJGGPhTUuu+I65TX8JRRMH9V sleCO/0g5PMDcrJI+0zY6HWYeJth9lbrXn6D83sO0qXEsHf7D5iuOu0VQAbnz3RPvUmY qTzeYlki+pcZDjh4kiISCp9jYc1dKPOXjaIa358kqoQJAlVzNg2uCXPw4OvloNI6RIJV xdAX3TFt1qEVcJVuByKjj6yJxnNUvi8gP3yW9SdMIQygoRJg0zqI+ZSL/5bsP3iBh34W HEJw== X-Gm-Message-State: AOJu0YwxABQHvDUdqlE4EOBGO5QSEJWq0rQSECnkgwqfGIyOFTEqRZoV 6zD/c6nFrrMCUeh1gPn59Wo= X-Google-Smtp-Source: AGHT+IG2Q2JS0h51sO15NRHImLZinq+6EFPGUI6wxl7AlSpW0ybEkykzfIEXqovDZTIeQNMA0o6KPg== X-Received: by 2002:a05:6808:1982:b0:3a7:6213:6899 with SMTP id bj2-20020a056808198200b003a762136899mr2591272oib.24.1691658611323; Thu, 10 Aug 2023 02:10:11 -0700 (PDT) Received: from CLOUDLIANG-MB2.tencent.com ([103.7.29.32]) by smtp.gmail.com with ESMTPSA id pc16-20020a17090b3b9000b00263154aab24sm970704pjb.57.2023.08.10.02.10.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Aug 2023 02:10:11 -0700 (PDT) From: Jinrong Liang X-Google-Original-From: Jinrong Liang To: Sean Christopherson Cc: Paolo Bonzini , Isaku Yamahata , Jim Mattson , Shuah Khan , Aaron Lewis , David Matlack , Vishal Annapurve , Wanpeng Li , Like Xu , Jinrong Liang , linux-kselftest@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 3/6] KVM: selftests: Introduce __kvm_pmu_event_filter to improved event filter settings Date: Thu, 10 Aug 2023 17:09:42 +0800 Message-Id: <20230810090945.16053-4-cloudliang@tencent.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810090945.16053-1-cloudliang@tencent.com> References: <20230810090945.16053-1-cloudliang@tencent.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jinrong Liang Add custom "__kvm_pmu_event_filter" structure to improve pmu event filter settings. Simplifies event filter setup by organizing event filter parameters in a cleaner, more organized way. Suggested-by: Sean Christopherson Signed-off-by: Jinrong Liang Reviewed-by: Isaku Yamahata --- .../kvm/x86_64/pmu_event_filter_test.c | 182 +++++++++--------- 1 file changed, 90 insertions(+), 92 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 5ac05e64bec9..94f5a89aac40 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -28,6 +28,10 @@ #define NUM_BRANCHES 42 +/* Matches KVM_PMU_EVENT_FILTER_MAX_EVENTS in pmu.c */ +#define MAX_FILTER_EVENTS 300 +#define MAX_TEST_EVENTS 10 + /* * This is how the event selector and unit mask are stored in an AMD * core performance event-select register. Intel's format is similar, @@ -69,21 +73,33 @@ #define INST_RETIRED EVENT(0xc0, 0) +struct __kvm_pmu_event_filter { + __u32 action; + __u32 nevents; + __u32 fixed_counter_bitmap; + __u32 flags; + __u32 pad[4]; + __u64 events[MAX_FILTER_EVENTS]; +}; + /* * This event list comprises Intel's eight architectural events plus * AMD's "retired branch instructions" for Zen[123] (and possibly * other AMD CPUs). */ -static const uint64_t event_list[] = { - EVENT(0x3c, 0), - INST_RETIRED, - EVENT(0x3c, 1), - EVENT(0x2e, 0x4f), - EVENT(0x2e, 0x41), - EVENT(0xc4, 0), - EVENT(0xc5, 0), - EVENT(0xa4, 1), - AMD_ZEN_BR_RETIRED, +static const struct __kvm_pmu_event_filter base_event_filter = { + .nevents = ARRAY_SIZE(base_event_filter.events), + .events = { + EVENT(0x3c, 0), + INST_RETIRED, + EVENT(0x3c, 1), + EVENT(0x2e, 0x4f), + EVENT(0x2e, 0x41), + EVENT(0xc4, 0), + EVENT(0xc5, 0), + EVENT(0xa4, 1), + AMD_ZEN_BR_RETIRED, + }, }; struct { @@ -225,47 +241,11 @@ static bool sanity_check_pmu(struct kvm_vcpu *vcpu) return !r; } -static struct kvm_pmu_event_filter *alloc_pmu_event_filter(uint32_t nevents) -{ - struct kvm_pmu_event_filter *f; - int size = sizeof(*f) + nevents * sizeof(f->events[0]); - - f = malloc(size); - TEST_ASSERT(f, "Out of memory"); - memset(f, 0, size); - f->nevents = nevents; - return f; -} - - -static struct kvm_pmu_event_filter * -create_pmu_event_filter(const uint64_t event_list[], int nevents, - uint32_t action, uint32_t flags) -{ - struct kvm_pmu_event_filter *f; - int i; - - f = alloc_pmu_event_filter(nevents); - f->action = action; - f->flags = flags; - for (i = 0; i < nevents; i++) - f->events[i] = event_list[i]; - - return f; -} - -static struct kvm_pmu_event_filter *event_filter(uint32_t action) -{ - return create_pmu_event_filter(event_list, - ARRAY_SIZE(event_list), - action, 0); -} - /* * Remove the first occurrence of 'event' (if any) from the filter's * event list. */ -static void remove_event(struct kvm_pmu_event_filter *f, uint64_t event) +static void remove_event(struct __kvm_pmu_event_filter *f, uint64_t event) { bool found = false; int i; @@ -313,66 +293,73 @@ static void test_without_filter(struct kvm_vcpu *vcpu) } static void test_with_filter(struct kvm_vcpu *vcpu, - struct kvm_pmu_event_filter *f) + struct __kvm_pmu_event_filter *__f) { + struct kvm_pmu_event_filter *f = (void *)__f; + vm_ioctl(vcpu->vm, KVM_SET_PMU_EVENT_FILTER, f); run_vcpu_and_sync_pmc_results(vcpu); } static void test_amd_deny_list(struct kvm_vcpu *vcpu) { - uint64_t event = EVENT(0x1C2, 0); - struct kvm_pmu_event_filter *f; + struct __kvm_pmu_event_filter f = { + .action = KVM_PMU_EVENT_DENY, + .nevents = 1, + .events = { + EVENT(0x1C2, 0), + }, + }; - f = create_pmu_event_filter(&event, 1, KVM_PMU_EVENT_DENY, 0); - test_with_filter(vcpu, f); - free(f); + test_with_filter(vcpu, &f); ASSERT_PMC_COUNTING_INSTRUCTIONS(); } static void test_member_deny_list(struct kvm_vcpu *vcpu) { - struct kvm_pmu_event_filter *f = event_filter(KVM_PMU_EVENT_DENY); + struct __kvm_pmu_event_filter f = base_event_filter; - test_with_filter(vcpu, f); - free(f); + f.action = KVM_PMU_EVENT_DENY; + test_with_filter(vcpu, &f); ASSERT_PMC_NOT_COUNTING_INSTRUCTIONS(); } static void test_member_allow_list(struct kvm_vcpu *vcpu) { - struct kvm_pmu_event_filter *f = event_filter(KVM_PMU_EVENT_ALLOW); + struct __kvm_pmu_event_filter f = base_event_filter; - test_with_filter(vcpu, f); - free(f); + f.action = KVM_PMU_EVENT_ALLOW; + test_with_filter(vcpu, &f); ASSERT_PMC_COUNTING_INSTRUCTIONS(); } static void test_not_member_deny_list(struct kvm_vcpu *vcpu) { - struct kvm_pmu_event_filter *f = event_filter(KVM_PMU_EVENT_DENY); + struct __kvm_pmu_event_filter f = base_event_filter; - remove_event(f, INST_RETIRED); - remove_event(f, INTEL_BR_RETIRED); - remove_event(f, AMD_ZEN_BR_RETIRED); - test_with_filter(vcpu, f); - free(f); + f.action = KVM_PMU_EVENT_DENY; + + remove_event(&f, INST_RETIRED); + remove_event(&f, INTEL_BR_RETIRED); + remove_event(&f, AMD_ZEN_BR_RETIRED); + test_with_filter(vcpu, &f); ASSERT_PMC_COUNTING_INSTRUCTIONS(); } static void test_not_member_allow_list(struct kvm_vcpu *vcpu) { - struct kvm_pmu_event_filter *f = event_filter(KVM_PMU_EVENT_ALLOW); + struct __kvm_pmu_event_filter f = base_event_filter; + + f.action = KVM_PMU_EVENT_ALLOW; - remove_event(f, INST_RETIRED); - remove_event(f, INTEL_BR_RETIRED); - remove_event(f, AMD_ZEN_BR_RETIRED); - test_with_filter(vcpu, f); - free(f); + remove_event(&f, INST_RETIRED); + remove_event(&f, INTEL_BR_RETIRED); + remove_event(&f, AMD_ZEN_BR_RETIRED); + test_with_filter(vcpu, &f); ASSERT_PMC_NOT_COUNTING_INSTRUCTIONS(); } @@ -567,19 +554,16 @@ static void run_masked_events_test(struct kvm_vcpu *vcpu, const uint64_t masked_events[], const int nmasked_events) { - struct kvm_pmu_event_filter *f; + struct __kvm_pmu_event_filter f = { + .nevents = nmasked_events, + .action = KVM_PMU_EVENT_ALLOW, + .flags = KVM_PMU_EVENT_FLAG_MASKED_EVENTS, + }; - f = create_pmu_event_filter(masked_events, nmasked_events, - KVM_PMU_EVENT_ALLOW, - KVM_PMU_EVENT_FLAG_MASKED_EVENTS); - test_with_filter(vcpu, f); - free(f); + memcpy(f.events, masked_events, sizeof(uint64_t) * nmasked_events); + test_with_filter(vcpu, &f); } -/* Matches KVM_PMU_EVENT_FILTER_MAX_EVENTS in pmu.c */ -#define MAX_FILTER_EVENTS 300 -#define MAX_TEST_EVENTS 10 - #define ALLOW_LOADS BIT(0) #define ALLOW_STORES BIT(1) #define ALLOW_LOADS_STORES BIT(2) @@ -751,17 +735,27 @@ static void test_masked_events(struct kvm_vcpu *vcpu) run_masked_events_tests(vcpu, events, nevents); } -static int run_filter_test(struct kvm_vcpu *vcpu, const uint64_t *events, - int nevents, uint32_t flags) +static int do_vcpu_set_pmu_event_filter(struct kvm_vcpu *vcpu, + struct __kvm_pmu_event_filter *__f) { - struct kvm_pmu_event_filter *f; - int r; + struct kvm_pmu_event_filter *f = (void *)__f; - f = create_pmu_event_filter(events, nevents, KVM_PMU_EVENT_ALLOW, flags); - r = __vm_ioctl(vcpu->vm, KVM_SET_PMU_EVENT_FILTER, f); - free(f); + return __vm_ioctl(vcpu->vm, KVM_SET_PMU_EVENT_FILTER, f); +} + +static int set_pmu_single_event_filter(struct kvm_vcpu *vcpu, uint64_t event, + uint32_t flags, uint32_t action) +{ + struct __kvm_pmu_event_filter f = { + .nevents = 1, + .flags = flags, + .action = action, + .events = { + event, + }, + }; - return r; + return do_vcpu_set_pmu_event_filter(vcpu, &f); } static void test_filter_ioctl(struct kvm_vcpu *vcpu) @@ -773,14 +767,18 @@ static void test_filter_ioctl(struct kvm_vcpu *vcpu) * Unfortunately having invalid bits set in event data is expected to * pass when flags == 0 (bits other than eventsel+umask). */ - r = run_filter_test(vcpu, &e, 1, 0); + r = set_pmu_single_event_filter(vcpu, e, 0, KVM_PMU_EVENT_ALLOW); TEST_ASSERT(r == 0, "Valid PMU Event Filter is failing"); - r = run_filter_test(vcpu, &e, 1, KVM_PMU_EVENT_FLAG_MASKED_EVENTS); + r = set_pmu_single_event_filter(vcpu, e, + KVM_PMU_EVENT_FLAG_MASKED_EVENTS, + KVM_PMU_EVENT_ALLOW); TEST_ASSERT(r != 0, "Invalid PMU Event Filter is expected to fail"); e = KVM_PMU_ENCODE_MASKED_ENTRY(0xff, 0xff, 0xff, 0xf); - r = run_filter_test(vcpu, &e, 1, KVM_PMU_EVENT_FLAG_MASKED_EVENTS); + r = set_pmu_single_event_filter(vcpu, e, + KVM_PMU_EVENT_FLAG_MASKED_EVENTS, + KVM_PMU_EVENT_ALLOW); TEST_ASSERT(r == 0, "Valid PMU Event Filter is failing"); } From patchwork Thu Aug 10 09:09:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinrong Liang X-Patchwork-Id: 13349070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D2F7C04A94 for ; Thu, 10 Aug 2023 09:10:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234509AbjHJJKZ (ORCPT ); Thu, 10 Aug 2023 05:10:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234452AbjHJJKS (ORCPT ); Thu, 10 Aug 2023 05:10:18 -0400 Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C6962699; Thu, 10 Aug 2023 02:10:15 -0700 (PDT) Received: by mail-pj1-x1042.google.com with SMTP id 98e67ed59e1d1-26934bc3059so1331667a91.1; Thu, 10 Aug 2023 02:10:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691658615; x=1692263415; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2fZBKSqD0Jf4EbIjfm4Dlb8jsXARp8sPconxfCXxUFY=; b=pUXZg1XyvkyccRwfZE2pTI5oYft+dcK8ubaWMfticT7kSrzLA4G7VohMnE7R+cLRn3 LvApPqaVitYZm7H8t6Z4MHWFQnoIsenEXzQtkzBq8ylpz4bvlfwMFkk5ja3w+G8/TPAt TqUwLYKaGo62OlaTzgnFXnoBFVqC0sqJkIXp1s44LoCrSUZuYdRHprVvujmxLpwVT4oa QSoPJaclxrXYovfUEIRQi1fFF5LAWf8sh0aLs3ySUXlSyo51+mZCsKdEyEPDGw1HbZct gDFA7p2ESBHPg5wzuaSr7sWC7FnI/up+Sr/CAs9ZZ6QOzKTOXNerU9RxsLYOBAwnuzsv pULw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691658615; x=1692263415; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2fZBKSqD0Jf4EbIjfm4Dlb8jsXARp8sPconxfCXxUFY=; b=Wfm85JPWs/BBISGPVBK0U1Yn95daIxQUj35xn+RiFyrQnLCTPkmLZog9NDlKsaSNZ2 H8nieYrJi5oXE01TNEFt+SBPPKM3V0AOPAXeBssVRYQPNtcS5XlCu7L/La5TBmDh7PO2 TvH8FZy23KVaLn3PCmdl5JEp5I5m3ujV25GGAQh179zxYt/MdEMvF4A4qSGGFG3R6P4u FNbriGu25/tfItfFW1LE8Q63yvLapfJw/6pLSnvD0OK7QuF5aTtDikn1ozwj6xeCt9uZ AJlYSSp72CJYsEFgNT0OBZs1mY51Jcb1l7VWWMqoydmw7uHL53IoTjR96IB/j9O1prFs I2wA== X-Gm-Message-State: AOJu0YzBZG7vZ0YBKlBjRuEtf1M5a8Cx53AB3gD0zKqRSRqVVmMV/Y9H NV/xKHDkChyyad7Qobn+s24= X-Google-Smtp-Source: AGHT+IG2yGaeJeVpezS7e5wbJ7D30Ot3wdzkudHAl1q5S8YvCuRHrcFjYvpfgmrZYgbLgLXKRFoBlQ== X-Received: by 2002:a17:90a:7149:b0:269:23fe:e325 with SMTP id g9-20020a17090a714900b0026923fee325mr2041612pjs.6.1691658614866; Thu, 10 Aug 2023 02:10:14 -0700 (PDT) Received: from CLOUDLIANG-MB2.tencent.com ([103.7.29.32]) by smtp.gmail.com with ESMTPSA id pc16-20020a17090b3b9000b00263154aab24sm970704pjb.57.2023.08.10.02.10.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Aug 2023 02:10:14 -0700 (PDT) From: Jinrong Liang X-Google-Original-From: Jinrong Liang To: Sean Christopherson Cc: Paolo Bonzini , Isaku Yamahata , Jim Mattson , Shuah Khan , Aaron Lewis , David Matlack , Vishal Annapurve , Wanpeng Li , Like Xu , Jinrong Liang , linux-kselftest@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 4/6] KVM: selftests: Add test cases for unsupported PMU event filter input values Date: Thu, 10 Aug 2023 17:09:43 +0800 Message-Id: <20230810090945.16053-5-cloudliang@tencent.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810090945.16053-1-cloudliang@tencent.com> References: <20230810090945.16053-1-cloudliang@tencent.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jinrong Liang Add test cases to verify the handling of unsupported input values for the PMU event filter. The tests cover unsupported "action" values, unsupported "flags" values, and unsupported "nevents" values. All these cases should return an error, as they are currently not supported by the filter. Furthermore, the tests also cover the case where setting non-existent fixed counters in the fixed bitmap does not fail. Signed-off-by: Jinrong Liang Reviewed-by: Isaku Yamahata --- .../kvm/x86_64/pmu_event_filter_test.c | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 94f5a89aac40..8b8bfee11016 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -32,6 +32,10 @@ #define MAX_FILTER_EVENTS 300 #define MAX_TEST_EVENTS 10 +#define PMU_EVENT_FILTER_INVALID_ACTION (KVM_PMU_EVENT_DENY + 1) +#define PMU_EVENT_FILTER_INVALID_FLAGS (KVM_PMU_EVENT_FLAGS_VALID_MASK << 1) +#define PMU_EVENT_FILTER_INVALID_NEVENTS (MAX_FILTER_EVENTS + 1) + /* * This is how the event selector and unit mask are stored in an AMD * core performance event-select register. Intel's format is similar, @@ -760,6 +764,8 @@ static int set_pmu_single_event_filter(struct kvm_vcpu *vcpu, uint64_t event, static void test_filter_ioctl(struct kvm_vcpu *vcpu) { + uint8_t nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + struct __kvm_pmu_event_filter f; uint64_t e = ~0ul; int r; @@ -780,6 +786,26 @@ static void test_filter_ioctl(struct kvm_vcpu *vcpu) KVM_PMU_EVENT_FLAG_MASKED_EVENTS, KVM_PMU_EVENT_ALLOW); TEST_ASSERT(r == 0, "Valid PMU Event Filter is failing"); + + f = base_event_filter; + f.action = PMU_EVENT_FILTER_INVALID_ACTION; + r = do_vcpu_set_pmu_event_filter(vcpu, &f); + TEST_ASSERT(r, "Set invalid action is expected to fail"); + + f = base_event_filter; + f.flags = PMU_EVENT_FILTER_INVALID_FLAGS; + r = do_vcpu_set_pmu_event_filter(vcpu, &f); + TEST_ASSERT(r, "Set invalid flags is expected to fail"); + + f = base_event_filter; + f.nevents = PMU_EVENT_FILTER_INVALID_NEVENTS; + r = do_vcpu_set_pmu_event_filter(vcpu, &f); + TEST_ASSERT(r, "Exceeding the max number of filter events should fail"); + + f = base_event_filter; + f.fixed_counter_bitmap = ~GENMASK_ULL(nr_fixed_counters, 0); + r = do_vcpu_set_pmu_event_filter(vcpu, &f); + TEST_ASSERT(!r, "Masking non-existent fixed counters should be allowed"); } int main(int argc, char *argv[]) From patchwork Thu Aug 10 09:09:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinrong Liang X-Patchwork-Id: 13349071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E28AAC04A94 for ; Thu, 10 Aug 2023 09:10:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234562AbjHJJKh (ORCPT ); Thu, 10 Aug 2023 05:10:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234463AbjHJJKV (ORCPT ); Thu, 10 Aug 2023 05:10:21 -0400 Received: from mail-oo1-xc42.google.com (mail-oo1-xc42.google.com [IPv6:2607:f8b0:4864:20::c42]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F8CE2129; Thu, 10 Aug 2023 02:10:19 -0700 (PDT) Received: by mail-oo1-xc42.google.com with SMTP id 006d021491bc7-56c85b723cfso554493eaf.3; Thu, 10 Aug 2023 02:10:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691658618; x=1692263418; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BaGQGXVS3Xb/dgWAgI7rZr0EhirlVtsDOIjVVbosZ/k=; b=NAUqDsLFpreU3gHZ4wgAAlia3OKZsm0IuaycUTTezGP3/5LbDefIGyuAKSkIEEd0SX 65K99uXaxN0IU/LjEj+mlulbvtbTjuaWWFbmCcksp+u2mf9EUYzgce5yIFaAZuF+E34a lXmphcV1MaH+2rv7vYUEkjFh9TSlskOdzJGyjdnjx1uiXprTcGZBQQeneRmb+PUX6YMd 8Hcmsqs5dL2uhsBiWRlX88EcbDBBSDZLG7Xu2zTZZ1d5B83yCF41U/vcgtP/gTkYiX+G DzIIFQCnnmzI9kx45ptOiilqf+asQpXjefmErEEUMrzMIWWmqp0Ll3kOJoN7VaLKRwLI GM8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691658618; x=1692263418; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BaGQGXVS3Xb/dgWAgI7rZr0EhirlVtsDOIjVVbosZ/k=; b=R2sVGnjGojyz/POIbbwdsGiw5QiWr32mfcE+bqL/u8Bf/olNJ9AQSNnqaPJBqZ+ZW+ MyOSiZSp/uWsGAJw//7tOI1QGbyhYFY36yY3y+BOb9/WFfgyZv4N67avbUz8aZA7mSJN 6d13iVNJH12+AWAK/4Xx1i0H9ysOMUh9LJ1+CGklCmtsVY+uU84Vpj64X1nkmDTTPzGT mj93ypSV+CP5PhnfOuSPeQ1sE5lq8N0A7yCjsiogpoPEJMcGgVqEhQn4V5vGmbP1Shyp cXSouQ/rD3O2EmjUu49Axu+dS9j2eRA7VkidDKnu7wTdya9UnH17IQjkAMQTouztMxCL q8nw== X-Gm-Message-State: AOJu0YxnsAe3S2oRM8s3+ZYDpvtlbsr3wjL5lpZIptgE1GwCGM5czWlS CGZNRuldJHFnZM6iY4QknyqmdcKk0CziX/rkiJo= X-Google-Smtp-Source: AGHT+IFVi/hH3g8Nm6FPOlP2XH/VFJrCbjjW0RQN+wkRyhp1UTQXAG7nVbh0JdJeQD2fskhm/Eplvg== X-Received: by 2002:a05:6808:185:b0:3a7:49e5:e0da with SMTP id w5-20020a056808018500b003a749e5e0damr1881288oic.26.1691658618324; Thu, 10 Aug 2023 02:10:18 -0700 (PDT) Received: from CLOUDLIANG-MB2.tencent.com ([103.7.29.32]) by smtp.gmail.com with ESMTPSA id pc16-20020a17090b3b9000b00263154aab24sm970704pjb.57.2023.08.10.02.10.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Aug 2023 02:10:18 -0700 (PDT) From: Jinrong Liang X-Google-Original-From: Jinrong Liang To: Sean Christopherson Cc: Paolo Bonzini , Isaku Yamahata , Jim Mattson , Shuah Khan , Aaron Lewis , David Matlack , Vishal Annapurve , Wanpeng Li , Like Xu , Jinrong Liang , linux-kselftest@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 5/6] KVM: selftests: Test if event filter meets expectations on fixed counters Date: Thu, 10 Aug 2023 17:09:44 +0800 Message-Id: <20230810090945.16053-6-cloudliang@tencent.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810090945.16053-1-cloudliang@tencent.com> References: <20230810090945.16053-1-cloudliang@tencent.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jinrong Liang Add tests to cover that pmu event_filter works as expected when it's applied to fixed performance counters, even if there is none fixed counter exists (e.g. Intel guest pmu version=1 or AMD guest). Signed-off-by: Jinrong Liang Reviewed-by: Isaku Yamahata --- .../kvm/x86_64/pmu_event_filter_test.c | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 8b8bfee11016..732c76c41bb0 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -27,6 +27,7 @@ #define ARCH_PERFMON_BRANCHES_RETIRED 5 #define NUM_BRANCHES 42 +#define INTEL_PMC_IDX_FIXED 32 /* Matches KVM_PMU_EVENT_FILTER_MAX_EVENTS in pmu.c */ #define MAX_FILTER_EVENTS 300 @@ -808,6 +809,84 @@ static void test_filter_ioctl(struct kvm_vcpu *vcpu) TEST_ASSERT(!r, "Masking non-existent fixed counters should be allowed"); } +static void intel_run_fixed_counter_guest_code(uint8_t fixed_ctr_idx) +{ + for (;;) { + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); + wrmsr(MSR_CORE_PERF_FIXED_CTR0 + fixed_ctr_idx, 0); + + /* Only OS_EN bit is enabled for fixed counter[idx]. */ + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, BIT_ULL(4 * fixed_ctr_idx)); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, + BIT_ULL(INTEL_PMC_IDX_FIXED + fixed_ctr_idx)); + __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); + + GUEST_SYNC(rdmsr(MSR_CORE_PERF_FIXED_CTR0 + fixed_ctr_idx)); + } +} + +static uint64_t test_with_fixed_counter_filter(struct kvm_vcpu *vcpu, + uint32_t action, uint32_t bitmap) +{ + struct __kvm_pmu_event_filter f = { + .action = action, + .fixed_counter_bitmap = bitmap, + }; + do_vcpu_set_pmu_event_filter(vcpu, &f); + + return run_vcpu_to_sync(vcpu); +} + +static void __test_fixed_counter_bitmap(struct kvm_vcpu *vcpu, uint8_t idx, + uint8_t nr_fixed_counters) +{ + unsigned int i; + uint32_t bitmap; + uint64_t count; + + TEST_ASSERT(nr_fixed_counters < sizeof(bitmap) * 8, + "Invalid nr_fixed_counters"); + + /* + * Check the fixed performance counter can count normally when KVM + * userspace doesn't set any pmu filter. + */ + count = run_vcpu_to_sync(vcpu); + TEST_ASSERT(count, "Unexpected count value: %ld\n", count); + + for (i = 0; i < BIT(nr_fixed_counters); i++) { + bitmap = BIT(i); + count = test_with_fixed_counter_filter(vcpu, KVM_PMU_EVENT_ALLOW, + bitmap); + TEST_ASSERT_EQ(!!count, !!(bitmap & BIT(idx))); + + count = test_with_fixed_counter_filter(vcpu, KVM_PMU_EVENT_DENY, + bitmap); + TEST_ASSERT_EQ(!!count, !(bitmap & BIT(idx))); + } +} + +static void test_fixed_counter_bitmap(void) +{ + uint8_t nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + struct kvm_vm *vm; + struct kvm_vcpu *vcpu; + uint8_t idx; + + /* + * Check that pmu_event_filter works as expected when it's applied to + * fixed performance counters. + */ + for (idx = 0; idx < nr_fixed_counters; idx++) { + vm = vm_create_with_one_vcpu(&vcpu, + intel_run_fixed_counter_guest_code); + vcpu_args_set(vcpu, 1, idx); + __test_fixed_counter_bitmap(vcpu, idx, nr_fixed_counters); + kvm_vm_free(vm); + } +} + int main(int argc, char *argv[]) { void (*guest_code)(void); @@ -851,6 +930,7 @@ int main(int argc, char *argv[]) kvm_vm_free(vm); test_pmu_config_disable(guest_code); + test_fixed_counter_bitmap(); return 0; } From patchwork Thu Aug 10 09:09:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinrong Liang X-Patchwork-Id: 13349072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAB39C04FDF for ; Thu, 10 Aug 2023 09:10:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234574AbjHJJKm (ORCPT ); Thu, 10 Aug 2023 05:10:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234447AbjHJJKY (ORCPT ); Thu, 10 Aug 2023 05:10:24 -0400 Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 686F7211E; Thu, 10 Aug 2023 02:10:22 -0700 (PDT) Received: by mail-pg1-x542.google.com with SMTP id 41be03b00d2f7-564a0d2d35eso460328a12.0; Thu, 10 Aug 2023 02:10:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691658622; x=1692263422; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sCYgAfd5bZuG3/28sUikGuYme1J7pykWX651228hrR8=; b=VvXorgPLVm/eEiFpVC0OIv0jPwu7sPvvMO30Dp8Chf7YNfeYIlXawKXW0/rSn0rQgx DwuRLG/LX09ieLeAebicdXsSAJn2sw6vdBOsVYNyAqGEAgUX3JbW3JynOHl/rdGgA7Ao orGR7iyF80qBS57wSzBaMZWk0hKIzTzJO5ysUnCizqY4vMyjQ2moL1+4E8cxB5Jsmm5F lbxXG/gnVylwiMaPPmMsJQQvd+D8YKG2Oj+jA4EN1JhVWIfDm6PLtwM+7wPqsAWjEOtV 4LNS+ApgsMLFD6LuVOdkxvIoIeWhfNN+MQ684U+66FYCVGpkgN0A+hshXDvSvgXDw8ta 6FsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691658622; x=1692263422; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sCYgAfd5bZuG3/28sUikGuYme1J7pykWX651228hrR8=; b=aYaZQSD8QB0MHjyGTre6jWUO/3kTrS1QmUHHCkeOYDxGuJU7plOo+hN1DOGxSCD6aW PwmnQbQLaP9U7oeWDajeCfYOl3z7Z3oCafW+nax8MS9c8aXS5B7b4gUCEl7kElv/blJP Tom4gYD7W4k9JEkS66zTZPrCQJ2yqtiv05/nbVv2B4Dq6ODgPYLkc9ymJRMiQl9qENMw q/yejSTfuP3Ky0ZJUrHg72j+k4KVh6WbQIzTzfpaMqd81uRWHL7+NXpeC40dVP/Ivxlh I3M+8agbQ7Lwg1Cfo7ZJaW7txOqW98cSSASq++LLRDOEWDXZm+ReQC7Wg+Z80zyiRX2A 7mMw== X-Gm-Message-State: AOJu0YxL9cxXaAMBXWu316dAVxNJ++iymfvwivoXwLnyHExCvBAbjVEm rKMltDJcS92OiNiL/rQ8MjY= X-Google-Smtp-Source: AGHT+IF7EVucMd05qUvpask4vh1ZQLlRGwgIr9/xKVM72fgSx73Vs2mbIbW1BNycb1vVzPhA/8LtEQ== X-Received: by 2002:a17:90a:9747:b0:269:96e:7d52 with SMTP id i7-20020a17090a974700b00269096e7d52mr1291397pjw.26.1691658621801; Thu, 10 Aug 2023 02:10:21 -0700 (PDT) Received: from CLOUDLIANG-MB2.tencent.com ([103.7.29.32]) by smtp.gmail.com with ESMTPSA id pc16-20020a17090b3b9000b00263154aab24sm970704pjb.57.2023.08.10.02.10.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Aug 2023 02:10:21 -0700 (PDT) From: Jinrong Liang X-Google-Original-From: Jinrong Liang To: Sean Christopherson Cc: Paolo Bonzini , Isaku Yamahata , Jim Mattson , Shuah Khan , Aaron Lewis , David Matlack , Vishal Annapurve , Wanpeng Li , Like Xu , Jinrong Liang , linux-kselftest@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 6/6] KVM: selftests: Test gp event filters don't affect fixed event filters Date: Thu, 10 Aug 2023 17:09:45 +0800 Message-Id: <20230810090945.16053-7-cloudliang@tencent.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810090945.16053-1-cloudliang@tencent.com> References: <20230810090945.16053-1-cloudliang@tencent.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jinrong Liang Add a test to ensure that setting both generic and fixed performance event filters does not affect the consistency of the fixed event filter behavior in KVM. Signed-off-by: Jinrong Liang --- .../kvm/x86_64/pmu_event_filter_test.c | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 732c76c41bb0..2166b4085ca3 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -838,6 +838,19 @@ static uint64_t test_with_fixed_counter_filter(struct kvm_vcpu *vcpu, return run_vcpu_to_sync(vcpu); } +static uint64_t test_set_gp_and_fixed_event_filter(struct kvm_vcpu *vcpu, + uint32_t action, + uint32_t bitmap) +{ + struct __kvm_pmu_event_filter f = base_event_filter; + + f.action = action; + f.fixed_counter_bitmap = bitmap; + do_vcpu_set_pmu_event_filter(vcpu, &f); + + return run_vcpu_to_sync(vcpu); +} + static void __test_fixed_counter_bitmap(struct kvm_vcpu *vcpu, uint8_t idx, uint8_t nr_fixed_counters) { @@ -864,6 +877,20 @@ static void __test_fixed_counter_bitmap(struct kvm_vcpu *vcpu, uint8_t idx, count = test_with_fixed_counter_filter(vcpu, KVM_PMU_EVENT_DENY, bitmap); TEST_ASSERT_EQ(!!count, !(bitmap & BIT(idx))); + + /* + * Check that fixed_counter_bitmap has higher priority than + * events[] when both are set. + */ + count = test_set_gp_and_fixed_event_filter(vcpu, + KVM_PMU_EVENT_ALLOW, + bitmap); + TEST_ASSERT_EQ(!!count, !!(bitmap & BIT(idx))); + + count = test_set_gp_and_fixed_event_filter(vcpu, + KVM_PMU_EVENT_DENY, + bitmap); + TEST_ASSERT_EQ(!!count, !(bitmap & BIT(idx))); } }