From patchwork Wed Aug 16 11:25:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6D282C001E0 for ; Wed, 16 Aug 2023 11:25:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6CD9B10E34D; Wed, 16 Aug 2023 11:25:51 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 12D5310E347 for ; Wed, 16 Aug 2023 11:25:48 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E72ECC85; Wed, 16 Aug 2023 13:24:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185073; bh=ZXPuvKRX9sprHbo4Gpv06P7fu4Zcz2YshqV8Y8PC7RA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=pwUcqjDnjxDTPJOB5LLs42TFguNy6jxlko33YjqoNsEeFgPRLO+sMpQe+MjneSCmS jXOX5nOCp+qAG0A34L8Dws5VSN7LOQCu4vAYW+OHJ3KYfynaGT7+4cnLY41xKyggXn NTpeemrgY8dg5Lxm/4NTzmg/CC/7TufY0OM5Tso8= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:04 +0300 Subject: [PATCH v2 01/12] drm/tegra: rgb: Parameterize V- and H-sync polarities MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-1-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1843; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=GghajFVwAuY/jQ2Sbjd3Hk+E+RHO699TYVsqwsh7V5U=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LIzXTggTDUU/b8Y6cxIrzc6YDU8xIreubHaS CQ3so3qymqJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyMwAKCRD6PaqMvJYe 9VcdD/4jtfA+Exg74OnSyr8FP5u4K+47fKDod2jyMhDssy7Kef6F1jPQT03bTGO17A+ZP5HHVAo lY7Tx5scXojq/ofDRswxIIOb2T+f4aLt4dXXzr/GT2d082MpktW828ql2CHrFPuJF5kTvlh3lSJ RFF++8d/0nSGoouc9rj/U8suKN82Y1b9cCxslavCtdDEn35TcBcfkczuCEQZqlNB8D/GP1udZnD hQZzGI5n/unYbWUKWc6xlHUAOdCUwixdwhliD8Canu0f6HuwUJ+8iVf2tXxQzrQqkxB6NDmCYMB OypfGci0wzVR6f9H9wKjuFYFNyb+Sz8SL3iiiZBlJcYOIMIhHr3klqezZ97MjucrkkZ4x8vzsWo wCk/WRt89ygZs8rnucd971ov0RhfCILDBYBASTRdfwt7It/yjdxS7liUqCwUit3eSyj/sN46MHx 678datOimyls8RsUcCKPGEyUsVWFcCqbX2PmFQaJR15sgHMk3yOVIHb97XxkwW/lZfu5Gc0cEKU lFuxWj9sSh5JxDOqEszaySboqTZj6uJKuzobn5VvnAiR9yKlDOr4G6VB2tZpNdLTvB4D+iMYe/F O4qAonbYqFMTvkbaIGP53lv22bAIhtNde+UoTInM6Dd9RSyk//fQHKousjHBlQaTj6U9yYFRRHN 5RLBpLtAFSJHM7Q== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aradhya Bhatia , Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Thierry Reding , Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Thierry Reding The polarities of the V- and H-sync signals are encoded as flags in the display mode, so use the existing information to setup the signals for the RGB interface. Signed-off-by: Thierry Reding Cc: Thierry Reding [tomi.valkeinen@ideasonboard.com: default to positive sync] Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tegra/rgb.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c index 79566c9ea8ff..fc66bbd913b2 100644 --- a/drivers/gpu/drm/tegra/rgb.c +++ b/drivers/gpu/drm/tegra/rgb.c @@ -99,6 +99,7 @@ static void tegra_rgb_encoder_disable(struct drm_encoder *encoder) static void tegra_rgb_encoder_enable(struct drm_encoder *encoder) { + struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; struct tegra_output *output = encoder_to_output(encoder); struct tegra_rgb *rgb = to_rgb(output); u32 value; @@ -108,10 +109,19 @@ static void tegra_rgb_encoder_enable(struct drm_encoder *encoder) value = DE_SELECT_ACTIVE | DE_CONTROL_NORMAL; tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS); - /* XXX: parameterize? */ + /* configure H- and V-sync signal polarities */ value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); - value &= ~LVS_OUTPUT_POLARITY_LOW; - value &= ~LHS_OUTPUT_POLARITY_LOW; + + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + value |= LHS_OUTPUT_POLARITY_LOW; + else + value &= ~LHS_OUTPUT_POLARITY_LOW; + + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + value |= LVS_OUTPUT_POLARITY_LOW; + else + value &= ~LVS_OUTPUT_POLARITY_LOW; + tegra_dc_writel(rgb->dc, value, DC_COM_PIN_OUTPUT_POLARITY(1)); /* XXX: parameterize? */ From patchwork Wed Aug 16 11:25:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CEA4C001E0 for ; Wed, 16 Aug 2023 11:25:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D266710E34A; Wed, 16 Aug 2023 11:25:51 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0AFF510E34A for ; Wed, 16 Aug 2023 11:25:49 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 29871D92; Wed, 16 Aug 2023 13:24:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185075; bh=3BEyrzp4IUiLGe9w3xtacn7Yy6nvFBbT4HOk9yd56NA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PwyClJyGiTaBplHC3RSEylTjB+qWvimMlOWACblDqNfEWk1Joqc7n17EtCH5vj5WA uF/awlU+fQ1pVaZrPyJy03XgPZNMUyfiZlI5Hnf33maF7LM49qYS/ZKTXxujHM7i7B h98qiem4VwpLm5JUEGj+hhGykvYB3fapNWWhwudg= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:05 +0300 Subject: [PATCH v2 02/12] drm/bridge: tc358768: Fix use of uninitialized variable MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-2-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=909; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=3BEyrzp4IUiLGe9w3xtacn7Yy6nvFBbT4HOk9yd56NA=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI0/EHCNZvMIu3aVBbp1Z7MswxNqg10WZwwQ FOTnz2j426JAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNAAKCRD6PaqMvJYe 9So7D/0YzkazixpuRfx6fd/gk7EGJztOFzgzCcSqp3qnbeg4nYfTnHY9GOgLWumkR6aqGbbM9+n 13LWMb4iJt8rQZ5wz+kH3HdvN6GuxbiB5sjvtzlcir+QMcZd8yfyIXq1jnv9F+X2O3V4WA754Z8 OE8sDEhOUhUW0lhu++q8sB4YmiZmov+lXlXCdSvwSo5nfSHx8WUY09hYuGnCP76QXKBz0NUJSCi SrVVrAO4GUPcn1KhXXd96/iSHXmbiCFel5SYGiqu9eSvXSLpVnuCCwEyBW2WJfLPhWGQBVMYGUx klN2QcoSwnVPMXGwjYGyyY9aDSOkFMT+3k0OhuNEeWfRXsdgLG9eNqrYOvPFs2bZI3oHLLOxVA2 zPHsORvsUUtntFuei9ifb48Eb24aXq3Q8KDKWGSE/tOud6CP+QxeXyRClTJ5cejo0fE/LkgIBPA e2TC2XQ2R5bkIO5fx2vqF+qyHtnCWPWCaxVjdSUEl+RYjJjUSBtnM9A7XEKUYBXKl2z7CUZd7jm VvAc17epEkb6m5Lb1b5+mgK73DYsBuJKPd3jTaex3Tr4+93IQUGWHUewZjU9mHFYGl6mscAsaOU OlA0GrzvCoxOeMxf9y3P1tXNpnaVwO0hX5HVY/8NH6a+yxrGqbMDGV39TNxn5t8m2G4uCiBpgKg rerq44LQJOBdJuw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" smatch reports: drivers/gpu/drm/bridge/tc358768.c:223 tc358768_update_bits() error: uninitialized symbol 'orig'. Fix this by bailing out from tc358768_update_bits() if the tc358768_read() produces an error. Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 819a4b6ec2a0..bc97a837955b 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -216,6 +216,10 @@ static void tc358768_update_bits(struct tc358768_priv *priv, u32 reg, u32 mask, u32 tmp, orig; tc358768_read(priv, reg, &orig); + + if (priv->error) + return; + tmp = orig & ~mask; tmp |= val & mask; if (tmp != orig) From patchwork Wed Aug 16 11:25:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27CBFC04A94 for ; Wed, 16 Aug 2023 11:25:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 219D910E353; Wed, 16 Aug 2023 11:25:52 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2818C10E34A for ; Wed, 16 Aug 2023 11:25:50 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 583E7F02; Wed, 16 Aug 2023 13:24:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185076; bh=rtp9mGXPYI+O3f2aQFTiJmta7zUghg7DuTpPSnMYVrU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=mwCAAGor0XgfCErUPPpzGnuvPj+F/xtuqYCPV3JzuIAVA4Fx8SLlwSNCUIOOmUpLe hbm/TDWVPEZMgrKH/pz/O6cQ91Pb2mIPqRUv8qibNP9q8FmYKsMLg7SO7ijJNmkrkq 1VAsgkhw78bhxjX+urOH27F5uJK4vwn5+HJFOG2s= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:06 +0300 Subject: [PATCH v2 03/12] drm/bridge: tc358768: Fix bit updates MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-3-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1966; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=rtp9mGXPYI+O3f2aQFTiJmta7zUghg7DuTpPSnMYVrU=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI0QrBzBy8JYnZMC0ia0eGlN+H4kYue70rxj yc9B2U59P6JAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNAAKCRD6PaqMvJYe 9SzRD/kBDOiaahTVcDeoCwdXi2cZbkUCNuFaOATo9bfBOi4hQtS8OMsvezTaMM+NWKDEY6Kgj42 sFBHoEA+HjiGZZk8p4wnaXsixWR4hOUHqeA4JA5ddUKJPqyuSCIIWvAyMgEP2cCFxqBARYhLSDu N/dOyKzg3cYbUWUdBnMEXHJ5xV9+pIvFQTzXGkQl6h+HbwfMoM2sqmoFTaQ+9x24KerjGmoYHq7 /Ktjqx0Hea8rER9jyGvNmHon26nmx/XvBCotC+32tobYK5FSbyda53kjlCT8t+hltyhciWyDCMC iuxTuJwqwaJbGtc3F2IRCqjgYXOZ8GGFMXVkQivhs+mWLnGEBMSM/vnkm5T3llydM7s2YljcEnd Vl6zreE3s0CkyVqrg71GilTa4zrRmS40AN12t5KoXCu2klr1iwe+iB7fZpHtE73IS4WDhRSqnfE DA1whhFB4xviBGrkj7Og01itLpnFJ+CuZgleFJ54byuHDlODqk9uk9JrzwEDxTUxtnaILivokOE VfeDlpHl1VbxYaGivSQEq2oMKjN9WiRUOPiqZXlbsbGA+xEv1HDYY1w38B4481r3NWJ1Tgc6J4k NVt0n5ORBrWxvqGmQsjyE5idCGAABEIKMmbC39KcuIGHIwbDK6dSrk/YmmPpvz6pw7AdcFweNah sPmuaIaHDiwh9rw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The driver has a few places where it does: if (thing_is_enabled_in_config) update_thing_bit_in_hw() This means that if the thing is _not_ enabled, the bit never gets cleared. This affects the h/vsyncs and continuous DSI clock bits. Fix the driver to always update the bit. Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index bc97a837955b..b668f77673c3 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -794,8 +794,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) val |= BIT(i + 1); tc358768_write(priv, TC358768_HSTXVREGEN, val); - if (!(mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) - tc358768_write(priv, TC358768_TXOPTIONCNTRL, 0x1); + tc358768_write(priv, TC358768_TXOPTIONCNTRL, + (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val = tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); @@ -861,11 +861,12 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) tc358768_write(priv, TC358768_DSI_HACT, hact); /* VSYNC polarity */ - if (!(mode->flags & DRM_MODE_FLAG_NVSYNC)) - tc358768_update_bits(priv, TC358768_CONFCTL, BIT(5), BIT(5)); + tc358768_update_bits(priv, TC358768_CONFCTL, BIT(5), + (mode->flags & DRM_MODE_FLAG_PVSYNC) ? BIT(5) : 0); + /* HSYNC polarity */ - if (mode->flags & DRM_MODE_FLAG_PHSYNC) - tc358768_update_bits(priv, TC358768_PP_MISC, BIT(0), BIT(0)); + tc358768_update_bits(priv, TC358768_PP_MISC, BIT(0), + (mode->flags & DRM_MODE_FLAG_PHSYNC) ? BIT(0) : 0); /* Start DSI Tx */ tc358768_write(priv, TC358768_DSI_START, 0x1); From patchwork Wed Aug 16 11:25:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00866C001E0 for ; Wed, 16 Aug 2023 11:26:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2928F10E355; Wed, 16 Aug 2023 11:25:58 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3FAD910E34A for ; Wed, 16 Aug 2023 11:25:51 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 70E621B83; Wed, 16 Aug 2023 13:24:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185077; bh=TUkJXEdGx2L3x9eOO5C14gMRZFfjPUo5XB/iG7hSXNo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=wT8uai6kYpCT7e997tqiHmEJ/tk3gv0JlMksq2mqAvavq+vOILPJrOjwZlo1evyT4 dLqiG035pa5IgCTPz09hF0mrnNPpUuhGZCStlA8A1VXh3lne83cXa/XLf7k8zIXglm eLWPlg1bbdyZkXTKfJcfoxEWUMe1bxxy1QYmnmb4= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:07 +0300 Subject: [PATCH v2 04/12] drm/bridge: tc358768: Cleanup PLL calculations MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-4-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2487; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=TUkJXEdGx2L3x9eOO5C14gMRZFfjPUo5XB/iG7hSXNo=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI1SArTyutIV17XojzHHC5KuLY3z8/2Bvl6T W9ACZ1vZH6JAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNQAKCRD6PaqMvJYe 9XjrD/45qk5Y/wFlKk/Bcmd+Exi9hMi7jS30ahdF3g95qpQPuUJxJZ1xRhvuB4U5nNqXmQEb04Q 6adABiSq1H0UhTkvKRghu3IQvlyE4KIDgTjLNF+sQVERbtx9I1eUg0sob89lwHzdId8fdvc7+dU kxx3GHiq+LkAhqRmaZKYL2ORkUs04iSyKIMThQUeFHMMsNEqgm62YKfWkMSG8nzP1c9xW+Hjjmg NpXP9HK+cRwV5oB8xL/RmZ5dM/+vf/Iu4oVgIYFDqa61Atk8bsHxsnPWChvKRCLBgcfCojeO2xj PtXwixAYpKRcVqeETBN81igYzw5y+1sKCzR2+F6ZVlch3uN71tolfGX45wsM9Va9wgdas2ubS7u joIT/iwSmSqYnSgixAGNw00FmZyJS9KMnxGBJyh3BUPmVOBz1Q8qIYVBXavTqvq5eeB2Zn3E/Cq 3YkY+4a9X22Q1NE+sU2vwtqVcPD212UcnaYszOqIJlRgvRYSnYoZxR0egWlHW+J1NEkjcwgeLDh vBX3afulH4ueTLOygHdy+ObyjSvvGRGSsPQmoPQOwqR2yAufCJhznuX8CHdY5VKboRwOgdZKgou ItYPjwUiM6A7zy/FZz5w62KpJPNGjpmSzkkmal1o/QTMsHjgSqEexVTwPzqiz0YtXcE1B+vUE2t pX8N+4LYn/GBZ5g== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" As is quite common, some of TC358768's PLL register fields are to be programmed with (value - 1). Specifically, the FBD and PRD, multiplier and divider, are such fields. However, what the driver currently does is that it considers that the formula used for PLL rate calculation is: RefClk * [(FBD + 1)/ (PRD + 1)] * [1 / (2^FRS)] where FBD and PRD are values directly from the registers, while a more sensible way to look at it is: RefClk * FBD / PRD * (1 / (2^FRS)) and when the FBD and PRD values are written to the registers, they will be subtracted by one. Change the driver accordingly, as it simplifies the PLL code. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index b668f77673c3..d5831a1236e9 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -316,7 +316,7 @@ static int tc358768_calc_pll(struct tc358768_priv *priv, target_pll = tc358768_pclk_to_pll(priv, mode->clock * 1000); - /* pll_clk = RefClk * [(FBD + 1)/ (PRD + 1)] * [1 / (2^FRS)] */ + /* pll_clk = RefClk * FBD / PRD * (1 / (2^FRS)) */ for (i = 0; i < ARRAY_SIZE(frs_limits); i++) if (target_pll >= frs_limits[i]) @@ -336,19 +336,19 @@ static int tc358768_calc_pll(struct tc358768_priv *priv, best_prd = 0; best_fbd = 0; - for (prd = 0; prd < 16; ++prd) { - u32 divisor = (prd + 1) * (1 << frs); + for (prd = 1; prd <= 16; ++prd) { + u32 divisor = prd * (1 << frs); u32 fbd; - for (fbd = 0; fbd < 512; ++fbd) { + for (fbd = 1; fbd <= 512; ++fbd) { u32 pll, diff, pll_in; - pll = (u32)div_u64((u64)refclk * (fbd + 1), divisor); + pll = (u32)div_u64((u64)refclk * fbd, divisor); if (pll >= max_pll || pll < min_pll) continue; - pll_in = (u32)div_u64((u64)refclk, prd + 1); + pll_in = (u32)div_u64((u64)refclk, prd); if (pll_in < 4000000) continue; @@ -611,7 +611,7 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, mode->clock * 1000); /* PRD[15:12] FBD[8:0] */ - tc358768_write(priv, TC358768_PLLCTL0, (prd << 12) | fbd); + tc358768_write(priv, TC358768_PLLCTL0, ((prd - 1) << 12) | (fbd - 1)); /* FRS[11:10] LBWS[9:8] CKEN[4] RESETB[1] EN[0] */ tc358768_write(priv, TC358768_PLLCTL1, From patchwork Wed Aug 16 11:25:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82965C001E0 for ; Wed, 16 Aug 2023 11:26:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E0F9410E35A; Wed, 16 Aug 2023 11:26:04 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5973F10E354 for ; Wed, 16 Aug 2023 11:25:52 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 8960F2FB2; Wed, 16 Aug 2023 13:24:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185078; bh=WCGNIXcGcdl4nJn+dx6lcBvQUFqQ55HfWTEz54MJwVw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Pobx7GREq+jxP2D5S9cwrkgVYulAKHsDT35rrBRDgNucTIoQu9HbsG842iTqIO1A4 t/3TLHbRgRNmJMsYgQyI1R8cskIOXJfPTmBkvBk2Lr/IkJe5wqRw1j3TFoCieG5Ivb PQb6UIuNTYahbl42b3FioXAarBVPiy6RVlfhzb1I= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:08 +0300 Subject: [PATCH v2 05/12] drm/bridge: tc358768: Use struct videomode MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-5-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4738; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=WCGNIXcGcdl4nJn+dx6lcBvQUFqQ55HfWTEz54MJwVw=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI1cyiU52QNWyrMoqwKywZcdpedX3eMKPmwu 4irGh3r+BqJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNQAKCRD6PaqMvJYe 9URSD/9d/CWhuuFgasgn/wBnjZOa9QJezas5p4Mq+uKptu+IRpybFzC6w1Sf8TQJG2XZ5bC1AGO wK1P2zL4Tyrm2RI6Ky+FNwbkRt0YjaQaFrX1cw7blftTmvmlgCfOQZszCKX/wVOQ9+rZnICQrTS Kof4rXhlPL3D02EikOOo60SFIzbzckq5tFWt4F7I6x2LEFDDph5iRQtc1bnIJlVRsZ7//0xipqH phgbpxWPopwUua5wFnogl+H9YXxZIrp3DZCVVGC//RudSCqDWZbPvtMkBNmkaigpQr2HX5ZlmON xo5o3WYuWpVxUNvPW6NBlKKBKRaOVwAnX0qYmDF37UGKLgCRGGToNLY0LMFeGXn0+BwJ3HDL7zq +aWTqZfigv+wGMcBsCvkE4XIm7zkVR+WzR4yfKRzwCjaVggbeppkLRI1em1+mKTNNFBosF7ayOQ jx96eZX8qbAATzsQ+mN2py3gboMC7Z9Rqwz+/b9M44JktRU6+WeCqlrkAAfrjvSDL9zmFqcrLuV SbNE93YWe3lAowDTHsQKgx9ql31Lck7ca5V3mFh/8iNZlUnKvHF9jd0KwDqJjo8OqHSiehD6WMB EdofYdnyQ5zysa9FRuvG+3R0BfLsgyEvFkj9C7xXTp31yt+s4ZOyIxbjlyXErdDGfbNfkqvRE/I pMfkbVgY4kaW12w== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The TC358768 documentation uses HFP, HBP, etc. values to deal with the video mode, while the driver currently uses the DRM display mode (htotal, hsync_start, etc). Change the driver to convert the DRM display mode to struct videomode, which then allows us to use the same units the documentation uses. This makes it much easier to work on the code when using the TC358768 documentation as a reference. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 45 +++++++++++++++++++++------------------ 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index d5831a1236e9..9b633038af33 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -650,6 +650,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) u32 dsiclk, dsibclk, video_start; const u32 internal_delay = 40; int ret, i; + struct videomode vm; if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { dev_warn_once(priv->dev, "Non-continuous mode unimplemented, falling back to continuous\n"); @@ -673,6 +674,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) return; } + drm_display_mode_to_videomode(mode, &vm); + dsiclk = priv->dsiclk; dsibclk = dsiclk / 4; @@ -681,28 +684,28 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) switch (dsi_dev->format) { case MIPI_DSI_FMT_RGB888: val |= (0x3 << 4); - hact = mode->hdisplay * 3; - video_start = (mode->htotal - mode->hsync_start) * 3; + hact = vm.hactive * 3; + video_start = (vm.hsync_len + vm.hback_porch) * 3; data_type = MIPI_DSI_PACKED_PIXEL_STREAM_24; break; case MIPI_DSI_FMT_RGB666: val |= (0x4 << 4); - hact = mode->hdisplay * 3; - video_start = (mode->htotal - mode->hsync_start) * 3; + hact = vm.hactive * 3; + video_start = (vm.hsync_len + vm.hback_porch) * 3; data_type = MIPI_DSI_PACKED_PIXEL_STREAM_18; break; case MIPI_DSI_FMT_RGB666_PACKED: val |= (0x4 << 4) | BIT(3); - hact = mode->hdisplay * 18 / 8; - video_start = (mode->htotal - mode->hsync_start) * 18 / 8; + hact = vm.hactive * 18 / 8; + video_start = (vm.hsync_len + vm.hback_porch) * 18 / 8; data_type = MIPI_DSI_PIXEL_STREAM_3BYTE_18; break; case MIPI_DSI_FMT_RGB565: val |= (0x5 << 4); - hact = mode->hdisplay * 2; - video_start = (mode->htotal - mode->hsync_start) * 2; + hact = vm.hactive * 2; + video_start = (vm.hsync_len + vm.hback_porch) * 2; data_type = MIPI_DSI_PACKED_PIXEL_STREAM_16; break; default: @@ -814,43 +817,43 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) tc358768_write(priv, TC358768_DSI_EVENT, 0); /* vact */ - tc358768_write(priv, TC358768_DSI_VACT, mode->vdisplay); + tc358768_write(priv, TC358768_DSI_VACT, vm.vactive); /* vsw */ - tc358768_write(priv, TC358768_DSI_VSW, - mode->vsync_end - mode->vsync_start); + tc358768_write(priv, TC358768_DSI_VSW, vm.vsync_len); + /* vbp */ - tc358768_write(priv, TC358768_DSI_VBPR, - mode->vtotal - mode->vsync_end); + tc358768_write(priv, TC358768_DSI_VBPR, vm.vback_porch); /* hsw * byteclk * ndl / pclk */ - val = (u32)div_u64((mode->hsync_end - mode->hsync_start) * + val = (u32)div_u64(vm.hsync_len * ((u64)priv->dsiclk / 4) * priv->dsi_lanes, - mode->clock * 1000); + vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); /* hbp * byteclk * ndl / pclk */ - val = (u32)div_u64((mode->htotal - mode->hsync_end) * + val = (u32)div_u64(vm.hback_porch * ((u64)priv->dsiclk / 4) * priv->dsi_lanes, - mode->clock * 1000); + vm.pixelclock); tc358768_write(priv, TC358768_DSI_HBPR, val); } else { /* Set event mode */ tc358768_write(priv, TC358768_DSI_EVENT, 1); /* vact */ - tc358768_write(priv, TC358768_DSI_VACT, mode->vdisplay); + tc358768_write(priv, TC358768_DSI_VACT, vm.vactive); /* vsw (+ vbp) */ tc358768_write(priv, TC358768_DSI_VSW, - mode->vtotal - mode->vsync_start); + vm.vsync_len + vm.vback_porch); + /* vbp (not used in event mode) */ tc358768_write(priv, TC358768_DSI_VBPR, 0); /* (hsw + hbp) * byteclk * ndl / pclk */ - val = (u32)div_u64((mode->htotal - mode->hsync_start) * + val = (u32)div_u64((vm.hsync_len + vm.hback_porch) * ((u64)priv->dsiclk / 4) * priv->dsi_lanes, - mode->clock * 1000); + vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); /* hbp (not used in event mode) */ From patchwork Wed Aug 16 11:25:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B0FEC001E0 for ; Wed, 16 Aug 2023 11:26:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B1A6310E356; Wed, 16 Aug 2023 11:25:58 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 76ED310E355 for ; Wed, 16 Aug 2023 11:25:53 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id A4E643B3C; Wed, 16 Aug 2023 13:24:38 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185079; bh=VL2Zw7Ueb46o20OnyXzo7UsNsItrGawjFD5subpRhLA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hWtBUSsH07OyVSm+CV8lXWWMY19eHrc0OqTwKXT76JBpUEeFbxsokinGaGqWm3vrx dqzXXt1zT4WxncSrAvuXAObVnIMitCasUGy4mRxXYJpgP3vZUIWJKWggW/TaqP5qCN iNzep7BbBqSr3sOvbUBB7CaaMuGSM5ldaXaxyDUk= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:09 +0300 Subject: [PATCH v2 06/12] drm/bridge: tc358768: Print logical values, not raw register values MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-6-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4161; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=VL2Zw7Ueb46o20OnyXzo7UsNsItrGawjFD5subpRhLA=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI1rU6lTiy7LrKpsdpK4Gv7SuXUNWlKJi/FV hc8iD4IBGeJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNQAKCRD6PaqMvJYe 9Wt4EACimvd/85vtRtwqQJ9M5bZ9ypzeH0to/cYCidE7g4EHnfbB7h/Y46vOYUKblCnlqXE4dJ6 FL9RoLY9pn9KfjvZM7woKWVJAw8O5FZb/+do902++WWMHBO9DYLaa8JaIymcWcAI3fdDtUM8k6l SL6kDXyPqW7txqpzmqMa3RACd8ijvDkZu+emM49WyoF9U6W2qxzLnQ4EF9766nINNfS9XG48Jez 4yND8CCf+ajTtqJGapOGP8d4zwcmDUUdf6hytpDHs6I319IXOhL1EmuKDtlm0Fj4q/8ibSmh4Hk rOG4xBFP1DDsvzkWIRl1GrECeNkRHynbhgcNe64w1Hsbkqm2YWX/wmSE+pj9ShE7WBDrHSTgrYz hBrjtk0XPdj/7cZx2DQXEKryWHh5MLHjib6H276aJI8Dq6sO4N+Aucmqv1mn5r/hWHm9Q4/QuoD +N/MGXkJgWfCkPURp4ES6CHKfPsTXIPoxwKcAMICEd+wPU5RmW4wydK8sLu9Tq75NKVB4p0O7jG cbq+GIUyRUtpm5ff1G+uxN+m55czQvON/vWiOQOca7TqBBbOy5josAcRQC3aBKvJSAG1vTCZXin 3MsaM7WPuDRlbAa2vVQdYjdLlF+WQHHibsaqqB+/KGh+FlmkwfpqVQzSBDQjDFPwK8bGJP+Oc5V U72OpOiXRFnKb7w== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The driver debug prints DSI related timings as raw register values in hex. It is much more useful to see the "logical" value of the timing, not the register value. Change the prints to print the values separately, in case a single register contains multiple values, and use %u to have it in a more human consumable form. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 9b633038af33..0ef51d04bb21 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -739,57 +739,59 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* LP11 > 100us for D-PHY Rx Init */ val = tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "LINEINITCNT: 0x%x\n", val); + dev_dbg(priv->dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); /* LPTimeCnt > 50ns */ val = tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; lptxcnt = val; - dev_dbg(priv->dev, "LPTXTIMECNT: 0x%x\n", val); + dev_dbg(priv->dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); /* 38ns < TCLK_PREPARE < 95ns */ val = tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; + dev_dbg(priv->dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 2; + dev_dbg(priv->dev, "TCLK_ZEROCNT %u\n", val2); val |= val2 << 8; - dev_dbg(priv->dev, "TCLK_HEADERCNT: 0x%x\n", val); tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5; val = clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "TCLK_TRAILCNT: 0x%x\n", val); + dev_dbg(priv->dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val = 50 + tc358768_to_ns(4 * ui_nsk); val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; + dev_dbg(priv->dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10; val2 = clamp(raw_val, 0, 127); + dev_dbg(priv->dev, "THS_ZEROCNT %u\n", val2); val |= val2 << 8; - dev_dbg(priv->dev, "THS_HEADERCNT: 0x%x\n", val); tc358768_write(priv, TC358768_THS_HEADERCNT, val); /* TWAKEUP > 1ms in lptxcnt steps */ val = tc358768_ns_to_cnt(1020000, dsibclk_nsk); val = val / (lptxcnt + 1) - 1; - dev_dbg(priv->dev, "TWAKEUP: 0x%x\n", val); + dev_dbg(priv->dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); /* TCLK_POSTCNT > 60ns + 52*UI */ val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), dsibclk_nsk) - 3; - dev_dbg(priv->dev, "TCLK_POSTCNT: 0x%x\n", val); + dev_dbg(priv->dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), dsibclk_nsk) - 4; val = clamp(raw_val, 0, 15); - dev_dbg(priv->dev, "THS_TRAILCNT: 0x%x\n", val); + dev_dbg(priv->dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); val = BIT(0); @@ -803,10 +805,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val = tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); val = tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; + dev_dbg(priv->dev, "TXTAGOCNT: %u\n", val); val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), dsibclk_nsk) - 2; + dev_dbg(priv->dev, "RXTASURECNT: %u\n", val2); val = val << 16 | val2; - dev_dbg(priv->dev, "BTACNTRL1: 0x%x\n", val); tc358768_write(priv, TC358768_BTACNTRL1, val); /* START[0] */ From patchwork Wed Aug 16 11:25:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C196C04A94 for ; Wed, 16 Aug 2023 11:26:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 995EC10E354; Wed, 16 Aug 2023 11:25:58 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9623D10E354 for ; Wed, 16 Aug 2023 11:25:54 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C6E56C85; Wed, 16 Aug 2023 13:24:39 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185080; bh=TDI9Cw23pqxLneDtSVZkuUlDvO2vp0pomzNNIvZxHCc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QIC7b8wtDQq343JfVZiOv8UxRfxqiA6M0EuMLhsWNfSwXfqqahpHdsyZcry8qP7hS y9jxSi+6MHyPmqwyW7wyArU3XOeiGHfRatmEm7eoAShlQOzd+Iv7eRbQK060nRwAUe CHfezxMIAu/Sk4j5Sz8pqaG0L57Y7NGcbbhPARoY= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:10 +0300 Subject: [PATCH v2 07/12] drm/bridge: tc358768: Use dev for dbg prints, not priv->dev MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-7-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6214; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=TDI9Cw23pqxLneDtSVZkuUlDvO2vp0pomzNNIvZxHCc=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI2fpKL9jYf8dK7rw0vj9p1eDroE+nPWWrDj PAWAMYREriJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNgAKCRD6PaqMvJYe 9fN8D/oDH88P+HhDCDxftBnFSrYr4aE4DKD0okCKMz+BXwhy3IkxOK+TiUB+C7TVM29CNbIqNlP D00cN4u2SgkKIvSzXCdrAeDRi26JurSJD2GVEJVpKZpd+JgTda0HIsvWg0Ff0HkVDFXCszzsJlw GYSnXjKgtPirEZivoY5DuLW1Gzh62sL/z+6swgNxdr26JmT7u4UdQYnzyzCfO7qIb9I7Z4Nk2M+ lT9QL9Gl2WKz+75allkP37TvS28FVj1/FRXFI06mRsJHUnKNgGkfnJpaGYlVI+zgSErVWwgfIYn eMP6/icdh9me+phJypMMGCBUZr1WnT4Iyb3LErwthNznhv3qVSZG7V03mSC5L3Fj2hxD99kthSs 66RjMa3RZFgXu4iaEa+yqadj1ru9WODPgfRAbnGDfPdcf797wKWgostkp4sVZA/V0CJ0uqAx6bI 7VvAO15GBQGSKkq9p7K/BzmNkmFP8KcYXh8UCPYV92pR2SWD9jYaNUgfFvdkqoz20ptTtibSw4O kADlLNJSb1FbhHqIqUpbZRXeXl+CckgTM5afcy72u8j1Wz4a9WBw1N+eCWOLI3FIN1ousAK+jQw PfVqAiiPhh093Ulkh6VmR9yuFcjOSNTgesiw6xwZX+zWtztuPWnz9W2VJzdxDXjHJKVu0+5RkS+ Yyz7gzH/sGFV91Q== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Simplify the code by capturing the priv->dev value to dev variable, and use it. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 41 ++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 0ef51d04bb21..3266c08d9bf1 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -651,9 +651,10 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) const u32 internal_delay = 40; int ret, i; struct videomode vm; + struct device *dev = priv->dev; if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { - dev_warn_once(priv->dev, "Non-continuous mode unimplemented, falling back to continuous\n"); + dev_warn_once(dev, "Non-continuous mode unimplemented, falling back to continuous\n"); mode_flags &= ~MIPI_DSI_CLOCK_NON_CONTINUOUS; } @@ -661,7 +662,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) ret = tc358768_sw_reset(priv); if (ret) { - dev_err(priv->dev, "Software reset failed: %d\n", ret); + dev_err(dev, "Software reset failed: %d\n", ret); tc358768_hw_disable(priv); return; } @@ -669,7 +670,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) mode = &bridge->encoder->crtc->state->adjusted_mode; ret = tc358768_setup_pll(priv, mode); if (ret) { - dev_err(priv->dev, "PLL setup failed: %d\n", ret); + dev_err(dev, "PLL setup failed: %d\n", ret); tc358768_hw_disable(priv); return; } @@ -709,7 +710,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) data_type = MIPI_DSI_PACKED_PIXEL_STREAM_16; break; default: - dev_err(priv->dev, "Invalid data format (%u)\n", + dev_err(dev, "Invalid data format (%u)\n", dsi_dev->format); tc358768_hw_disable(priv); return; @@ -733,65 +734,65 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) dsibclk); dsiclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); ui_nsk = dsiclk_nsk / 2; - dev_dbg(priv->dev, "dsiclk_nsk: %u\n", dsiclk_nsk); - dev_dbg(priv->dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(priv->dev, "dsibclk_nsk: %u\n", dsibclk_nsk); + dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); + dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); + dev_dbg(dev, "dsibclk_nsk: %u\n", dsibclk_nsk); /* LP11 > 100us for D-PHY Rx Init */ val = tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "LINEINITCNT: %u\n", val); + dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); /* LPTimeCnt > 50ns */ val = tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; lptxcnt = val; - dev_dbg(priv->dev, "LPTXTIMECNT: %u\n", val); + dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); /* 38ns < TCLK_PREPARE < 95ns */ val = tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "TCLK_PREPARECNT %u\n", val); + dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 2; - dev_dbg(priv->dev, "TCLK_ZEROCNT %u\n", val2); + dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5; val = clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "TCLK_TRAILCNT: %u\n", val); + dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val = 50 + tc358768_to_ns(4 * ui_nsk); val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "THS_PREPARECNT %u\n", val); + dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10; val2 = clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "THS_ZEROCNT %u\n", val2); + dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); /* TWAKEUP > 1ms in lptxcnt steps */ val = tc358768_ns_to_cnt(1020000, dsibclk_nsk); val = val / (lptxcnt + 1) - 1; - dev_dbg(priv->dev, "TWAKEUP: %u\n", val); + dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); /* TCLK_POSTCNT > 60ns + 52*UI */ val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), dsibclk_nsk) - 3; - dev_dbg(priv->dev, "TCLK_POSTCNT: %u\n", val); + dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), dsibclk_nsk) - 4; val = clamp(raw_val, 0, 15); - dev_dbg(priv->dev, "THS_TRAILCNT: %u\n", val); + dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); val = BIT(0); @@ -805,10 +806,10 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val = tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); val = tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; - dev_dbg(priv->dev, "TXTAGOCNT: %u\n", val); + dev_dbg(dev, "TXTAGOCNT: %u\n", val); val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), dsibclk_nsk) - 2; - dev_dbg(priv->dev, "RXTASURECNT: %u\n", val2); + dev_dbg(dev, "RXTASURECNT: %u\n", val2); val = val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val); @@ -902,7 +903,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) ret = tc358768_clear_error(priv); if (ret) { - dev_err(priv->dev, "Bridge pre_enable failed: %d\n", ret); + dev_err(dev, "Bridge pre_enable failed: %d\n", ret); tc358768_bridge_disable(bridge); tc358768_bridge_post_disable(bridge); } From patchwork Wed Aug 16 11:25:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F039EC04A94 for ; Wed, 16 Aug 2023 11:26:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8F9E110E359; Wed, 16 Aug 2023 11:26:04 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id C075E10E354 for ; Wed, 16 Aug 2023 11:25:55 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E25D08618; Wed, 16 Aug 2023 13:24:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185081; bh=Z33kVdpZefR4T4jHN2TcfkOhn6sG3FUQswblV1pZ7fI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=qv6mAyckLrVom8kroIMi+SUUGTIPwQQAEbq11HAMBsxNbdFMiJ3cQOL4+LbeoFhRm 0843ElXtVXzTKN+er00RTGRC3+FIuUgjzpp8VUXYTcjfRDqEMD/06aW6EORycQppQw WmNkeFK7nGtVL/dmZxr8pNGYXL3e+RpaPANee/PI= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:11 +0300 Subject: [PATCH v2 08/12] drm/bridge: tc358768: Rename dsibclk to hsbyteclk MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-8-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=7306; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=Z33kVdpZefR4T4jHN2TcfkOhn6sG3FUQswblV1pZ7fI=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI2lOCPR0mvZ3K7AIr2GE9hCOYLSXIpOSX9F UumylQZVneJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNgAKCRD6PaqMvJYe 9Z5GD/9EHzwCgLd9tZErN6G2lbtLp7uMiHvvC/vF+FoxZMALqFX7L9YlhidjYc3BW+dLooH+9B/ 3p+DP2uzVS6lZ3X5S9MgBCeukZw1FcyVNT09uZAul8BcYw8ArC3IUnQ9vPdaYNU1+IPyf7vtkHC 3Ts3qLbqEycHT6YKWlH2PXWLS6A1TL8JAy00AcB29PdTarZsZiFKIH2Y546IWkkOflnDFWHLKRI AIQf1/t5uaTi92RTMm1RPuY124ooeoxrugc+ByPZS+VXnSHsK6GSOlXPlLJ7fuPaRc0mskDzyLK BHmkQuf4eYhMs+vkOSYGz4hKiku+E7q8Cc22Vxv4rKwOL0n9YaIlUQGA/ptpG/LOHV2r0NDBXIy oOGiBIJA5eoFR4f9hlTvc9hs5/GmTnEff4cczpm+mQ0BBbIAaXOEVMQ0AcJzfpxe8Ww3143YzVK LvFqLnRi4rhtg3NZJjm0pK3PmtxFQl762nuw30SOnhnfLK6Wjrsdp4UoiiErqLeHFfVX6oC50vs woIRpfODOsX7QFRwFHq07+RhnLne9B3sbtjudQEETaFctwb7C4MEnOjHpGxtK3117x+SRXokdye DH5OSJynj8wwgyCxyUXTyzBPBIxApcf/w5xTMmQhI1jPa8f+Rc+AYNdcdDGMT3mwn04fKRdC3DW SEwt9F4dbIgoV/w== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Toshiba documentation talks about HSByteClk when referring to the DSI HS byte clock, whereas the driver uses 'dsibclk' name. Also, in a few places the driver calculates the byte clock from the DSI clock, even if the byte clock is already available in a variable. To align the driver with the documentation, change the 'dsibclk' variable to 'hsbyteclk'. This also make it easier to visually separate 'dsibclk' and 'dsiclk' variables. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 48 +++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 3266c08d9bf1..db45b4a982c0 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -604,7 +604,7 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, dev_dbg(priv->dev, "PLL: refclk %lu, fbd %u, prd %u, frs %u\n", clk_get_rate(priv->refclk), fbd, prd, frs); - dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, DSIByteClk %u\n", + dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, HSByteClk %u\n", priv->dsiclk * 2, priv->dsiclk, priv->dsiclk / 4); dev_dbg(priv->dev, "PLL: pclk %u (panel: %u)\n", tc358768_pll_to_pclk(priv, priv->dsiclk * 2), @@ -646,8 +646,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) u32 val, val2, lptxcnt, hact, data_type; s32 raw_val; const struct drm_display_mode *mode; - u32 dsibclk_nsk, dsiclk_nsk, ui_nsk; - u32 dsiclk, dsibclk, video_start; + u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; + u32 dsiclk, hsbyteclk, video_start; const u32 internal_delay = 40; int ret, i; struct videomode vm; @@ -678,7 +678,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) drm_display_mode_to_videomode(mode, &vm); dsiclk = priv->dsiclk; - dsibclk = dsiclk / 4; + hsbyteclk = dsiclk / 4; /* Data Format Control Register */ val = BIT(2) | BIT(1) | BIT(0); /* rdswap_en | dsitx_en | txdt_en */ @@ -730,67 +730,67 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); /* DSI Timings */ - dsibclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, - dsibclk); + hsbyteclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, + hsbyteclk); dsiclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); ui_nsk = dsiclk_nsk / 2; dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(dev, "dsibclk_nsk: %u\n", dsibclk_nsk); + dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); /* LP11 > 100us for D-PHY Rx Init */ - val = tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); /* LPTimeCnt > 50ns */ - val = tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; lptxcnt = val; dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); /* 38ns < TCLK_PREPARE < 95ns */ - val = tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), - dsibclk_nsk) - 2; + hsbyteclk_nsk) - 2; dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5; + raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk_nsk) - 5; val = clamp(raw_val, 0, 127); dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val = 50 + tc358768_to_ns(4 * ui_nsk); - val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ - raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10; + raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbyteclk_nsk) - 10; val2 = clamp(raw_val, 0, 127); dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); /* TWAKEUP > 1ms in lptxcnt steps */ - val = tc358768_ns_to_cnt(1020000, dsibclk_nsk); + val = tc358768_ns_to_cnt(1020000, hsbyteclk_nsk); val = val / (lptxcnt + 1) - 1; dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); /* TCLK_POSTCNT > 60ns + 52*UI */ val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), - dsibclk_nsk) - 3; + hsbyteclk_nsk) - 3; dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), - dsibclk_nsk) - 4; + hsbyteclk_nsk) - 4; val = clamp(raw_val, 0, 15); dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); @@ -804,11 +804,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ - val = tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); - val = tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; + val = tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk * 4); + val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) / 4 - 1; dev_dbg(dev, "TXTAGOCNT: %u\n", val); - val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), - dsibclk_nsk) - 2; + val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk), + hsbyteclk_nsk) - 2; dev_dbg(dev, "RXTASURECNT: %u\n", val2); val = val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val); @@ -831,13 +831,13 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* hsw * byteclk * ndl / pclk */ val = (u32)div_u64(vm.hsync_len * - ((u64)priv->dsiclk / 4) * priv->dsi_lanes, + (u64)hsbyteclk * priv->dsi_lanes, vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); /* hbp * byteclk * ndl / pclk */ val = (u32)div_u64(vm.hback_porch * - ((u64)priv->dsiclk / 4) * priv->dsi_lanes, + (u64)hsbyteclk * priv->dsi_lanes, vm.pixelclock); tc358768_write(priv, TC358768_DSI_HBPR, val); } else { @@ -856,7 +856,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* (hsw + hbp) * byteclk * ndl / pclk */ val = (u32)div_u64((vm.hsync_len + vm.hback_porch) * - ((u64)priv->dsiclk / 4) * priv->dsi_lanes, + (u64)hsbyteclk * priv->dsi_lanes, vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); From patchwork Wed Aug 16 11:25:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355056 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A40AC001B0 for ; Wed, 16 Aug 2023 11:26:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D224E10E360; Wed, 16 Aug 2023 11:26:14 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id DB24110E354 for ; Wed, 16 Aug 2023 11:25:56 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0FD862C6; Wed, 16 Aug 2023 13:24:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185083; bh=ELgigWtoD/WjDlm4NjUr8bRyAjoxE3TF/Vb3awGuK/o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dTihjPEukkARZAplyD1z00TV4NMsvcnWJp2fl+4U+o1VVHQa3NMyJOSoAfaeUL11W j9rb7FBK/mJq6d9FqXurCm+I3jdUbbhiLj9bp8QG4Ozn/5fM4uogqSOfFuaSgATnXY oi9e2DSVS97/60qQIWhW2kt9omZ+XGt+PfR7RrDo= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:12 +0300 Subject: [PATCH v2 09/12] drm/bridge: tc358768: Clean up clock period code MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-9-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6503; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=ELgigWtoD/WjDlm4NjUr8bRyAjoxE3TF/Vb3awGuK/o=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI2qdvWwNubYj5eOUAOcUTKKsnKjFFi9raxt mkiHpOuq5aJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNgAKCRD6PaqMvJYe 9QYSD/42SVjvWHOPmpXWjyPkZglwskza5VlAY/F9mNhR6h9Z2S9zPzojmoRpv9qJzCIrbd0Q1+q q5veHZB4JuiNJac8BfDa1WisgJbTfaTc6egW/dZD27VWeq0sVsa+YSClm05zhKu1LwTmoPSdL4o ydkTAuAYjDtWCYw1xAGhdcV+b4LHZKWu2gwQckLduvdNRDXeylB0E+Y5b6r3/VzzlJF8TJPoCXi GmwAkZgdZMpYLhwP9Mz1fxoSKJEyBbazdTobsnQQGWVH9xUapwcNqOUjIMMYnRnuFmSs5MLFvAk YQ4JfDyw1yLXzlUIhUxc6GYbX6LiEapgvKNcIAvFR8hzW9bSHdmOclmOvYlsplBGsQb5thMerpC ywx+Sr+9lizaWb2ab2Y6mudD4tGhB5zs3mx/qg74sZVPtjPDn9/Xz1Bx2caeELkUYhfBou1lfKI HlS8r2Yu86bUqPUywdH8pqhxOv+uGlwcqQAIglFDUKIuBogYbvpGRAZNl5uJeGATUcQ8qHD6qBe Sg4z/HSvlK4TMCjnWWbiNhKrMyrQkWnoOfWBVV891wn0csDjYcpqnig6uF1RqAAuITRrunbaLFC sqiUeYpagk/SeNE3xv60sHJHV7nbaVFs4mnFOj1/4+x3EvJ4QKzt2XsnSyOgpFkT7lWsAalZEm4 Q5BtK+uz2gNtMng== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The driver defines TC358768_PRECISION as 1000, and uses "nsk" to refer to clock periods. The original author does not remember where all this came from. Effectively the driver is using picoseconds as the unit for clock periods, yet referring to them by "nsk". Clean this up by just saying the periods are in picoseconds. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 60 +++++++++++++++++++-------------------- 1 file changed, 29 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index db45b4a982c0..9411b0fb471e 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -627,15 +628,14 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, return tc358768_clear_error(priv); } -#define TC358768_PRECISION 1000 -static u32 tc358768_ns_to_cnt(u32 ns, u32 period_nsk) +static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps) { - return (ns * TC358768_PRECISION + period_nsk) / period_nsk; + return (ns * 1000 + period_ps) / period_ps; } -static u32 tc358768_to_ns(u32 nsk) +static u32 tc358768_ps_to_ns(u32 ps) { - return (nsk / TC358768_PRECISION); + return ps / 1000; } static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) @@ -646,7 +646,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) u32 val, val2, lptxcnt, hact, data_type; s32 raw_val; const struct drm_display_mode *mode; - u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; + u32 hsbyteclk_ps, dsiclk_ps, ui_ps; u32 dsiclk, hsbyteclk, video_start; const u32 internal_delay = 40; int ret, i; @@ -730,67 +730,65 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); /* DSI Timings */ - hsbyteclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, - hsbyteclk); - dsiclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); - ui_nsk = dsiclk_nsk / 2; - dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); - dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); + hsbyteclk_ps = (u32)div_u64(PICO, hsbyteclk); + dsiclk_ps = (u32)div_u64(PICO, dsiclk); + ui_ps = dsiclk_ps / 2; + dev_dbg(dev, "dsiclk: %u ps, ui %u ps, hsbyteclk %u ps\n", dsiclk_ps, + ui_ps, hsbyteclk_ps); /* LP11 > 100us for D-PHY Rx Init */ - val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; + val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_ps) - 1; dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); /* LPTimeCnt > 50ns */ - val = tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; + val = tc358768_ns_to_cnt(50, hsbyteclk_ps) - 1; lptxcnt = val; dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); /* 38ns < TCLK_PREPARE < 95ns */ - val = tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; + val = tc358768_ns_to_cnt(65, hsbyteclk_ps) - 1; dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ - val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), - hsbyteclk_nsk) - 2; + val2 = tc358768_ns_to_cnt(300 - tc358768_ps_to_ns(2 * ui_ps), + hsbyteclk_ps) - 2; dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk_nsk) - 5; + raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(2 * ui_ps), hsbyteclk_ps) - 5; val = clamp(raw_val, 0, 127); dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ - val = 50 + tc358768_to_ns(4 * ui_nsk); - val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; + val = 50 + tc358768_ps_to_ns(4 * ui_ps); + val = tc358768_ns_to_cnt(val, hsbyteclk_ps) - 1; dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ - raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbyteclk_nsk) - 10; + raw_val = tc358768_ns_to_cnt(145 - tc358768_ps_to_ns(3 * ui_ps), hsbyteclk_ps) - 10; val2 = clamp(raw_val, 0, 127); dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); /* TWAKEUP > 1ms in lptxcnt steps */ - val = tc358768_ns_to_cnt(1020000, hsbyteclk_nsk); + val = tc358768_ns_to_cnt(1020000, hsbyteclk_ps); val = val / (lptxcnt + 1) - 1; dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); /* TCLK_POSTCNT > 60ns + 52*UI */ - val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), - hsbyteclk_nsk) - 3; + val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(52 * ui_ps), + hsbyteclk_ps) - 3; dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), - hsbyteclk_nsk) - 4; + raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(18 * ui_ps), + hsbyteclk_ps) - 4; val = clamp(raw_val, 0, 15); dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); @@ -804,11 +802,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ - val = tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk * 4); - val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) / 4 - 1; + val = tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps * 4); + val = tc358768_ns_to_cnt(val, hsbyteclk_ps) / 4 - 1; dev_dbg(dev, "TXTAGOCNT: %u\n", val); - val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk), - hsbyteclk_nsk) - 2; + val2 = tc358768_ns_to_cnt(tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps), + hsbyteclk_ps) - 2; dev_dbg(dev, "RXTASURECNT: %u\n", val2); val = val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val); From patchwork Wed Aug 16 11:25:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355054 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57F53C001E0 for ; Wed, 16 Aug 2023 11:26:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C7A710E35C; Wed, 16 Aug 2023 11:26:11 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B07710E354 for ; Wed, 16 Aug 2023 11:25:58 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 2F570D92; Wed, 16 Aug 2023 13:24:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185084; bh=V/DMo8p5jJ8+UtiQ3KTL91bfgqjlzonLkdA5+0U3ogc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ERltfdu2eBnpmL/LBoit72Hru9VBNcX47Lo1zx1ccPyZft0YP2LkbhIZoxpkIGHGL 52JVyDtKk44gkv4B5lUjvFx+/XAqKVzc3mV1CGvgrflZoEvjsal7ZuWilrYnbSFuk/ mOnEUvjXYdp6U+I4DZPS+KJLH4TuLmLtd1sf7aIw= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:13 +0300 Subject: [PATCH v2 10/12] drm/bridge: tc358768: Fix tc358768_ns_to_cnt() MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-10-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=900; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=V/DMo8p5jJ8+UtiQ3KTL91bfgqjlzonLkdA5+0U3ogc=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI3zCHuO6AmxVhkUJGJFXofoGAsxytMXWp9P arfgWl12GmJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNwAKCRD6PaqMvJYe 9VYjD/4sMcfAdNbGdhnKHr0OSe9t2N96tQd5xl7nJ0/QhduZXNKyXr9fYrJnhA9+JuR/jeD5TGq TLYSxH1CURmXkIDIGDhrNALFcyei8Ypd6rWd9Mty80vwbH/L7Bny3JwHa3mjv0yJN1EI0Sel3hC lGD2h2VBQeKo2NaKIHChPAbzNcIyomW+SYkm4jn+k/tlGj84dyDXyy1TcuhVPsjAs2pGm1bGzvv xrYyBeIl5z2QC2H+q9lDhmSCvWJauztkfhWJlka6N3mSD+DtxAcNfX62oSv8iB0TUWw7l2dlSwG 0PiWHGzm8UklqQbo15R4VAxAm6uSod8lFxjgrGH6rp3Ws483IbIkr2jz0jujvL3TCm+kK4ru+Fn Hff2AmoObx6kKWqs1uyHlALGi/YOB63BnNMRI+askPFSVwIY9U2HmE+rZWbMvedT54SY23o8ZS6 Wup76E1AWdcRi6C1eQ4V2cR8inFSYdtAL8l8KRhzwcg4l6t2X6LSRIN8/K3xriSEq56WQOJyvfI aJN3xZ1qFstbMahyQ4syXdWVvz+y52MX0OyEGvaURaJ+I4fe8DSYf4v3ZFU9WSZvON0o+hjEImB UPjJB2Ffno+wV2zggrgnXSau4ymuaMHVkR9PwEoFMg/DLQb0F91qDUfe8AF1DVadu7GGaPeQW7M oMVpAHeEAeqpyuQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The tc358768_ns_to_cnt() is, most likely, supposed to do a div-round-up operation, but it misses subtracting one from the dividend. Fix this by just using DIV_ROUND_UP(). Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 9411b0fb471e..dc2241c18dde 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -630,7 +630,7 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps) { - return (ns * 1000 + period_ps) / period_ps; + return DIV_ROUND_UP(ns * 1000, period_ps); } static u32 tc358768_ps_to_ns(u32 ps) From patchwork Wed Aug 16 11:25:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E24D4C04A94 for ; Wed, 16 Aug 2023 11:26:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 57FA110E35B; Wed, 16 Aug 2023 11:26:05 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 244D210E359 for ; Wed, 16 Aug 2023 11:25:59 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 4F6E28610; Wed, 16 Aug 2023 13:24:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185085; bh=mzuNNrlR1ZEml0Ert0BP5I69sb5mNHms4gIhBN+F6LM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=pWdHSAkhOGjZbGsoA05DL+QpwetHGveQ/urdVmLrGeG/UGbFf5NJYQK4EC5WuBZC8 EAIcz1z0cGed2DApNnuCZIOAMy6+qMGsbsxfuv64IA+81EbRTLAnysIwYP/kAnb/LQ hRFibGT8B5m/sBwd63euJvL9A20JoNQWLx6LoCK4= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:14 +0300 Subject: [PATCH v2 11/12] drm/bridge: tc358768: Attempt to fix DSI horizontal timings MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-11-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=11714; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=mzuNNrlR1ZEml0Ert0BP5I69sb5mNHms4gIhBN+F6LM=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI3Uidt1E4yEDF+aclzj4oCB+msIZNn9l4Ng Tx0Nv+fYeaJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNwAKCRD6PaqMvJYe 9WfrEACtOllk1tRNUw2ZkjdZztZCfkF46yJLT7JMqI8uQzztjG4ub87cDZZXF1naHdPv5mCXpJ6 rzwJworMrPJl7N/ohHdYsi4Y98IywpTvySul8InDq34HSAIZTYZreNddMJTHlcjlBYi1Ln8p+gS AVZrN44V1O3AuKRVe4G1ePH7GqI39Yqriq0Uehu7+kNKLKvXDelY4o3voTJ+P3+BiMzaH2J+3Z+ 2QYx2KCeWxL6p01fTmk/VXD6rn34gGvue/alCfmkWQSLUZst1HykZusbtp0IMyyRwxKylZB6rSW mWkSb5HBy08YskcV3urJA5tyFxoOESmxcGmX4TRu5UPKZ63otfZikvtjIJySB0BlQfhklAeNKId xgHcr++x8ZvGLlTZR3kd7b6ESi4RCox8Gb9GMFtdmqYO06JI0/U/7wWrJ4lDs5JN/CeqDaA5gue hEX8bbIFqp9PfX/C9Cggt/isTlByy6Ka8jSswLcxN/ACayudP8WIeBGPzAXCunh3Blr8TLrkTsN yoTwujF9ZkNAhsxDwCEWE0oy2N8yfsdAgqqu650Dr7sVzH6Osv15VaXyB5PxtBOo5WBptrjUzf6 +YNMfhVObFDIBmtMJNe9b8r6/LgvZdl5eXKl/HnZX5XrAt01riaxcK6mu9PeCa2hL07qqavwAlm EzuyXPV1G8tPTuA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The DSI horizontal timing calculations done by the driver seem to often lead to underflows or overflows, depending on the videomode. There are two main things the current driver doesn't seem to get right: DSI HSW and HFP, and VSDly. However, even following Toshiba's documentation it seems we don't always get a working display. This patch attempts to fix the horizontal timings for DSI event mode, and on a system with a DSI->HDMI encoder, a lot of standard HDMI modes now seem to work. The work relies on Toshiba's documentation, but also quite a bit on empirical testing. This also adds timing related debug prints to make it easier to improve on this later. The DSI pulse mode has only been tested with a fixed-resolution panel, which limits the testing of different modes on DSI pulse mode. However, as the VSDly calculation also affects pulse mode, so this might cause a regression. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 211 +++++++++++++++++++++++++++++++++----- 1 file changed, 183 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index dc2241c18dde..ea19de5509ed 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -157,6 +158,7 @@ struct tc358768_priv { u32 frs; /* PLL Freqency range for HSCK (post divider) */ u32 dsiclk; /* pll_clk / 2 */ + u32 pclk; /* incoming pclk rate */ }; static inline struct tc358768_priv *dsi_host_to_tc358768(struct mipi_dsi_host @@ -380,6 +382,7 @@ static int tc358768_calc_pll(struct tc358768_priv *priv, priv->prd = best_prd; priv->frs = frs; priv->dsiclk = best_pll / 2; + priv->pclk = mode->clock * 1000; return 0; } @@ -638,6 +641,28 @@ static u32 tc358768_ps_to_ns(u32 ps) return ps / 1000; } +static u32 tc358768_dpi_to_ns(u32 val, u32 pclk) +{ + return (u32)div_u64((u64)val * NANO, pclk); +} + +/* Convert value in DPI pixel clock units to DSI byte count */ +static u32 tc358768_dpi_to_dsi_bytes(struct tc358768_priv *priv, u32 val) +{ + u64 m = (u64)val * priv->dsiclk / 4 * priv->dsi_lanes; + u64 n = priv->pclk; + + return (u32)div_u64(m + n - 1, n); +} + +static u32 tc358768_dsi_bytes_to_ns(struct tc358768_priv *priv, u32 val) +{ + u64 m = (u64)val * NANO; + u64 n = priv->dsiclk / 4 * priv->dsi_lanes; + + return (u32)div_u64(m, n); +} + static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) { struct tc358768_priv *priv = bridge_to_tc358768(bridge); @@ -647,11 +672,19 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) s32 raw_val; const struct drm_display_mode *mode; u32 hsbyteclk_ps, dsiclk_ps, ui_ps; - u32 dsiclk, hsbyteclk, video_start; - const u32 internal_delay = 40; + u32 dsiclk, hsbyteclk; int ret, i; struct videomode vm; struct device *dev = priv->dev; + /* In pixelclock units */ + u32 dpi_htot, dpi_data_start; + /* In byte units */ + u32 dsi_dpi_htot, dsi_dpi_data_start; + u32 dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp; + const u32 dsi_hss = 4; /* HSS is a short packet (4 bytes) */ + /* In hsbyteclk units */ + u32 dsi_vsdly; + const u32 internal_dly = 40; if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { dev_warn_once(dev, "Non-continuous mode unimplemented, falling back to continuous\n"); @@ -686,27 +719,23 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) case MIPI_DSI_FMT_RGB888: val |= (0x3 << 4); hact = vm.hactive * 3; - video_start = (vm.hsync_len + vm.hback_porch) * 3; data_type = MIPI_DSI_PACKED_PIXEL_STREAM_24; break; case MIPI_DSI_FMT_RGB666: val |= (0x4 << 4); hact = vm.hactive * 3; - video_start = (vm.hsync_len + vm.hback_porch) * 3; data_type = MIPI_DSI_PACKED_PIXEL_STREAM_18; break; case MIPI_DSI_FMT_RGB666_PACKED: val |= (0x4 << 4) | BIT(3); hact = vm.hactive * 18 / 8; - video_start = (vm.hsync_len + vm.hback_porch) * 18 / 8; data_type = MIPI_DSI_PIXEL_STREAM_3BYTE_18; break; case MIPI_DSI_FMT_RGB565: val |= (0x5 << 4); hact = vm.hactive * 2; - video_start = (vm.hsync_len + vm.hback_porch) * 2; data_type = MIPI_DSI_PACKED_PIXEL_STREAM_16; break; default: @@ -716,9 +745,150 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) return; } + /* + * There are three important things to make TC358768 work correctly, + * which are not trivial to manage: + * + * 1. Keep the DPI line-time and the DSI line-time as close to each + * other as possible. + * 2. TC358768 goes to LP mode after each line's active area. The DSI + * HFP period has to be long enough for entering and exiting LP mode. + * But it is not clear how to calculate this. + * 3. VSDly (video start delay) has to be long enough to ensure that the + * DSI TX does not start transmitting util we have started receiving + * pixel data from the DPI input. It is not clear how to calculate + * this either. + */ + + dpi_htot = vm.hactive + vm.hfront_porch + vm.hsync_len + vm.hback_porch; + dpi_data_start = vm.hsync_len + vm.hback_porch; + + dev_dbg(dev, "dpi horiz timing (pclk): %u + %u + %u + %u = %u\n", + vm.hsync_len, vm.hback_porch, vm.hactive, vm.hfront_porch, + dpi_htot); + + dev_dbg(dev, "dpi horiz timing (ns): %u + %u + %u + %u = %u\n", + tc358768_dpi_to_ns(vm.hsync_len, vm.pixelclock), + tc358768_dpi_to_ns(vm.hback_porch, vm.pixelclock), + tc358768_dpi_to_ns(vm.hactive, vm.pixelclock), + tc358768_dpi_to_ns(vm.hfront_porch, vm.pixelclock), + tc358768_dpi_to_ns(dpi_htot, vm.pixelclock)); + + dev_dbg(dev, "dpi data start (ns): %u + %u = %u\n", + tc358768_dpi_to_ns(vm.hsync_len, vm.pixelclock), + tc358768_dpi_to_ns(vm.hback_porch, vm.pixelclock), + tc358768_dpi_to_ns(dpi_data_start, vm.pixelclock)); + + dsi_dpi_htot = tc358768_dpi_to_dsi_bytes(priv, dpi_htot); + dsi_dpi_data_start = tc358768_dpi_to_dsi_bytes(priv, dpi_data_start); + + if (dsi_dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { + dsi_hsw = tc358768_dpi_to_dsi_bytes(priv, vm.hsync_len); + dsi_hbp = tc358768_dpi_to_dsi_bytes(priv, vm.hback_porch); + } else { + /* HBP is included in HSW in event mode */ + dsi_hbp = 0; + dsi_hsw = tc358768_dpi_to_dsi_bytes(priv, + vm.hsync_len + vm.hback_porch); + + /* + * The pixel packet includes the actual pixel data, and: + * DSI packet header = 4 bytes + * DCS code = 1 byte + * DSI packet footer = 2 bytes + */ + dsi_hact = hact + 4 + 1 + 2; + + dsi_hfp = dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss; + + /* + * Here we should check if HFP is long enough for entering LP + * and exiting LP, but it's not clear how to calculate that. + * Instead, this is a naive algorithm that just adjusts the HFP + * and HSW so that HFP is (at least) roughly 2/3 of the total + * blanking time. + */ + if (dsi_hfp < (dsi_hfp + dsi_hsw + dsi_hss) * 2 / 3) { + u32 old_hfp = dsi_hfp; + u32 old_hsw = dsi_hsw; + u32 tot = dsi_hfp + dsi_hsw + dsi_hss; + + dsi_hsw = tot / 3; + + /* + * Seems like sometimes HSW has to be divisible by num-lanes, but + * not always... + */ + dsi_hsw = roundup(dsi_hsw, priv->dsi_lanes); + + dsi_hfp = dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss; + + dev_dbg(dev, + "hfp too short, adjusting dsi hfp and dsi hsw from %u, %u to %u, %u\n", + old_hfp, old_hsw, dsi_hfp, dsi_hsw); + } + + dev_dbg(dev, + "dsi horiz timing (bytes): %u, %u + %u + %u + %u = %u\n", + dsi_hss, dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp, + dsi_hss + dsi_hsw + dsi_hbp + dsi_hact + dsi_hfp); + + dev_dbg(dev, "dsi horiz timing (ns): %u + %u + %u + %u + %u = %u\n", + tc358768_dsi_bytes_to_ns(priv, dsi_hss), + tc358768_dsi_bytes_to_ns(priv, dsi_hsw), + tc358768_dsi_bytes_to_ns(priv, dsi_hbp), + tc358768_dsi_bytes_to_ns(priv, dsi_hact), + tc358768_dsi_bytes_to_ns(priv, dsi_hfp), + tc358768_dsi_bytes_to_ns(priv, dsi_hss + dsi_hsw + dsi_hbp + dsi_hact + dsi_hfp)); + } + + /* VSDly calculation */ + + /* Start with the HW internal delay */ + dsi_vsdly = internal_dly; + + /* Convert to byte units as the other variables are in byte units */ + dsi_vsdly *= priv->dsi_lanes; + + /* Do we need more delay, in addition to the internal? */ + if (dsi_dpi_data_start > dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp) { + dsi_vsdly = dsi_dpi_data_start - dsi_hss - dsi_hsw - dsi_hbp; + dsi_vsdly = roundup(dsi_vsdly, priv->dsi_lanes); + } + + dev_dbg(dev, "dsi data start (bytes) %u + %u + %u + %u = %u\n", + dsi_vsdly, dsi_hss, dsi_hsw, dsi_hbp, + dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp); + + dev_dbg(dev, "dsi data start (ns) %u + %u + %u + %u = %u\n", + tc358768_dsi_bytes_to_ns(priv, dsi_vsdly), + tc358768_dsi_bytes_to_ns(priv, dsi_hss), + tc358768_dsi_bytes_to_ns(priv, dsi_hsw), + tc358768_dsi_bytes_to_ns(priv, dsi_hbp), + tc358768_dsi_bytes_to_ns(priv, dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp)); + + /* Convert back to hsbyteclk */ + dsi_vsdly /= priv->dsi_lanes; + + /* + * The docs say that there is an internal delay of 40 cycles. + * However, we get underflows if we follow that rule. If we + * instead ignore the internal delay, things work. So either + * the docs are wrong or the calculations are wrong. + * + * As a temporary fix, add the internal delay here, to counter + * the subtraction when writing the register. + */ + dsi_vsdly += internal_dly; + + /* Clamp to the register max */ + if (dsi_vsdly - internal_dly > 0x3ff) { + dev_warn(dev, "VSDly too high, underflows likely\n"); + dsi_vsdly = 0x3ff + internal_dly; + } + /* VSDly[9:0] */ - video_start = max(video_start, internal_delay + 1) - internal_delay; - tc358768_write(priv, TC358768_VSDLY, video_start); + tc358768_write(priv, TC358768_VSDLY, dsi_vsdly - internal_dly); tc358768_write(priv, TC358768_DATAFMT, val); tc358768_write(priv, TC358768_DSITX_DT, data_type); @@ -826,18 +996,6 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* vbp */ tc358768_write(priv, TC358768_DSI_VBPR, vm.vback_porch); - - /* hsw * byteclk * ndl / pclk */ - val = (u32)div_u64(vm.hsync_len * - (u64)hsbyteclk * priv->dsi_lanes, - vm.pixelclock); - tc358768_write(priv, TC358768_DSI_HSW, val); - - /* hbp * byteclk * ndl / pclk */ - val = (u32)div_u64(vm.hback_porch * - (u64)hsbyteclk * priv->dsi_lanes, - vm.pixelclock); - tc358768_write(priv, TC358768_DSI_HBPR, val); } else { /* Set event mode */ tc358768_write(priv, TC358768_DSI_EVENT, 1); @@ -851,16 +1009,13 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) /* vbp (not used in event mode) */ tc358768_write(priv, TC358768_DSI_VBPR, 0); + } - /* (hsw + hbp) * byteclk * ndl / pclk */ - val = (u32)div_u64((vm.hsync_len + vm.hback_porch) * - (u64)hsbyteclk * priv->dsi_lanes, - vm.pixelclock); - tc358768_write(priv, TC358768_DSI_HSW, val); + /* hsw (bytes) */ + tc358768_write(priv, TC358768_DSI_HSW, dsi_hsw); - /* hbp (not used in event mode) */ - tc358768_write(priv, TC358768_DSI_HBPR, 0); - } + /* hbp (bytes) */ + tc358768_write(priv, TC358768_DSI_HBPR, dsi_hbp); /* hact (bytes) */ tc358768_write(priv, TC358768_DSI_HACT, hact); From patchwork Wed Aug 16 11:25:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 13355055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9E610C04E69 for ; Wed, 16 Aug 2023 11:26:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 711D110E35D; Wed, 16 Aug 2023 11:26:11 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 45CDF10E357 for ; Wed, 16 Aug 2023 11:26:00 +0000 (UTC) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 6DA1DF02; Wed, 16 Aug 2023 13:24:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1692185086; bh=lJbs+u3Qj3Q0zC4Wo5t/O8IezT1rm6E1W3iejTWvFus=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Ze7KdHL3OAdq7ax0zkkKIHQ/HlllSOfnky93i4Xp34qVfrUJC9p2Ax0U6ZbStay4M eh7D0WjAH8J+MowPxRlG9va8kjuiueCx6rQXOdIbuL6ymOiNaD2nJ/8dfz6uO09Hak 2ezuRdzgSd9HGLK22D2500LcsCCAW5CdBVItDP4A= From: Tomi Valkeinen Date: Wed, 16 Aug 2023 14:25:15 +0300 Subject: [PATCH v2 12/12] drm/bridge: tc358768: Default to positive h/v syncs MIME-Version: 1.0 Message-Id: <20230816-tc358768-v2-12-242b9d5f703a@ideasonboard.com> References: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> In-Reply-To: <20230816-tc358768-v2-0-242b9d5f703a@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1587; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=lJbs+u3Qj3Q0zC4Wo5t/O8IezT1rm6E1W3iejTWvFus=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk3LI3X79NX4TNGdgFOlXsh77AMKmBQn51e/e1l 8Djg/M+A/WJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZNyyNwAKCRD6PaqMvJYe 9SKlD/9WJ72o8W4x/nTq2DdYvThqd3Yi0xdA6Fs2VtWFglzyIy80utupxMrnHJ8188TWLM+IRUg k3vjjUENpUD+mMUB2qTJoOyLPf/cwZdOlkq1You1A7MGGsVXHfU4BUKNDnWDFB1lE4kESuHSPMy qC1p1N4nMgJCJqkcNq1HGHrG67u+bfQgWb7OMBnLOcb+8x88doP8RAi8outnRQ5DtAwpPZ2MnFR PQSJ23GC8/E6afT9QrwMuAxsCXb5OcgndOs+zzNdPV4dje1Y2kRC3xayoVfj7Xk50vnlVCDfgvA +/jA2L24ZIL5iCSCo8yr028Ck7rjGYX588IHLMUxiBulQ3fx1VAHWEH67w/EcjbAyA2mvwynfeP Jm5vfbkM02c20/0NqX/rhVyCImb+rRI5N42rtY3CbGvjVLliYZer8Uw4FHzJbtgEJf/LWnaIoMd ag/AIBwotOKEk7/VdszmuH8BEUe+CJJ72/ruorEm0FbflxD1nifUPjXMWCH2VaxZI9pBdbL+ddE 0d6j4EoL7w66cFHRyKA77UhkPQ37kp40bQsY3nz5CaMU++M1a6t/3TlMI6bVcVWLEh7M+aj0kC5 ydRbg5BTgT/LLNCLcraNeHvs32awVRT+qFEEBYWcS7Kv8k8HFWD0cXqVQjRvBZuTIlRthlXY2jq gFkxiqI8+XhlJ/A== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Aradhya Bhatia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" As the TC358768 is a DPI to DSI bridge, the DSI side does not need to define h/v sync polarities. This means that sometimes we have a mode without defined sync polarities, which does not work on the DPI side. Add a mode_fixup hook to default to positive sync polarities. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index ea19de5509ed..b465e0a31d09 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -1124,9 +1124,27 @@ tc358768_atomic_get_input_bus_fmts(struct drm_bridge *bridge, return input_fmts; } +static bool tc358768_mode_fixup(struct drm_bridge *bridge, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + /* Default to positive sync */ + + if (!(adjusted_mode->flags & + (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC))) + adjusted_mode->flags |= DRM_MODE_FLAG_PHSYNC; + + if (!(adjusted_mode->flags & + (DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC))) + adjusted_mode->flags |= DRM_MODE_FLAG_PVSYNC; + + return true; +} + static const struct drm_bridge_funcs tc358768_bridge_funcs = { .attach = tc358768_bridge_attach, .mode_valid = tc358768_bridge_mode_valid, + .mode_fixup = tc358768_mode_fixup, .pre_enable = tc358768_bridge_pre_enable, .enable = tc358768_bridge_enable, .disable = tc358768_bridge_disable,