From patchwork Wed Aug 16 19:35:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13355581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 060A4C25B4F for ; Wed, 16 Aug 2023 19:36:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=KSJBrLPGuMpwzLgMv9l7SY9jDM4Ceoog6Nf5ooJB+s4=; b=ivKFX1OYHKzSN2 tE6J9fTsXjBekfPlnzmp5DDQI/60dkJXsux9jNr2htktccnLIGh5mJmy6EduIEUh8z23o3q6LE7Lt xCa/zCyx/oMObhaUXOI8eHnBkyoN5fXhCAHpEQsescWhl9ykGZJTEg3BLnWbqAmlOsOJeKebk01Bp rUvBcO4kjR7TDZpcntQY1e8HMNyrV5D6uLm4SLe7XzcpH7Gjo97+E9x8Ah+bFkAlxC+WBJhpa36kE kskksPshLGrA5j/6CrkXolXH54TjOW71+y4VgmTf5wxtyXAvH1G0GB5g+LhKIUIf6XtIAdT3pHWk3 kjjNnTwip4lQWO6DeY4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qWMJ0-004tWG-34; Wed, 16 Aug 2023 19:35:46 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qWMIy-004tVs-1L for linux-arm-kernel@lists.infradead.org; Wed, 16 Aug 2023 19:35:46 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37GJZZaF066780; Wed, 16 Aug 2023 14:35:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1692214535; bh=5zI4vCVLeo3iyZwinwH6jUeYayvH56D3YVbeqqg8/IU=; h=From:To:CC:Subject:Date; b=v6DrgbPsH9JO2pWG4gMRoUCFdNAK2NHaEhmMTcg+eEvoti6m99t5PLQYWD60+ehP6 oCzFpoAaJOOgUF6SgDIy9mkk84/u8btJ/M8fZG6VnLTuCygaURjQ8DWRXf1t2C29DY 0mXC0dJXnv00ni2Tx/3u1jmDVPc9UFqSs9qtIFf4= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37GJZZCb042556 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 16 Aug 2023 14:35:35 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 16 Aug 2023 14:35:35 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 16 Aug 2023 14:35:34 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37GJZXgD087479; Wed, 16 Aug 2023 14:35:34 -0500 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH] arm64: dts: ti: k3-j784s4-evm: Add support for MCAN interfaces Date: Thu, 17 Aug 2023 01:05:33 +0530 Message-ID: <20230816193533.25722-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230816_123544_645076_B391E378 X-CRM114-Status: GOOD ( 10.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There are 2 MCAN instances in the mcu domain and 4 MCAN instances in the main domain. Add support for both MCAN nodes present in the mcu domain and MCAN16 that is present in the main domain and isn't muxed. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 87 ++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 430b8a2c5df5..2ac4a17050a9 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -249,6 +249,31 @@ vdd_sd_dv: regulator-TLV71033 { states = <1800000 0x0>, <3300000 0x1>; }; + + transceiver1: can-phy0 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; + standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_HIGH>; + }; + + transceiver2: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_gpio_pins_default>; + standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>; + }; + + transceiver3: can-phy2 { + /* standby pin has been grounded by default */ + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; }; &main_pmx0 { @@ -286,6 +311,13 @@ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */ >; }; + + main_mcan16_pins_default: main-mcan16-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x028, PIN_INPUT, 0) /* (AE33) MCAN16_RX */ + J784S4_IOPAD(0x024, PIN_OUTPUT, 0) /* (AH34) MCAN16_TX */ + >; + }; }; &wkup_pmx2 { @@ -363,6 +395,32 @@ J784S4_WKUP_IOPAD(0x16c, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */ J784S4_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */ >; }; + + mcu_mcan0_pins_default: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */ + J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan1_pins_default: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */ + J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */ + >; + }; + + mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (J38) MCU_SPI0_D1.WKUP_GPIO0_69 */ + >; + }; + + mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */ + >; + }; }; &wkup_pmx0 { @@ -827,3 +885,32 @@ adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; + +&wkup_gpio_intr { + status = "okay"; +}; + +&wkup_gpio0 { + status = "okay"; +}; + +mcu_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan0_pins_default>; + phys = <&transceiver1>; +}; + +&mcu_mcan1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_mcan1_pins_default>; + phys = <&transceiver2>; +}; + +&main_mcan16 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan16_pins_default>; + phys = <&transceiver3>; +};