From patchwork Thu Aug 24 08:30:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 13363761 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E36EC27C40 for ; Thu, 24 Aug 2023 08:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229871AbjHXIah (ORCPT ); Thu, 24 Aug 2023 04:30:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240525AbjHXIaT (ORCPT ); Thu, 24 Aug 2023 04:30:19 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BF3D01725 for ; Thu, 24 Aug 2023 01:30:14 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.01,195,1684767600"; d="scan'208";a="177521975" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 24 Aug 2023 17:30:14 +0900 Received: from localhost.localdomain (unknown [10.226.93.115]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id B5364419C4D4; Thu, 24 Aug 2023 17:30:09 +0900 (JST) From: Biju Das To: Catalin Marinas , Will Deacon Cc: Biju Das , Bjorn Andersson , Arnd Bergmann , Geert Uytterhoeven , Krzysztof Kozlowski , Konrad Dybcio , Neil Armstrong , =?utf-8?b?TsOtY29sYXMgRi4gUi4g?= =?utf-8?b?QS4gUHJhZG8=?= , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Peng Fan , linux-arm-kernel@lists.infradead.org, Prabhakar Mahadev Lad , linux-renesas-soc@vger.kernel.org Subject: [PATCH] arm64: defconfig: Enable Renesas versa3 clock generator config Date: Thu, 24 Aug 2023 09:30:06 +0100 Message-Id: <20230824083006.88944-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Enable config for Renesas versa3 clock generator as it is populated on RZ/{G2L, G2LC} and RZ/V2L SMARC EVKs. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index bf13d5c46578..a7c27334dea0 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1171,6 +1171,7 @@ CONFIG_COMMON_CLK_FSL_SAI=y CONFIG_COMMON_CLK_S2MPS11=y CONFIG_COMMON_CLK_PWM=y CONFIG_COMMON_CLK_RS9_PCIE=y +CONFIG_COMMON_CLK_VC3=y CONFIG_COMMON_CLK_VC5=y CONFIG_COMMON_CLK_NPCM8XX=y CONFIG_COMMON_CLK_BD718XX=m