From patchwork Thu Aug 24 20:50:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Dekel X-Patchwork-Id: 13364703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9364C3DA6F for ; Thu, 24 Aug 2023 20:54:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 24A2110E5BA; Thu, 24 Aug 2023 20:54:00 +0000 (UTC) Received: from mail-qv1-xf2e.google.com (mail-qv1-xf2e.google.com [IPv6:2607:f8b0:4864:20::f2e]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5B9C710E5B9 for ; Thu, 24 Aug 2023 20:53:58 +0000 (UTC) Received: by mail-qv1-xf2e.google.com with SMTP id 6a1803df08f44-64b3504144cso1569676d6.2 for ; Thu, 24 Aug 2023 13:53:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1692910437; x=1693515237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lbYHPtht31pDWnNKizt7dLhO8dz2qVeAy2pQOUOnpoY=; b=NHHKIv0g2gNu0NZm2jVFFZke17sz2Hi1xeg0ElQGA/Jm6r+zD3WQaAJk7nDN0LS+y8 vLO4VUfRw7aLTyfm43lAv7m5OoHobehqmperJyog7ZK7zWX5qmin4uRax2Kir1bYDGTz iYDvcHh804LqL0Hd1sVrwAPOo4QR9a/eHyv+o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692910437; x=1693515237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lbYHPtht31pDWnNKizt7dLhO8dz2qVeAy2pQOUOnpoY=; b=MlVVKsnyor0YPvLRP1+eTB4ERrNpZjyvb5PuPFttVqquwJKyEydM3Ie3mO9p5X04VA 4wmBLo4WvYOqVEfwAJy05Qs1TjTgqjGV+as2d++w5pUzJDMOIbSLw7WySoLP+R3srSiM 0oaTfJ2rlPIOOtSkBqZCA29zVWvWD6uAIh9QebmwoeNtOLj7Y/uxDZh4JhEbEWp0IYZB uaAooF9XEhtvbPB9RJDjBTtW8OETQjrlA2ZpSI9KY7dNW7w7CR0cOCy0Zdd+qhrhk2jN 6r7BN13Dqtcy51N31nlP/MMhQzB/0zwvu7M7Iazx/VjWif0p/Tf7Il42N2SKfg8zoxi2 Uj0A== X-Gm-Message-State: AOJu0YxJo+/GDY8kfmfgx+LGYoZMWSrSbLUDFoE5yTo7ZgztiPbI95L/ RcBUKuHjUp3Wb+UMyFeKU7DLmdDg5FjkjbRFEgM= X-Google-Smtp-Source: AGHT+IFiVJOd4KML3x4eVNMPjMGguJR4j6N11CQy6AOXEp4AEnkN6mUalwaiteIIJ5VznutRDCHIZQ== X-Received: by 2002:a0c:aa42:0:b0:647:290f:b9a with SMTP id e2-20020a0caa42000000b00647290f0b9amr14245061qvb.62.1692910436958; Thu, 24 Aug 2023 13:53:56 -0700 (PDT) Received: from gildekel.nyc.corp.google.com ([2620:0:1003:314:321d:e6f5:6dbd:3e5]) by smtp.gmail.com with ESMTPSA id d2-20020a0ce442000000b0064f5020df91sm62038qvm.28.2023.08.24.13.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 13:53:56 -0700 (PDT) From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Aug 2023 16:50:16 -0400 Message-ID: <20230824205335.500163-2-gildekel@chromium.org> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog In-Reply-To: <20230824205335.500163-1-gildekel@chromium.org> References: <20230824205335.500163-1-gildekel@chromium.org> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 1/6] drm/i915/dp_link_training: Add a final failing state to link training fallback X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org, Gil Dekel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Instead of silently giving up when all link-training fallback values are exhausted, this patch modifies the fallback's failure branch to reduces both max_link_lane_count and max_link_rate to zero (0) and continues to emit uevents until userspace stops attempting to modeset. By doing so, we ensure the failing connector, which is in link-status=Bad, has all its modes pruned (due to effectively having a bandwidth of 0Gbps). It is then the userspace's responsibility to ignore connectors with no modes, even if they are marked as connected. Signed-off-by: Gil Dekel --- drivers/gpu/drm/i915/display/intel_dp.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7067ee3a4bd3..2152ddbab557 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -276,8 +276,12 @@ static int intel_dp_common_len_rate_limit(const struct intel_dp *intel_dp, static int intel_dp_common_rate(struct intel_dp *intel_dp, int index) { + /* This occurs when max link rate drops to 0 via link training fallback*/ + if (index < 0) + return 0; + if (drm_WARN_ON(&dp_to_i915(intel_dp)->drm, - index < 0 || index >= intel_dp->num_common_rates)) + index >= intel_dp->num_common_rates)) return 162000; return intel_dp->common_rates[index]; @@ -318,6 +322,9 @@ static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp) int intel_dp_max_lane_count(struct intel_dp *intel_dp) { switch (intel_dp->max_link_lane_count) { + /* This occurs when max link lane count drops to 0 via link training fallback*/ + case 0: + return 0; case 1: case 2: case 4: @@ -672,7 +679,14 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, intel_dp->max_link_lane_count = lane_count >> 1; } else { drm_err(&i915->drm, "Link Training Unsuccessful\n"); - return -1; + /* + * Ensure all of the connector's modes are pruned in the next + * probe by effectively reducing its bandwidth to 0 so userspace + * can ignore it within the next modeset attempt. + */ + intel_dp->max_link_rate = 0; + intel_dp->max_link_lane_count = 0; + return 0; } return 0; From patchwork Thu Aug 24 20:50:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Dekel X-Patchwork-Id: 13364704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0431C3DA6F for ; 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Thu, 24 Aug 2023 13:54:00 -0700 (PDT) Received: from gildekel.nyc.corp.google.com ([2620:0:1003:314:321d:e6f5:6dbd:3e5]) by smtp.gmail.com with ESMTPSA id d2-20020a0ce442000000b0064f5020df91sm62038qvm.28.2023.08.24.13.53.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 13:53:59 -0700 (PDT) From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Aug 2023 16:50:17 -0400 Message-ID: <20230824205335.500163-3-gildekel@chromium.org> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog In-Reply-To: <20230824205335.500163-1-gildekel@chromium.org> References: <20230824205335.500163-1-gildekel@chromium.org> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 2/6] drm/i915/dp_link_training: Add a final failing state to link training fallback for MST X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org, Gil Dekel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently, MST link training has no fallback. This means that if an MST base connector fails to link-train once, the training completely fails, which makes this case significantly more common than a complete SST link training failure. Similar to the final failure state of SST, this patch zeros out both max_link_rate and max_link_lane_count. In addition, it stops resetting MST params so the zeroing of the HBR fields stick. This ensures that the MST base connector's modes will be completely pruned, since it is effectively left with 0Gbps bandwidth. Signed-off-by: Gil Dekel --- drivers/gpu/drm/i915/display/intel_dp.c | 27 ++++++++++--------- drivers/gpu/drm/i915/display/intel_dp.h | 2 +- .../drm/i915/display/intel_dp_link_training.c | 8 +++--- 3 files changed, 20 insertions(+), 17 deletions(-) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2152ddbab557..01b180c8d9bd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -630,7 +630,7 @@ static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp, return true; } -int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, +void intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, int link_rate, u8 lane_count) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -638,18 +638,23 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, /* * TODO: Enable fallback on MST links once MST link compute can handle - * the fallback params. + * the fallback params. For now, similar to the SST case, ensure all of + * the base connector's modes are pruned in the next connector probe by + * effectively reducing its bandwidth to 0 so userspace can ignore it + * within the next modeset attempt. */ if (intel_dp->is_mst) { drm_err(&i915->drm, "Link Training Unsuccessful\n"); - return -1; + intel_dp->max_link_rate = 0; + intel_dp->max_link_lane_count = 0; + return; } if (intel_dp_is_edp(intel_dp) && !intel_dp->use_max_params) { drm_dbg_kms(&i915->drm, "Retrying Link training for eDP with max parameters\n"); intel_dp->use_max_params = true; - return 0; + return; } index = intel_dp_rate_index(intel_dp->common_rates, @@ -662,7 +667,7 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, lane_count)) { drm_dbg_kms(&i915->drm, "Retrying Link training for eDP with same parameters\n"); - return 0; + return; } intel_dp->max_link_rate = intel_dp_common_rate(intel_dp, index - 1); intel_dp->max_link_lane_count = lane_count; @@ -673,7 +678,7 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, lane_count >> 1)) { drm_dbg_kms(&i915->drm, "Retrying Link training for eDP with same parameters\n"); - return 0; + return; } intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); intel_dp->max_link_lane_count = lane_count >> 1; @@ -686,10 +691,7 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, */ intel_dp->max_link_rate = 0; intel_dp->max_link_lane_count = 0; - return 0; } - - return 0; } u32 intel_dp_mode_to_fec_clock(u32 mode_clock) @@ -5310,10 +5312,11 @@ intel_dp_detect(struct drm_connector *connector, intel_dp_configure_mst(intel_dp); /* - * TODO: Reset link params when switching to MST mode, until MST - * supports link training fallback params. + * Note: Even though MST link training fallback is not yet implemented, + * do not reset. This is because the base connector needs to have all + * its modes pruned when link training for the MST port fails. */ - if (intel_dp->reset_link_params || intel_dp->is_mst) { + if (intel_dp->reset_link_params) { intel_dp_reset_max_link_params(intel_dp); intel_dp->reset_link_params = false; } diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 788a577ebe16..7388510e0cb2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -40,7 +40,7 @@ bool intel_dp_init_connector(struct intel_digital_port *dig_port, struct intel_connector *intel_connector); void intel_dp_set_link_params(struct intel_dp *intel_dp, int link_rate, int lane_count); -int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, +void intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, int link_rate, u8 lane_count); int intel_dp_get_active_pipes(struct intel_dp *intel_dp, struct drm_modeset_acquire_ctx *ctx, diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 4485ef4f8ec6..31d0d7854003 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -1075,10 +1075,10 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp, lt_dbg(intel_dp, DP_PHY_DPRX, "Link Training failed with HOBL active, not enabling it from now on\n"); intel_dp->hobl_failed = true; - } else if (intel_dp_get_link_train_fallback_values(intel_dp, - crtc_state->port_clock, - crtc_state->lane_count)) { - return; + } else { + intel_dp_get_link_train_fallback_values(intel_dp, + crtc_state->port_clock, + crtc_state->lane_count); } /* Schedule a Hotplug Uevent to userspace to start modeset */ From patchwork Thu Aug 24 20:50:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Dekel X-Patchwork-Id: 13364705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32B1CC7113B for ; Thu, 24 Aug 2023 20:54:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A51010E5BD; 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Thu, 24 Aug 2023 13:54:01 -0700 (PDT) From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Aug 2023 16:50:18 -0400 Message-ID: <20230824205335.500163-4-gildekel@chromium.org> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog In-Reply-To: <20230824205335.500163-1-gildekel@chromium.org> References: <20230824205335.500163-1-gildekel@chromium.org> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 3/6] drm/dp_mst: Add drm_dp_set_mst_topology_link_status() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org, Gil Dekel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Unlike SST, MST can support multiple displays connected to a single connector. However, this also means that if the DisplayPort link to the top-level MST branch device becomes unstable, then every single branch device has an unstable link. Since there are multiple downstream ports per connector, setting the link status of the parent mstb's port to BAD is not enough. All of the downstream mstb ports must also have their link status set to BAD. This aligns to how the DP link status logic in DRM works. We notify userspace that all of the mstb ports need retraining and apply new lower bandwidth constraints to all future atomic commits on the topology that follow. Since any driver supporting MST needs to figure out which connectors live downstream on an MST topology and update their link status in order to retrain MST links properly, we add the drm_dp_set_mst_topology_link_status() helper. This helper simply marks the link status of all connectors living in that topology as bad. We will make use of this helper in i915 later in this series. Credit: this patch is a refactor of Lyude Pual's original patch: https://patchwork.kernel.org/project/dri-devel/patch/20180308232421.14049-5-lyude@redhat.com/ Signed-off-by: Gil Dekel --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 39 +++++++++++++++++++ include/drm/display/drm_dp_mst_helper.h | 3 ++ 2 files changed, 42 insertions(+) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index ed96cfcfa304..17cbadfb6ccb 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -3566,6 +3566,45 @@ int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr, } EXPORT_SYMBOL(drm_dp_get_vc_payload_bw); +/** + * drm_dp_set_mst_topology_link_status() - set all downstream MST ports' link status + * @mgr: MST topology manager to set state for + * @status: The new status to set the MST topology to + * + * Set all downstream ports' link-status within the topology to the given status. + */ +void drm_dp_set_mst_topology_link_status(struct drm_dp_mst_topology_mgr *mgr, + enum drm_link_status status) +{ + struct drm_dp_mst_port *port; + struct drm_dp_mst_branch *rmstb; + struct drm_dp_mst_branch *mstb = + drm_dp_mst_topology_get_mstb_validated(mgr, mgr->mst_primary); + + list_for_each_entry_reverse(port, &mstb->ports, next) { + struct drm_connector *connector = port->connector; + + if (connector) { + mutex_lock(&connector->dev->mode_config.mutex); + drm_dbg_kms( + connector->dev, + "[MST-CONNECTOR:%d:%s] link status %d -> %d\n", + connector->base.id, connector->name, + connector->state->link_status, status); + connector->state->link_status = status; + mutex_unlock(&connector->dev->mode_config.mutex); + } + + rmstb = drm_dp_mst_topology_get_mstb_validated(mstb->mgr, + port->mstb); + if (rmstb) { + drm_dp_set_mst_topology_link_status(rmstb->mgr, status); + drm_dp_mst_topology_put_mstb(rmstb); + } + } +} +EXPORT_SYMBOL(drm_dp_set_mst_topology_link_status); + /** * drm_dp_read_mst_cap() - check whether or not a sink supports MST * @aux: The DP AUX channel to use diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h index ed5c9660563c..855d488bf364 100644 --- a/include/drm/display/drm_dp_mst_helper.h +++ b/include/drm/display/drm_dp_mst_helper.h @@ -832,6 +832,9 @@ struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr, int link_rate, int link_lane_count); +void drm_dp_set_mst_topology_link_status(struct drm_dp_mst_topology_mgr *mgr, + enum drm_link_status status); + int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc); void drm_dp_mst_update_slots(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap); From patchwork Thu Aug 24 20:50:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Dekel X-Patchwork-Id: 13364706 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A13B9C6FA8F for ; Thu, 24 Aug 2023 20:54:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 325D310E5C1; Thu, 24 Aug 2023 20:54:09 +0000 (UTC) Received: from mail-qt1-x82d.google.com (mail-qt1-x82d.google.com [IPv6:2607:f8b0:4864:20::82d]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2ADB410E5BD for ; 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Thu, 24 Aug 2023 13:54:04 -0700 (PDT) Received: from gildekel.nyc.corp.google.com ([2620:0:1003:314:321d:e6f5:6dbd:3e5]) by smtp.gmail.com with ESMTPSA id d2-20020a0ce442000000b0064f5020df91sm62038qvm.28.2023.08.24.13.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 13:54:04 -0700 (PDT) From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Aug 2023 16:50:19 -0400 Message-ID: <20230824205335.500163-5-gildekel@chromium.org> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog In-Reply-To: <20230824205335.500163-1-gildekel@chromium.org> References: <20230824205335.500163-1-gildekel@chromium.org> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 4/6] drm/i915: Move DP modeset_retry_work into intel_dp X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org, Gil Dekel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently, link-training fallback is only implemented for SST, so having modeset_retry_work in intel_connector makes sense. However, we hope to implement link training fallback for MST in a follow-up patchset, so moving modeset_retry_work to indel_dp will make handling both SST and MST connectors simpler. This patch does exactly that, and updates all modeset_retry_work dependencies to use an intel_dp instead. Credit: this patch is a rebase of Lyude Pual's original patch: https://patchwork.freedesktop.org/patch/216627/?series=41576&rev=3 Signed-off-by: Gil Dekel --- drivers/gpu/drm/i915/display/intel_display.c | 14 +++++++++++--- drivers/gpu/drm/i915/display/intel_display_types.h | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++------- .../gpu/drm/i915/display/intel_dp_link_training.c | 3 +-- 4 files changed, 19 insertions(+), 15 deletions(-) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index db3c26e013e3..2ec75aa0b4ee 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7962,20 +7962,28 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe) void intel_hpd_poll_fini(struct drm_i915_private *i915) { - struct intel_connector *connector; struct drm_connector_list_iter conn_iter; + struct intel_connector *connector; + struct intel_dp *intel_dp; + struct intel_encoder *encoder; /* Kill all the work that may have been queued by hpd. */ drm_connector_list_iter_begin(&i915->drm, &conn_iter); for_each_intel_connector_iter(connector, &conn_iter) { - if (connector->modeset_retry_work.func) - cancel_work_sync(&connector->modeset_retry_work); if (connector->hdcp.shim) { cancel_delayed_work_sync(&connector->hdcp.check_work); cancel_work_sync(&connector->hdcp.prop_work); } } drm_connector_list_iter_end(&conn_iter); + + for_each_intel_dp(&i915->drm, encoder) { + if (encoder->type == DRM_MODE_CONNECTOR_eDP || + encoder->type == DRM_MODE_CONNECTOR_DisplayPort) { + intel_dp = enc_to_intel_dp(encoder); + cancel_work_sync(&intel_dp->modeset_retry_work); + } + } } bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 731f2ec04d5c..b92bb69a3fe4 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -620,9 +620,6 @@ struct intel_connector { struct intel_dp *mst_port; - /* Work struct to schedule a uevent on link train failure */ - struct work_struct modeset_retry_work; - struct intel_hdcp hdcp; }; @@ -1779,6 +1776,9 @@ struct intel_dp { /* Displayport compliance testing */ struct intel_dp_compliance compliance; + /* Work struct to schedule a uevent on link train failure */ + struct work_struct modeset_retry_work; + /* Downstream facing port caps */ struct { int min_tmds_clock, max_tmds_clock; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 01b180c8d9bd..42353b1ac487 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5992,12 +5992,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, static void intel_dp_modeset_retry_work_fn(struct work_struct *work) { - struct intel_connector *intel_connector; - struct drm_connector *connector; - - intel_connector = container_of(work, typeof(*intel_connector), - modeset_retry_work); - connector = &intel_connector->base; + struct intel_dp *intel_dp = + container_of(work, typeof(*intel_dp), modeset_retry_work); + struct drm_connector *connector = &intel_dp->attached_connector->base; drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s]\n", connector->base.id, connector->name); @@ -6027,7 +6024,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port, int type; /* Initialize the work for modeset in case of link train failure */ - INIT_WORK(&intel_connector->modeset_retry_work, + INIT_WORK(&intel_dp->modeset_retry_work, intel_dp_modeset_retry_work_fn); if (drm_WARN(dev, dig_port->max_lanes < 1, diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 31d0d7854003..87d13cd03ef5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -1063,7 +1063,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { - struct intel_connector *intel_connector = intel_dp->attached_connector; struct drm_i915_private *i915 = dp_to_i915(intel_dp); if (!intel_digital_port_connected(&dp_to_dig_port(intel_dp)->base)) { @@ -1082,7 +1081,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp, } /* Schedule a Hotplug Uevent to userspace to start modeset */ - queue_work(i915->unordered_wq, &intel_connector->modeset_retry_work); + queue_work(i915->unordered_wq, &intel_dp->modeset_retry_work); } /* Perform the link training on all LTTPRs and the DPRX on a link. */ From patchwork Thu Aug 24 20:50:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Dekel X-Patchwork-Id: 13364707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91DBDC3DA6F for ; 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Thu, 24 Aug 2023 13:54:07 -0700 (PDT) Received: from gildekel.nyc.corp.google.com ([2620:0:1003:314:321d:e6f5:6dbd:3e5]) by smtp.gmail.com with ESMTPSA id d2-20020a0ce442000000b0064f5020df91sm62038qvm.28.2023.08.24.13.54.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 13:54:06 -0700 (PDT) From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Aug 2023 16:50:20 -0400 Message-ID: <20230824205335.500163-6-gildekel@chromium.org> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog In-Reply-To: <20230824205335.500163-1-gildekel@chromium.org> References: <20230824205335.500163-1-gildekel@chromium.org> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 5/6] drm/i915/dp_link_training: Set all downstream MST ports to BAD before retrying X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org, Gil Dekel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Before sending a uevent to userspace in order to trigger a corrective modeset, we change the failing connector's link-status to BAD. However, the downstream MST branch ports are left in their original GOOD state. This patch utilizes the drm helper function drm_dp_set_mst_topology_link_status() to rectify this and set all downstream MST connectors' link-status to BAD before emitting the uevent to userspace. Signed-off-by: Gil Dekel --- drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 42353b1ac487..e8b10f59e141 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5995,16 +5995,20 @@ static void intel_dp_modeset_retry_work_fn(struct work_struct *work) struct intel_dp *intel_dp = container_of(work, typeof(*intel_dp), modeset_retry_work); struct drm_connector *connector = &intel_dp->attached_connector->base; - drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s]\n", connector->base.id, - connector->name); - /* Grab the locks before changing connector property*/ - mutex_lock(&connector->dev->mode_config.mutex); - /* Set connector link status to BAD and send a Uevent to notify - * userspace to do a modeset. + /* Set the connector's (and possibly all its downstream MST ports') link + * status to BAD. */ + mutex_lock(&connector->dev->mode_config.mutex); + drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] link status %d -> %d\n", + connector->base.id, connector->name, + connector->state->link_status, DRM_MODE_LINK_STATUS_BAD); drm_connector_set_link_status_property(connector, DRM_MODE_LINK_STATUS_BAD); + if (intel_dp->is_mst) { + drm_dp_set_mst_topology_link_status(&intel_dp->mst_mgr, + DRM_MODE_LINK_STATUS_BAD); + } mutex_unlock(&connector->dev->mode_config.mutex); /* Send Hotplug uevent so userspace can reprobe */ drm_kms_helper_connector_hotplug_event(connector); From patchwork Thu Aug 24 20:50:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gil Dekel X-Patchwork-Id: 13364708 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23D9BC6FA8F for ; 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Thu, 24 Aug 2023 13:54:10 -0700 (PDT) Received: from gildekel.nyc.corp.google.com ([2620:0:1003:314:321d:e6f5:6dbd:3e5]) by smtp.gmail.com with ESMTPSA id d2-20020a0ce442000000b0064f5020df91sm62038qvm.28.2023.08.24.13.54.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 13:54:10 -0700 (PDT) From: Gil Dekel To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 24 Aug 2023 16:50:21 -0400 Message-ID: <20230824205335.500163-7-gildekel@chromium.org> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog In-Reply-To: <20230824205335.500163-1-gildekel@chromium.org> References: <20230824205335.500163-1-gildekel@chromium.org> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 6/6] drm/i915/dp_link_training: Emit a link-status=Bad uevent with trigger property X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org, Gil Dekel Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" When a link-training attempt fails, emit a uevent to user space that includes the trigger property, which in this case will be link-statue=Bad. This will allow userspace to parse the uevent property and better understand the reason for the previous modeset failure. Signed-off-by: Gil Dekel V2: - init link_status_property inline. Acked-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- Gil Dekel, Software Engineer, Google / ChromeOS Display and Graphics diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index e8b10f59e141..328e9f030033 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -42,6 +42,7 @@ #include #include #include +#include #include "g4x_dp.h" #include "i915_drv.h" @@ -5995,6 +5996,8 @@ static void intel_dp_modeset_retry_work_fn(struct work_struct *work) struct intel_dp *intel_dp = container_of(work, typeof(*intel_dp), modeset_retry_work); struct drm_connector *connector = &intel_dp->attached_connector->base; + struct drm_property *link_status_property = + connector->dev->mode_config.link_status_property; /* Set the connector's (and possibly all its downstream MST ports') link * status to BAD. @@ -6011,7 +6014,7 @@ static void intel_dp_modeset_retry_work_fn(struct work_struct *work) } mutex_unlock(&connector->dev->mode_config.mutex); /* Send Hotplug uevent so userspace can reprobe */ - drm_kms_helper_connector_hotplug_event(connector); + drm_sysfs_connector_property_event(connector, link_status_property); } bool