From patchwork Tue Aug 29 06:27:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhruva Gole X-Patchwork-Id: 13368620 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0C1FC83F12 for ; Tue, 29 Aug 2023 06:32:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229694AbjH2Gbm (ORCPT ); Tue, 29 Aug 2023 02:31:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231444AbjH2GbT (ORCPT ); Tue, 29 Aug 2023 02:31:19 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 400DBC9; Mon, 28 Aug 2023 23:31:15 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37T6U1Wa044681; Tue, 29 Aug 2023 01:30:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1693290601; bh=ombBwh79GIaVaFyYb8P+v0AxNxu00fZcfUBBDPJIxG8=; h=From:To:CC:Subject:Date; b=Hx2GEW13Vhq5j7rrV3+7fuEfyWACjL7oUE6iG4VsF7j4c0mF9xlzOBAjXYSiYS3jH Hxu7WmN6A3coisTBLya/3pLfPduPiGgiaEcJ/cNUVP4XoTII4jdpTCqWUg7av5401n 997tt333zjdgE788hz4DGICqkqSdiTl7Nvp7ubRE= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37T6U0a4052106 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 29 Aug 2023 01:30:01 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 29 Aug 2023 01:29:59 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 29 Aug 2023 01:29:59 -0500 Received: from dhruva.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37T6TtqB055956; Tue, 29 Aug 2023 01:29:56 -0500 From: Dhruva Gole To: Mark Brown CC: , , , Dhruva Gole , Apurva Nandan , Sai Krishna Potthuri , Ian Abbott , William Qiu , Brad Larson , Pratyush Yadav , Vignesh Raghavendra , Vibhore Vardhan Subject: [PATCH V2] spi: spi-cadence-quadspi: add runtime pm support Date: Tue, 29 Aug 2023 11:57:08 +0530 Message-ID: <20230829062706.786637-1-d-gole@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add runtime pm support to cadence-qspi driver, this allows the driver to suspend whenever it's is not actively being used thus reducing active power consumed by the system. Also, with the use of devm_pm_runtime_enable we no longer need the fallback probe_pm_failed that used to pm_runtime_disable Co-developed-by: Apurva Nandan Signed-off-by: Apurva Nandan Signed-off-by: Dhruva Gole --- Previous patch was marked RFT, and can be found here [0]. Tested [1] this patch on a TI SK-AM62 EVM having an OSPI NOR flash on board. Changelog: * Drop the DT patch as it had some comments that I am planning to address at a later point. * Add a ret val check for the pm_runtime_resume_and_get function call in the exec_mem_op in case it reports any failures. [0] https://lore.kernel.org/all/20230818103750.516309-3-d-gole@ti.com/ [1] https://gist.github.com/DhruvaG2000/7728ec09ae49c8c0d44d8e99de6795d5 Cc: Sai Krishna Potthuri Cc: Ian Abbott Cc: William Qiu Cc: Brad Larson Cc: Pratyush Yadav Cc: Vignesh Raghavendra Cc: Vibhore Vardhan drivers/spi/spi-cadence-quadspi.c | 42 ++++++++++++++++++++++++------- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index b50db71ac4cc..4828da4587c5 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -116,6 +116,9 @@ struct cqspi_driver_platdata { #define CQSPI_TIMEOUT_MS 500 #define CQSPI_READ_TIMEOUT_MS 10 +/* Runtime_pm autosuspend delay */ +#define CQSPI_AUTOSUSPEND_TIMEOUT 2000 + #define CQSPI_DUMMY_CLKS_PER_BYTE 8 #define CQSPI_DUMMY_BYTES_MAX 4 #define CQSPI_DUMMY_CLKS_MAX 31 @@ -1407,8 +1410,20 @@ static int cqspi_mem_process(struct spi_mem *mem, const struct spi_mem_op *op) static int cqspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { int ret; + struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master); + struct device *dev = &cqspi->pdev->dev; + + ret = pm_runtime_resume_and_get(dev); + if (ret) { + dev_err(&mem->spi->dev, "resume failed with %d\n", ret); + return ret; + } ret = cqspi_mem_process(mem, op); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + if (ret) dev_err(&mem->spi->dev, "operation failed with %d\n", ret); @@ -1753,10 +1768,10 @@ static int cqspi_probe(struct platform_device *pdev) if (irq < 0) return -ENXIO; - pm_runtime_enable(dev); - ret = pm_runtime_resume_and_get(dev); - if (ret < 0) - goto probe_pm_failed; + ret = pm_runtime_set_active(dev); + if (ret) + return ret; + ret = clk_prepare_enable(cqspi->clk); if (ret) { @@ -1862,21 +1877,29 @@ static int cqspi_probe(struct platform_device *pdev) goto probe_setup_failed; } + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; + + pm_runtime_set_autosuspend_delay(dev, CQSPI_AUTOSUSPEND_TIMEOUT); + pm_runtime_use_autosuspend(dev); + pm_runtime_get_noresume(dev); + ret = spi_register_controller(host); if (ret) { dev_err(&pdev->dev, "failed to register SPI ctlr %d\n", ret); goto probe_setup_failed; } + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + return 0; probe_setup_failed: cqspi_controller_enable(cqspi, 0); probe_reset_failed: clk_disable_unprepare(cqspi->clk); probe_clk_failed: - pm_runtime_put_sync(dev); -probe_pm_failed: - pm_runtime_disable(dev); return ret; } @@ -1928,7 +1951,8 @@ static int cqspi_resume(struct device *dev) return spi_controller_resume(host); } -static DEFINE_SIMPLE_DEV_PM_OPS(cqspi_dev_pm_ops, cqspi_suspend, cqspi_resume); +static DEFINE_RUNTIME_DEV_PM_OPS(cqspi_dev_pm_ops, cqspi_suspend, + cqspi_resume, NULL); static const struct cqspi_driver_platdata cdns_qspi = { .quirks = CQSPI_DISABLE_DAC_MODE, @@ -2012,7 +2036,7 @@ static struct platform_driver cqspi_platform_driver = { .remove_new = cqspi_remove, .driver = { .name = CQSPI_NAME, - .pm = &cqspi_dev_pm_ops, + .pm = pm_ptr(&cqspi_dev_pm_ops), .of_match_table = cqspi_dt_ids, }, };