From patchwork Thu Aug 31 20:51:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13371865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68AC1C83F2F for ; Thu, 31 Aug 2023 20:52:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5224110E070; Thu, 31 Aug 2023 20:52:27 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3BD6210E070 for ; Thu, 31 Aug 2023 20:52:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1693515144; x=1725051144; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=TuyEYHRnjY/+O7DOnS+47F47u5D2858bsTj8HAELm8g=; b=TtIKWXFDX0yK5EIL9pg3u6oCVCI7SM6p4EHnJk8JhB0Z1ztfvcXdHNmG 7C+67FMdpfxESPcvXUqTsmWiQJTCbkmPmtOlMW+PTaeEtUWUUtnh+qI/R Dw/huvy47uxlAM0dBBayMNE3hhDTnkjKbKKqJ2ZTkJ5npKJhMGvvI1Ss5 GzT3UJZvCY5TkU/A7qF9Xu5HRKp7yiRAInCuDlHs4mKLrs3Ni8Cq7yuIc WDCYqbPpuug3ozQqd/iHLHbR3YdF0swWFaT5yN3Mf/XPakndJLelcovxt CgOGCCciXHMtQMbC+JM0zijucHZKIMTxgQWGrv/n89PxpOYEWPr0aKCuY g==; X-IronPort-AV: E=McAfee;i="6600,9927,10819"; a="378797862" X-IronPort-AV: E=Sophos;i="6.02,217,1688454000"; d="scan'208";a="378797862" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Aug 2023 13:52:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10819"; a="733275190" X-IronPort-AV: E=Sophos;i="6.02,217,1688454000"; d="scan'208";a="733275190" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.249.135.36]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Aug 2023 13:52:21 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org Date: Thu, 31 Aug 2023 22:51:50 +0200 Message-Id: <20230831205150.165-1-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/guc: Update GUC_KLV_0_KEY definition X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Linyu Yuan Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" While building ARCH=x86 with GCC 7.5.0 we get compilation errors: CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o In file included from :0:0: In function ‘__guc_context_policy_add_priority.isra.47’, inlined from ‘__guc_context_set_prio.isra.48’ at drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3332:3, inlined from ‘guc_context_set_prio’ at drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3360:2: ././include/linux/compiler_types.h:397:38: error: call to ‘__compiletime_assert_1803’ declared with attribute error: FIELD_PREP: mask is not constant _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) ^ ././include/linux/compiler_types.h:378:4: note: in definition of macro ‘__compiletime_assert’ prefix ## suffix(); \ ^~~~~~ ././include/linux/compiler_types.h:397:2: note: in expansion of macro ‘_compiletime_assert’ _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) ^~~~~~~~~~~~~~~~~~~ ./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’ #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) ^~~~~~~~~~~~~~~~~~ ./include/linux/bitfield.h:65:3: note: in expansion of macro ‘BUILD_BUG_ON_MSG’ BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ ^~~~~~~~~~~~~~~~ ./include/linux/bitfield.h:114:3: note: in expansion of macro ‘__BF_FIELD_CHECK’ __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ ^~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:2461:3: note: in expansion of macro ‘FIELD_PREP’ FIELD_PREP(GUC_KLV_0_KEY, GUC_CONTEXT_POLICIES_KLV_ID_##id) | \ ^~~~~~~~~~ This is due to our GUC_KLV_0_KEY definition that uses signed mask in shift operator, which may lead to undefined behavior on 32-bit system. Use unsigned mask to enforce expected integer promotion. Reported-by: Linyu Yuan Signed-off-by: Michal Wajdeczko Cc: Linyu Yuan Cc: Jani Nikula --- drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h index 58012edd4eb0..8e821aefb164 100644 --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h @@ -29,7 +29,7 @@ */ #define GUC_KLV_LEN_MIN 1u -#define GUC_KLV_0_KEY (0xffff << 16) +#define GUC_KLV_0_KEY (0xffffu << 16) #define GUC_KLV_0_LEN (0xffff << 0) #define GUC_KLV_n_VALUE (0xffffffff << 0)