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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 1/2] xen/arm: smmuv3: Add missing U for shifted constant Date: Mon, 4 Sep 2023 11:14:05 +0200 Message-ID: <20230904091406.942-2-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230904091406.942-1-michal.orzel@amd.com> References: <20230904091406.942-1-michal.orzel@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00026367:EE_|IA1PR12MB8335:EE_ X-MS-Office365-Filtering-Correlation-Id: b878e39b-ed36-4ca3-e3f2-08dbad275642 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rwpxUpUjg0Cmyw3WMIeBnyv+a1FpqTN5znxdFk8H9gbkIyt92s04fMKvl/0EZz2Th0HECQzhcSkYZJ6EYmIhTVbRHpxqICKD0qBNdiOxxEuISGScZQwkBtxbLPxP/cHitibZqI5bAGoXBJsN9weU0hVDH/CwjHeMmN4Xdu1Gs3HVUmLfX+odB/UwJRJWvdoT67/87kl6zz1F8N24tSWdlUvu8Fv/5Ct4gLG2RbIxG7QySdTilMqD4/GtmZAx4RotrAhN80CFfbvdBA/Io1Y2FRKcI2SxeOpCdr9JpYjM2jCRhnD3WdCfLCnrAQY0OL2JBzeNDO8gxcA3pSBvUZcdUnU7nTRNEQOl4a/MpXUPG4LhlmXd3NZna3rVy/T2jM2MSQ068nUlObUajoTfe87jWPm1gGisBSp9P+AndvNcFSndsHqIwGAuGtSlplrRRbOVGuf5XzldiDti6rmwPtXMwKYqy1r3VuP9qXnrZIbiTmturAmgf8oyEGb3e1TSb7u8JHaGeHtdL1soDOqcGnToJ5ZNChxHc1CMj2YMVRXkfFafawYgnrfIMUpcYyMIqUjZVm/7mWgYp8Enuy2LI6yGx9Ls73MjgJ/vHleLF5gW94s/UUpWwK8o0vyBcTVD1pnBZ8sCK3h+3/J4psucRY1Su7/elDl3VB2D5NDWmA2bEKlhdzLWtEbt+6j+E61N0kDrthODhNRzgDA470077MyB0tpC7GtmSca7EfD9FLaN8zzQqXhD2c1L3Sd4P0y2mSX4DstD7qjyDVlylFVlR/6dLg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(136003)(346002)(376002)(396003)(1800799009)(82310400011)(451199024)(186009)(36840700001)(46966006)(40470700004)(8676002)(8936002)(5660300002)(316002)(6916009)(2906002)(36756003)(54906003)(70206006)(70586007)(4326008)(44832011)(41300700001)(40460700003)(26005)(1076003)(36860700001)(40480700001)(336012)(47076005)(82740400003)(6666004)(81166007)(356005)(426003)(478600001)(2616005)(83380400001)(86362001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2023 09:14:26.5142 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b878e39b-ed36-4ca3-e3f2-08dbad275642 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00026367.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8335 When running with SMMUv3 and UBSAN enabled, the following is printed: (XEN) UBSAN: Undefined behaviour in drivers/passthrough/arm/smmu-v3.c:297:12 (XEN) left shift of 1 by 31 places cannot be represented in type 'int' This refers to shift in Q_OVERFLOW_FLAG that is missing 'U' suffix. While there, also fix the same in GBPA_UPDATE. This should address MISRA Rule 7.2: A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type Signed-off-by: Michal Orzel Reviewed-by: Bertrand Marquis --- xen/drivers/passthrough/arm/smmu-v3.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.h b/xen/drivers/passthrough/arm/smmu-v3.h index b381ad373845..05f6b1fb7e33 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.h +++ b/xen/drivers/passthrough/arm/smmu-v3.h @@ -87,7 +87,7 @@ #define CR2_E2H (1 << 0) #define ARM_SMMU_GBPA 0x44 -#define GBPA_UPDATE (1 << 31) +#define GBPA_UPDATE (1U << 31) #define GBPA_ABORT (1 << 20) #define ARM_SMMU_IRQ_CTRL 0x50 @@ -159,7 +159,7 @@ #define Q_IDX(llq, p) ((p) & ((1 << (llq)->max_n_shift) - 1)) #define Q_WRP(llq, p) ((p) & (1 << (llq)->max_n_shift)) -#define Q_OVERFLOW_FLAG (1 << 31) +#define Q_OVERFLOW_FLAG (1U << 31) #define Q_OVF(p) ((p) & Q_OVERFLOW_FLAG) #define Q_ENT(q, p) ((q)->base + \ Q_IDX(&((q)->llq), p) * \ From patchwork Mon Sep 4 09:14:06 2023 Content-Type: text/plain; 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pr=C From: Michal Orzel To: CC: Michal Orzel , Andrew Cooper , George Dunlap , "Jan Beulich" , Julien Grall , "Stefano Stabellini" , Wei Liu Subject: [PATCH 2/2] xen: Change parameter of generic_fls() to unsigned int Date: Mon, 4 Sep 2023 11:14:06 +0200 Message-ID: <20230904091406.942-3-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230904091406.942-1-michal.orzel@amd.com> References: <20230904091406.942-1-michal.orzel@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017092:EE_|DS0PR12MB6605:EE_ X-MS-Office365-Filtering-Correlation-Id: c6ebf2f0-e8ea-41f6-3821-08dbad27561f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vComPv9FMtEHnR1t/DJKxbYtkM2LiKz5KdXRy0NUn7lrcpvq2SpyfrUYSAqnqdPg8FMbkvEh9tF/E/PRZfG402Q44xvxdcpWRTi7XZ6mP08Yv5dTLt0T5d23EuqGGMyTj5DpDnByVoNs4qK7Je4OYC7AuKfHF76E7j24L353+6o2M58Bfrbfwn1h6yQgTQzGrpNlx7tqrpO8Bh3O/aRDM+NrCx0NQU4qy++Kc7ZwGILZ+Ujt7tTCl3XyIM1BDsNmA+p/wJrfR4cZ+J3NfFeBu5Ye5vLBSJM+LNx045jt95VkGZSuocRmE3iMlOIwlRzQRDU7uvpskvBHszaWdzH8SQtdgrF/IBmaIe3avsOFV/PgR0YTZWcV3EFnfQ6o6FJ9JuJJb5wtskxp3lLzw4hhSNtPd5Oqs56PuJgR9v89i/F+3m9lpPELqU4KAvyyrIstlb3Q/9MTb8drD74OLPFJ/WjDxoU9DSDI4A2G2zXKFNrbVPiSyUh08f3OcHd53JwuSRT2d/d00puELyXmD6Hn/eWhDWwGuPuWq8yKKZs8yAErSJNn3eo4Tbkf19E/ST1yg36vQzxBJSQET+Qvga7KeybX9FoYy1YnmYe0PSba1XVy/+sGUEJivkaXyyQSgJPkbi0Akd2lOUFafS3Vvfvdck3ULOkzYQ7+GCFXL6qYem414X1hKQqFLo9/F+Q0Z4bij/Fvo9dqQb0K6YoiWroV0wccuDgfWro+E2WX3UvPSTrK/5ypdCYnSIZPXRAJlI8TkfLgwpukk1PQ/UGj80kDxYJzoeuzVzufINUEVXljtQI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(346002)(396003)(136003)(39860400002)(1800799009)(186009)(82310400011)(451199024)(46966006)(40470700004)(36840700001)(40460700003)(41300700001)(6666004)(81166007)(356005)(82740400003)(86362001)(478600001)(2616005)(83380400001)(426003)(336012)(26005)(1076003)(47076005)(36860700001)(40480700001)(70586007)(70206006)(36756003)(2906002)(54906003)(6916009)(316002)(8676002)(8936002)(5660300002)(44832011)(4326008)(41533002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2023 09:14:26.2492 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c6ebf2f0-e8ea-41f6-3821-08dbad27561f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017092.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6605 When running with SMMUv3 and UBSAN enabled on arm64, there are a lot of warnings printed related to shifting into sign bit in generic_fls() as it takes parameter of type int. Example: (XEN) UBSAN: Undefined behaviour in ./include/xen/bitops.h:69:11 (XEN) left shift of 134217728 by 4 places cannot be represented in type 'int' It does not make a lot of sense to ask for the last set bit of a negative value. We don't have a direct user of this helper and all the wrappers pass value of type unsigned {int,long}. Linux did the same as part of commit: 3fc2579e6f16 ("fls: change parameter to unsigned int") Signed-off-by: Michal Orzel Reviewed-by: Henry Wang --- It looks like generic_fls() is only used by Arm and invoked only if the arguement passed is a compile time constant. This is true for SMMUv3 which makes use of ffs64() in FIELD_{PREP,GET} macros. --- xen/include/xen/bitops.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 654f525fb437..b2d7bbd66687 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -51,7 +51,7 @@ static inline int generic_ffs(int x) * fls: find last bit set. */ -static __inline__ int generic_fls(int x) +static __inline__ int generic_fls(unsigned int x) { int r = 32;