From patchwork Mon Sep 4 15:57:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13374110 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA671C83F33 for ; Mon, 4 Sep 2023 15:57:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gEyLv1He0wdv49bi94hCxz7W7OaHdnVix3WdjyLzhjk=; b=da5ftVqD6WAaDS RooDK6eTdfYqEjfonS3YjBkfwIDJiSzbPL/7YjfujtyJU2xvXy3JTuucf8Y7ItldvNa21cafHDU5n pXNO2oIlio+E65kmPVP8DHMufQNOPwkzooismvka7QPMSTdsLZZhtQcGQemGKE550u5rQ2BK7aSr7 JbN0nlAkLdMFcHobdoDY3BJ2My9zie/XiZ2B7JGx1mKSzzUirMmlCsyl787B71Y/ohCkGT8/MfAdN otOhKtbi1Wm6Ay53n5HpjaMaOd7VWLWgEH0Lx5ldab1+UYTNaB07tPYyzyFq/41VIGE+E0U7UdP3b UA6PI0R4XMdguxgQRRRA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdBx5-004Ptv-0F; Mon, 04 Sep 2023 15:57:23 +0000 Received: from relay02.th.seeweb.it ([5.144.164.163]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdBwy-004PqL-0Y for linux-arm-kernel@lists.infradead.org; Mon, 04 Sep 2023 15:57:20 +0000 Received: from v0.lan (bband-dyn191.178-41-225.t-com.sk [178.41.225.191]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 7DE5B1F963; Mon, 4 Sep 2023 17:57:05 +0200 (CEST) From: Martin Botka Date: Mon, 04 Sep 2023 17:57:01 +0200 Subject: [PATCH 1/6] firmware: smccc: Export revision soc_id function MIME-Version: 1.0 Message-Id: <20230904-cpufreq-h616-v1-1-b8842e525c43@somainline.org> References: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> In-Reply-To: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> To: Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Rogerio Goncalves , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693843024; l=650; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=kr+kQu42jftnzRysfuRliIXntokD55LnjWm0KkOrQRY=; b=pAzHKAaWc3uxAZHLFKPmIIe/nbRnKh/YE++nWe15qMHVrrI0vNt1Ph6hE+aFzN+4S1wpRixuy C3B8nQmhvtKBDaa/gTX1xPTp4ZewRLtv2es7NWSHg0vT3FkLoNVVVaQ X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230904_085716_390335_8CA11840 X-CRM114-Status: GOOD ( 10.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org arm_smccc_get_soc_id_revision need to be exported so it can be used by sun50i cpufreq driver. Signed-off-by: Martin Botka --- drivers/firmware/smccc/smccc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/smccc/smccc.c b/drivers/firmware/smccc/smccc.c index db818f9dcb8e..d670635914ec 100644 --- a/drivers/firmware/smccc/smccc.c +++ b/drivers/firmware/smccc/smccc.c @@ -69,6 +69,7 @@ s32 arm_smccc_get_soc_id_revision(void) { return smccc_soc_id_revision; } +EXPORT_SYMBOL_GPL(arm_smccc_get_soc_id_revision); static int __init smccc_devices_init(void) { From patchwork Mon Sep 4 15:57:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13374109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25F4DC83F33 for ; Mon, 4 Sep 2023 15:57:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iKN1T4Us0B+JulgtS7dayatrbCPceNMVI8Llla622MM=; b=FzxHwv2cLzWNbN EErX/bsWkMDu41zAhXlT/CiOPfjS1dJLq3f4qdrUaGCnMqSDTLkgL328xfy5BgbJZXl8ORN0PbF/6 EW6vyIVHva1zrzVVs2NgGF80ofUIZS3I8J9z7S8+Goian9drvnG/tCeuUesfkk7K0/nBO8K4ebfzc bumObRT9O3vjT1fhbL/i/AQWGCBbcG0rydCEsfy3ri4UHONOzBpuLGL+AV3Y6+KD1wrd7Mr8Nn/0m 59PBxEmYi1u8TFtbwnIHEfjQvJKJyJ9n5NtHpPO6dY3B/0vMUhjm1eG2INCTrg2ZZqQZOEKVg9pXJ 1ot968ImSUVrWvsHE6vA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdBx7-004Puc-0L; Mon, 04 Sep 2023 15:57:25 +0000 Received: from relay04.th.seeweb.it ([2001:4b7a:2000:18::165]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdBwy-004PqJ-1Q for linux-arm-kernel@lists.infradead.org; Mon, 04 Sep 2023 15:57:21 +0000 Received: from v0.lan (bband-dyn191.178-41-225.t-com.sk [178.41.225.191]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 493011FAFE; Mon, 4 Sep 2023 17:57:06 +0200 (CEST) From: Martin Botka Date: Mon, 04 Sep 2023 17:57:02 +0200 Subject: [PATCH 2/6] cpufreq: dt-platdev: Blocklist allwinner,h616 SoC MIME-Version: 1.0 Message-Id: <20230904-cpufreq-h616-v1-2-b8842e525c43@somainline.org> References: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> In-Reply-To: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> To: Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Rogerio Goncalves , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693843024; l=763; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=y6+Jp6XdKlMolFv5lUKbS3BMDgQUVTv9Ux9Y9Pn0TiI=; b=jYK1Ddg2mSPl2rn47FMupLfy4TQbq4y4Ff2LU45va19Z4Fmq+B+x7B57OviVOXwqZEwVGQpX+ L7sv0XXIIk8D2MXSGs4p4If3SIc5J6qsYkfdvrBDMpnb7vKRS9UECKB X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230904_085716_637711_BE6A160C X-CRM114-Status: GOOD ( 10.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The AllWinner H616 uses H6 cpufreq driver. Add it to blocklist so its not created twice Signed-off-by: Martin Botka --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index e2b20080de3a..51818cef8979 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -104,6 +104,7 @@ static const struct of_device_id allowlist[] __initconst = { */ static const struct of_device_id blocklist[] __initconst = { { .compatible = "allwinner,sun50i-h6", }, + { .compatible = "allwinner,sun50i-h616", }, { .compatible = "apple,arm-platform", }, From patchwork Mon Sep 4 15:57:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13374106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DAE9EC83F3F for ; Mon, 4 Sep 2023 15:57:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WUNMEY2ViMGRD9uE92IRIIJ1kn924Yz5uN4wJi+Xue4=; b=UztCu3jIrJBZiz 8+iY1CyU6TD2jY/8i5PFqSzw7vdY1xUMQvJObV8HcWASZDpBJ4tT8S71PUT16D5HdPUBz6PWJ86kV /S5I69Gn0Sye5ybhf3IGj2U4VzmR5/04wPr9G76HCullC4HmAoc3PxqkrMmm6bf3/g8ozX0VGm/EY 3YUQgzKoLNpaXbXivH5zYPxLZREDxX/WaVmrRSgzY5Dq6IxJvcGOiXy32p3C8GbfwiJcNUkwD7Qrm KebAffh0HVBfFaffHE46fiCd5nI1I5jC0uTqbkRp5isMRia3dkVF48W5BbCzhuYgcsMk6LJZ5hNX9 QmbHzhuqDgPrxwU5YIVA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdBx7-004Puu-1w; Mon, 04 Sep 2023 15:57:25 +0000 Received: from m-r1.th.seeweb.it ([2001:4b7a:2000:18::170]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdBwy-004PqO-1M for linux-arm-kernel@lists.infradead.org; Mon, 04 Sep 2023 15:57:21 +0000 Received: from v0.lan (bband-dyn191.178-41-225.t-com.sk [178.41.225.191]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 0D0E21FBA5; Mon, 4 Sep 2023 17:57:07 +0200 (CEST) From: Martin Botka Date: Mon, 04 Sep 2023 17:57:03 +0200 Subject: [PATCH 3/6] dt-bindings: opp: Add compatible for H616 MIME-Version: 1.0 Message-Id: <20230904-cpufreq-h616-v1-3-b8842e525c43@somainline.org> References: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> In-Reply-To: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> To: Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Rogerio Goncalves , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693843024; l=1233; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=vkpyJtpACo5loCh7uIWuezcAm00aYr/8qEBY1Y7a4p0=; b=LsSyA8ltGbBj/87WeIZvhIIr7CW27Ba6QPMzBx6lX+DRdiVacfciJrzaKnjSiasT24rMfXkvF kHkob6+ZQ/jBcRr0WKQr0aVbKXpqug9ql3yQNGreOaV45y6DciUQFZ/ X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230904_085716_638811_9B578125 X-CRM114-Status: GOOD ( 11.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We need to add compatible for H616 to H6 cpufreq driver bindings. Also enable opp_supported_hw property that will be needed for H616. Signed-off-by: Martin Botka --- .../bindings/opp/allwinner,sun50i-h6-operating-points.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml index 51f62c3ae194..2fa1199f2d23 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml @@ -23,7 +23,10 @@ allOf: properties: compatible: - const: allwinner,sun50i-h6-operating-points + contains: + enum: + - allwinner,sun50i-h6-operating-points + - allwinner,sun50i-h616-operating-points nvmem-cells: description: | @@ -47,6 +50,7 @@ patternProperties: properties: opp-hz: true clock-latency-ns: true + opp-supported-hw: true patternProperties: "^opp-microvolt-speed[0-9]$": true From patchwork Mon Sep 4 15:57:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13374107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33D15C83F33 for ; Mon, 4 Sep 2023 15:57:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y3aU8tIf7fpTD9ArcJ7hDZOKy7R6PFEoOZ16IcCchhg=; b=nJYrK+L6HOdVH3 5TYpTy42wesy0ITm9HZUfxwGYzid3qSZncHF413hU6udR8+X7NVk6frMscm5Hp8+TN99MpAeFPtGz TELxl5uvfi67Ylk/oPD7m8C3WptLPvcu3vsqhRkW51T12ADEhasRflAwf/fHxDvzCbMG5EkN1TxmD 5onS6Gi7CWnMXB453mgQqU9cPHTNBX0s/PQxY0E6H6zv4ozGqcbRElAttq5QMgmc9MSESu4R9OQh2 NuzweBMjRna9bJkAgbW0RnUQygOj9HZyxgYTRNNcc/05S13YZkJzbTXTbD+eXwse4i1Xp0dOI2yXQ OsyraSSzsRr1vWdPhK7A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdBx8-004PvU-1u; Mon, 04 Sep 2023 15:57:26 +0000 Received: from relay03.th.seeweb.it ([2001:4b7a:2000:18::164]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdBwy-004PqW-0D for linux-arm-kernel@lists.infradead.org; Mon, 04 Sep 2023 15:57:22 +0000 Received: from v0.lan (bband-dyn191.178-41-225.t-com.sk [178.41.225.191]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id CC8541FBC6; Mon, 4 Sep 2023 17:57:07 +0200 (CEST) From: Martin Botka Date: Mon, 04 Sep 2023 17:57:04 +0200 Subject: [PATCH 4/6] cpufreq: sun50i: Add H616 support MIME-Version: 1.0 Message-Id: <20230904-cpufreq-h616-v1-4-b8842e525c43@somainline.org> References: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> In-Reply-To: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> To: Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Rogerio Goncalves , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693843024; l=7580; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=uOkhsPX7y5/oVyy/A3DXMbJiwLZ7PuGRSeJiB4vSb0g=; b=nJ3k//b9hWLBAuPFPIZjbYazaVXZ0ahtMcLt3XRaJn0zpDjMrt9za9k7aGbFK7+zJRgshNEx8 jVATPvuWhAzAxMUTOhYg6qcR2XIbW5LDDHzs9Lzi5hm98w8ufV+FxjN X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230904_085716_456326_7D144482 X-CRM114-Status: GOOD ( 25.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org AllWinner H616 SoC has few revisions that support different list of uV and frequencies. Some revisions have the same NVMEM value and thus we have to check the SoC revision from SMCCC to differentiate between them. Signed-off-by: Martin Botka --- drivers/cpufreq/sun50i-cpufreq-nvmem.c | 149 ++++++++++++++++++++++++++++----- 1 file changed, 126 insertions(+), 23 deletions(-) diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c index 4321d7bbe769..19c126fb081e 100644 --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include #include #include #include @@ -23,20 +24,94 @@ #define NVMEM_MASK 0x7 #define NVMEM_SHIFT 5 +struct sunxi_cpufreq_soc_data { + int (*efuse_xlate)(u32 *versions, u32 *efuse, char *name, size_t len); + u8 ver_freq_limit; +}; + static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev; +static int sun50i_h616_efuse_xlate(u32 *versions, u32 *efuse, char *name, size_t len) +{ + int value = 0; + u32 speedgrade = 0; + u32 i; + int ver_bits = arm_smccc_get_soc_id_revision(); + + if (len > 4) { + pr_err("Invalid nvmem cell length\n"); + return -EINVAL; + } + + for (i = 0; i < len; i++) + speedgrade |= (efuse[i] << (i * 8)); + + switch (speedgrade) { + case 0x2000: + value = 0; + break; + case 0x2400: + case 0x7400: + case 0x2c00: + case 0x7c00: + if (ver_bits <= 1) { + /* ic version A/B */ + value = 1; + } else { + /* ic version C and later version */ + value = 2; + } + break; + case 0x5000: + case 0x5400: + case 0x6000: + value = 3; + break; + case 0x5c00: + value = 4; + break; + case 0x5d00: + default: + value = 0; + } + *versions = (1 << value); + snprintf(name, MAX_NAME_LEN, "speed%d", value); + return 0; +} + +static int sun50i_h6_efuse_xlate(u32 *versions, u32 *efuse, char *name, size_t len) +{ + int efuse_value = (*efuse >> NVMEM_SHIFT) & NVMEM_MASK; + + /* + * We treat unexpected efuse values as if the SoC was from + * the slowest bin. Expected efuse values are 1-3, slowest + * to fastest. + */ + if (efuse_value >= 1 && efuse_value <= 3) + *versions = efuse_value - 1; + else + *versions = 0; + + snprintf(name, MAX_NAME_LEN, "speed%d", *versions); + return 0; +} + /** * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value + * @soc_data: Struct containing soc specific data & functions * @versions: Set to the value parsed from efuse + * @name: Set to the name of speed * * Returns 0 if success. */ -static int sun50i_cpufreq_get_efuse(u32 *versions) +static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data, + u32 *versions, char *name) { struct nvmem_cell *speedbin_nvmem; struct device_node *np; struct device *cpu_dev; - u32 *speedbin, efuse_value; + u32 *speedbin; size_t len; int ret; @@ -48,9 +123,9 @@ static int sun50i_cpufreq_get_efuse(u32 *versions) if (!np) return -ENOENT; - ret = of_device_is_compatible(np, - "allwinner,sun50i-h6-operating-points"); - if (!ret) { + if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) { + } else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) { + } else { of_node_put(np); return -ENOENT; } @@ -66,17 +141,9 @@ static int sun50i_cpufreq_get_efuse(u32 *versions) if (IS_ERR(speedbin)) return PTR_ERR(speedbin); - efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK; - - /* - * We treat unexpected efuse values as if the SoC was from - * the slowest bin. Expected efuse values are 1-3, slowest - * to fastest. - */ - if (efuse_value >= 1 && efuse_value <= 3) - *versions = efuse_value - 1; - else - *versions = 0; + ret = soc_data->efuse_xlate(versions, speedbin, name, len); + if (ret) + return ret; kfree(speedbin); return 0; @@ -84,25 +151,30 @@ static int sun50i_cpufreq_get_efuse(u32 *versions) static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) { + const struct of_device_id *match; + const struct sunxi_cpufreq_soc_data *soc_data; int *opp_tokens; char name[MAX_NAME_LEN]; unsigned int cpu; - u32 speed = 0; + u32 version = 0; int ret; + match = dev_get_platdata(&pdev->dev); + if (!match) + return -EINVAL; + soc_data = match->data; + opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens), GFP_KERNEL); if (!opp_tokens) return -ENOMEM; - ret = sun50i_cpufreq_get_efuse(&speed); + ret = sun50i_cpufreq_get_efuse(match->data, &version, name); if (ret) { kfree(opp_tokens); return ret; } - snprintf(name, MAX_NAME_LEN, "speed%d", speed); - for_each_possible_cpu(cpu) { struct device *cpu_dev = get_cpu_device(cpu); @@ -117,6 +189,16 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) pr_err("Failed to set prop name\n"); goto free_opp; } + + if (soc_data->ver_freq_limit) { + opp_tokens[cpu] = dev_pm_opp_set_supported_hw(cpu_dev, + &version, 1); + if (opp_tokens[cpu] < 0) { + ret = opp_tokens[cpu]; + pr_err("Failed to set hw\n"); + goto free_opp; + } + } } cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1, @@ -132,6 +214,8 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) free_opp: for_each_possible_cpu(cpu) dev_pm_opp_put_prop_name(opp_tokens[cpu]); + if (soc_data->ver_freq_limit) + dev_pm_opp_put_supported_hw(opp_tokens[cpu]); kfree(opp_tokens); return ret; @@ -140,12 +224,21 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) static int sun50i_cpufreq_nvmem_remove(struct platform_device *pdev) { int *opp_tokens = platform_get_drvdata(pdev); + const struct of_device_id *match; + const struct sunxi_cpufreq_soc_data *soc_data; unsigned int cpu; + match = dev_get_platdata(&pdev->dev); + if (!match) + return -EINVAL; + soc_data = match->data; + platform_device_unregister(cpufreq_dt_pdev); for_each_possible_cpu(cpu) dev_pm_opp_put_prop_name(opp_tokens[cpu]); + if (soc_data->ver_freq_limit) + dev_pm_opp_put_supported_hw(opp_tokens[cpu]); kfree(opp_tokens); @@ -160,8 +253,18 @@ static struct platform_driver sun50i_cpufreq_driver = { }, }; +static const struct sunxi_cpufreq_soc_data sun50i_h616_data = { + .efuse_xlate = sun50i_h616_efuse_xlate, + .ver_freq_limit = true, +}; + +static const struct sunxi_cpufreq_soc_data sun50i_h6_data = { + .efuse_xlate = sun50i_h6_efuse_xlate, +}; + static const struct of_device_id sun50i_cpufreq_match_list[] = { - { .compatible = "allwinner,sun50i-h6" }, + { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data }, + { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data }, {} }; MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list); @@ -197,8 +300,8 @@ static int __init sun50i_cpufreq_init(void) return ret; sun50i_cpufreq_pdev = - platform_device_register_simple("sun50i-cpufreq-nvmem", - -1, NULL, 0); + platform_device_register_data(NULL, "sun50i-cpufreq-nvmem", + -1, match, sizeof(*match)); ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev); if (ret == 0) return 0; From patchwork Mon Sep 4 15:57:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13374108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0DD18C83F2C for ; Mon, 4 Sep 2023 15:57:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; 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Mon, 04 Sep 2023 15:57:21 +0000 Received: from v0.lan (bband-dyn191.178-41-225.t-com.sk [178.41.225.191]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 92F80200DC; Mon, 4 Sep 2023 17:57:08 +0200 (CEST) From: Martin Botka Date: Mon, 04 Sep 2023 17:57:05 +0200 Subject: [PATCH 5/6] arm64: dts: allwinner: h616: Add CPU Operating Performance Points table MIME-Version: 1.0 Message-Id: <20230904-cpufreq-h616-v1-5-b8842e525c43@somainline.org> References: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> In-Reply-To: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> To: Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Rogerio Goncalves , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693843024; l=4851; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=ZyTs95wiIyvmN1gbK2qSdTK4VyZDXqdQv5Y0SxAq2Rk=; b=Pmytw8jIYJK6fsuUEfiSHlfEP7WedUyOYqucysSFK6q9uyb86M3hCB9byZG+4ySi6JIZ6Mv7Y 3mP/BIvEH4zCImrvZJin4j5kU9yhS/7gi8UWRE9b3aNJqYNGB1/QKb7 X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230904_085716_809422_46A9E60D X-CRM114-Status: GOOD ( 13.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add an Operating Performance Points table for the CPU cores to enable Dynamic Voltage & Frequency Scaling on the H616. Also add the needed cpu_speed_grade nvmem cell. Signed-off-by: Martin Botka --- .../boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi | 129 +++++++++++++++++++++ arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 4 + 2 files changed, 133 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi new file mode 100644 index 000000000000..4c7eaba511a9 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2023 Martin Botka + +/ { + cpu_opp_table: cpu-opp-table { + compatible = "allwinner,sun50i-h616-operating-points"; + nvmem-cells = <&cpu_speed_grade>; + opp-shared; + + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt-speed0 = <900000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed2 = <900000>; + opp-microvolt-speed3 = <900000>; + opp-microvolt-speed4 = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x1f>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed4 = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x12>; + }; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt-speed0 = <900000>; + opp-microvolt-speed2 = <900000>; + opp-microvolt-speed3 = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0xd>; + }; + + opp-792000000 { + opp-hz = /bits/ 64 <792000000>; + opp-microvolt-speed1 = <900000>; + opp-microvolt-speed4 = <940000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x12>; + }; + + opp-936000000 { + opp-hz = /bits/ 64 <936000000>; + opp-microvolt-speed0 = <900000>; + opp-microvolt-speed2 = <900000>; + opp-microvolt-speed3 = <900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0xd>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt-speed0 = <950000>; + opp-microvolt-speed1 = <940000>; + opp-microvolt-speed2 = <950000>; + opp-microvolt-speed3 = <950000>; + opp-microvolt-speed4 = <1020000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x1f>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt-speed0 = <1000000>; + opp-microvolt-speed2 = <1000000>; + opp-microvolt-speed3 = <1000000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0xd>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt-speed0 = <1050000>; + opp-microvolt-speed1 = <1020000>; + opp-microvolt-speed2 = <1050000>; + opp-microvolt-speed3 = <1050000>; + opp-microvolt-speed4 = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x1f>; + }; + + opp-1320000000 { + opp-hz = /bits/ 64 <1320000000>; + opp-microvolt-speed0 = <1100000>; + opp-microvolt-speed2 = <1100000>; + opp-microvolt-speed3 = <1100000>; + opp-microvolt-speed4 = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0x1d>; + }; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt-speed0 = <1100000>; + opp-microvolt-speed2 = <1100000>; + opp-microvolt-speed3 = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0xd>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt-speed1 = <1100000>; + opp-microvolt-speed3 = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-supported-hw = <0xa>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu_opp_table>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 063db9634e5f..78e79c591dba 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -143,6 +143,10 @@ sid: efuse@3006000 { ths_calibration: thermal-sensor-calibration@14 { reg = <0x14 0x8>; }; + + cpu_speed_grade: cpu_speed_grade@0 { + reg = <0x0 2>; + }; }; watchdog: watchdog@30090a0 { From patchwork Mon Sep 4 15:57:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13374104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC9D6C83F33 for ; Mon, 4 Sep 2023 15:57:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 4 Sep 2023 17:57:09 +0200 (CEST) From: Martin Botka Date: Mon, 04 Sep 2023 17:57:06 +0200 Subject: [PATCH 6/6] arm64: dts: allwinner: h616: Add cooling cells MIME-Version: 1.0 Message-Id: <20230904-cpufreq-h616-v1-6-b8842e525c43@somainline.org> References: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> In-Reply-To: <20230904-cpufreq-h616-v1-0-b8842e525c43@somainline.org> To: Mark Rutland , Lorenzo Pieralisi , Sudeep Holla , "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Rogerio Goncalves , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1693843024; l=1174; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=qJv56yjDvCMxLlVKkO9qD49pos1hnuOnNYRbCB0UPg0=; b=zMLqucwWJskJLNOgqJTLSKacT6rQBC1cwrFNHN3F2BAMkUGpUNzTlKyvratAfDhTp2hqBTdRU xmbBKBWUWsrDX4Dj9koFphUDq/Thv1MDc4BtfGIm6hqMCQAin2R3D3B X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230904_085716_543972_ADD18BE7 X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cooling cells so we enable passive cooling on CPU by regulating CPU voltage and frequency Signed-off-by: Martin Botka --- arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 78e79c591dba..7dc4c95ea280 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -26,6 +26,7 @@ cpu0: cpu@0 { reg = <0>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -34,6 +35,7 @@ cpu1: cpu@1 { reg = <1>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -42,6 +44,7 @@ cpu2: cpu@2 { reg = <2>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -50,6 +53,7 @@ cpu3: cpu@3 { reg = <3>; enable-method = "psci"; clocks = <&ccu CLK_CPUX>; + #cooling-cells = <2>; }; };