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Adjust the target CPU mask of i8259 interrupt descriptors to contain all possible CPUs, so that APs will reserve the vector at startup if any legacy IRQ is still delivered through the i8259. Note that if the IO-APIC takes over those interrupt descriptors the CPU mask will be reset. Spurious i8259 interrupt vectors however (IRQ7 and IRQ15) can be injected even when all i8259 pins are masked, and hence need to be handled on all CPUs. Reserve such vectors in order to prevent dynamic interrupt sources from using them. Finally, handle spurious i8259 interrupts on all CPUs and adjust the printed message to display the CPU where the spurious interrupt has been received, so it looks like: microcode: CPU1 updated from revision 0x830107a to 0x830107a, date = 2023-05-17 cpu1: spurious 8259A interrupt: IRQ7 microcode: CPU2 updated from revision 0x830104d to 0x830107a, date = 2023-05-17 Fixes: 3fba06ba9f8b ('x86/IRQ: re-use legacy vector ranges on APs') Signed-off-by: Roger Pau Monné --- One theory I have is that the APs at some point (before jumping into Xen code) have the local APIC hardware-disabled, and hence are considered valid targets by the i8259, but by the time the vector is fetched from the i8259 the interrupt has either been masked, or already consumed by a different CPU. --- xen/arch/x86/i8259.c | 18 ++++++++++++++++-- xen/arch/x86/irq.c | 9 ++++++++- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/i8259.c b/xen/arch/x86/i8259.c index ed9f55abe51e..ad3bca9895d0 100644 --- a/xen/arch/x86/i8259.c +++ b/xen/arch/x86/i8259.c @@ -222,7 +222,8 @@ static bool _mask_and_ack_8259A_irq(unsigned int irq) is_real_irq = false; /* Report spurious IRQ, once per IRQ line. */ if (!(spurious_irq_mask & irqmask)) { - printk("spurious 8259A interrupt: IRQ%d.\n", irq); + printk("cpu%u: spurious 8259A interrupt: IRQ%u\n", + smp_processor_id(), irq); spurious_irq_mask |= irqmask; } /* @@ -349,7 +350,20 @@ void __init init_IRQ(void) continue; desc->handler = &i8259A_irq_type; per_cpu(vector_irq, cpu)[LEGACY_VECTOR(irq)] = irq; - cpumask_copy(desc->arch.cpu_mask, cpumask_of(cpu)); + + /* + * The interrupt affinity logic never targets interrupts to offline + * CPUs, hence it's safe to use cpumask_all here. + * + * Legacy PIC interrupts are only targeted to CPU0, but depending on + * the platform they can be distributed to any online CPU in hardware. + * The kernel has no influence on that. So all active legacy vectors + * must be installed on all CPUs. + * + * IO-APIC will change the destination mask if/when taking ownership of + * the interrupt. + */ + cpumask_copy(desc->arch.cpu_mask, &cpumask_all); desc->arch.vector = LEGACY_VECTOR(irq); } diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 6abfd8162120..2379fdda3a7e 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -466,6 +466,14 @@ int __init init_irq_data(void) vector++ ) __set_bit(vector, used_vectors); + /* + * Mark i8259 spurious vectors as used to avoid (re)using them. Otherwise + * it won't be possible to distinguish between device triggered interrupts + * or spurious i8259 ones. + */ + __set_bit(LEGACY_VECTOR(7), used_vectors); + __set_bit(LEGACY_VECTOR(15), used_vectors); + return 0; } @@ -1920,7 +1928,6 @@ void do_IRQ(struct cpu_user_regs *regs) kind = ""; if ( !(vector >= FIRST_LEGACY_VECTOR && vector <= LAST_LEGACY_VECTOR && - !smp_processor_id() && bogus_8259A_irq(vector - FIRST_LEGACY_VECTOR)) ) { printk("CPU%u: No irq handler for vector %02x (IRQ %d%s)\n",