From patchwork Tue Sep 19 12:45:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13391347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F0B1CD5BAD for ; Tue, 19 Sep 2023 12:46:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232166AbjISMqS (ORCPT ); Tue, 19 Sep 2023 08:46:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232112AbjISMqR (ORCPT ); Tue, 19 Sep 2023 08:46:17 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A798FF7 for ; Tue, 19 Sep 2023 05:46:06 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-5315b70c50dso1913857a12.2 for ; Tue, 19 Sep 2023 05:46:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1695127565; x=1695732365; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sLLpoq+DcvN55YeifZ9SGsL5kC0r1lCyLX42UdQGXRo=; b=ZM35CBM6YRAPDvoUBrk9km8C+ovnxTJZyhk9lv5c5yUnvFyFiwO/G/QyiWncM7vPU8 Ndhht4hVSiEy94DtJ7XiAO0fRts8PlhDbcXaZ3paBZUNqka7KkDuuIPUpwE2tLgl4GNN tO9hwrAn4ntzhRT8KVasQCeoRoyJ7HhmjaQx9XuhaJh4X6nrU5TMPpZCirFj2oqwfQwl RGqSufOhV2AdmrgFbAU7EWdF5egUgzTKWubI+3CckomBpWPFW58gcOr3WHvRZZSApdUV z2U00uELE+0Y/FmkYcJi2SAkNQaVNofh/4OidxP9o1HlW1DXljY/xzd0h03GG2acI5aq 0wfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695127565; x=1695732365; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sLLpoq+DcvN55YeifZ9SGsL5kC0r1lCyLX42UdQGXRo=; b=M4EknkqImvRgWtJ6JoPvz117gai37pn+zWFe2mPYtsLurluaMF7BgcqfoH2luE5zjX 59WpN6n9sAtLWXYwanqAskRG26OypZZa58yQ6dGwHH8/n64LMIk/I3hIPFnexEsHtdfJ r+4Kk+OiV/4Xg/mRkq76M+UoIo1N3bIaue0yPVxVd5ZCqX44gk6gRgFNpH2QfDCVONte aWE9tEr7Deov4jQVOZ10u5RsRaiGeoI5p/3qQClM3gs/MxASFPHuzeTEZwN1T2SuwFm4 7+n7eCJMoTM8MaQzEtRUzluk/yshWz54pM7aZsH3QToyqESZZ2GeYuN15lOPQw60r75z ceSQ== X-Gm-Message-State: AOJu0YywB+t6HCOYOam4Q1covBzrMabNGyAg4sU+t0vUhLV794lRzvLj 9v1D5XoWsp3PcPD8rLAlfXkfUg== X-Google-Smtp-Source: AGHT+IFOoSh8VwSk3uaWIZRjca8rl/eH5qw0/LYnlSu9ZwfYCdjYA7p6eBAc6sBe6o86gMi+lEAZdQ== X-Received: by 2002:a05:6402:206c:b0:530:ad02:a6e8 with SMTP id bd12-20020a056402206c00b00530ad02a6e8mr7303734edb.42.1695127564948; Tue, 19 Sep 2023 05:46:04 -0700 (PDT) Received: from otso.luca.vpn.lucaweiss.eu (static-212-193-78-212.thenetworkfactory.nl. [212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:04 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:45:55 +0200 Subject: [PATCH v2 1/7] arm64: dts: qcom: sc7280: Mark some nodes as 'reserved' MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-1-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org With the standard Qualcomm TrustZone setup, components such as lpasscc, pdc_reset and watchdog shouldn't be touched by Linux. Mark them with the status 'reserved' and reenable them in the chrome-common dtsi. Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 24 ++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 +++++++- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index 2e1cd219fc18..5d462ae14ba1 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi @@ -46,6 +46,26 @@ wpss_mem: memory@9ae00000 { }; }; +&lpass_aon { + status = "okay"; +}; + +&lpass_core { + status = "okay"; +}; + +&lpass_hm { + status = "okay"; +}; + +&lpasscc { + status = "okay"; +}; + +&pdc_reset { + status = "okay"; +}; + /* The PMIC PON code isn't compatible w/ how Chrome EC/BIOS handle things. */ &pmk8350_pon { status = "disabled"; @@ -84,6 +104,10 @@ &scm { dma-coherent; }; +&watchdog { + status = "okay"; +}; + &wifi { status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 2af42d0ad99e..3f7f5c99eaf8 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2316,6 +2316,7 @@ lpasscc: lpasscc@3000000 { clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_rx_macro: codec@3200000 { @@ -2467,6 +2468,7 @@ lpass_aon: clock-controller@3380000 { clock-names = "bi_tcxo", "bi_tcxo_ao", "iface"; #clock-cells = <1>; #power-domain-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_core: clock-controller@3900000 { @@ -2477,6 +2479,7 @@ lpass_core: clock-controller@3900000 { power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>; #clock-cells = <1>; #power-domain-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_cpu: audio@3987000 { @@ -2547,6 +2550,7 @@ lpass_hm: clock-controller@3c00000 { clock-names = "bi_tcxo"; #clock-cells = <1>; #power-domain-cells = <1>; + status = "reserved"; /* Owned by ADSP firmware */ }; lpass_ag_noc: interconnect@3c40000 { @@ -4243,6 +4247,7 @@ pdc_reset: reset-controller@b5e0000 { compatible = "qcom,sc7280-pdc-global"; reg = <0 0x0b5e0000 0 0x20000>; #reset-cells = <1>; + status = "reserved"; /* Owned by firmware */ }; tsens0: thermal-sensor@c263000 { @@ -5239,11 +5244,12 @@ msi-controller@17a40000 { }; }; - watchdog@17c10000 { + watchdog: watchdog@17c10000 { compatible = "qcom,apss-wdt-sc7280", "qcom,kpss-wdt"; reg = <0 0x17c10000 0 0x1000>; clocks = <&sleep_clk>; interrupts = ; + status = "reserved"; /* Owned by Gunyah hyp */ }; timer@17c20000 { From patchwork Tue Sep 19 12:45:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13391346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76E4BCD5BAE for ; Tue, 19 Sep 2023 12:46:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232136AbjISMqR (ORCPT ); Tue, 19 Sep 2023 08:46:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232095AbjISMqQ (ORCPT ); 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:05 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:45:56 +0200 Subject: [PATCH v2 2/7] nvmem: qfprom: Mark core clk as optional MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-2-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On some platforms like sc7280 on non-ChromeOS devices the core clock cannot be touched by Linux so we cannot provide it. Mark it as optional as accessing qfprom for reading works without it but we still prohibit writing if we cannot provide the clock. Signed-off-by: Luca Weiss Reviewed-by: Douglas Anderson --- drivers/nvmem/qfprom.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index 14814cba2dd6..525be03b7bba 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -423,12 +423,12 @@ static int qfprom_probe(struct platform_device *pdev) if (IS_ERR(priv->vcc)) return PTR_ERR(priv->vcc); - priv->secclk = devm_clk_get(dev, "core"); + priv->secclk = devm_clk_get_optional(dev, "core"); if (IS_ERR(priv->secclk)) return dev_err_probe(dev, PTR_ERR(priv->secclk), "Error getting clock\n"); - /* Only enable writing if we have SoC data. */ - if (priv->soc_data) + /* Only enable writing if we have SoC data and a valid clock */ + if (priv->soc_data && priv->secclk) econfig.reg_write = qfprom_reg_write; } From patchwork Tue Sep 19 12:45:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13391350 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5777CD5BB3 for ; Tue, 19 Sep 2023 12:46:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232200AbjISMqU (ORCPT ); Tue, 19 Sep 2023 08:46:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232128AbjISMqR (ORCPT ); Tue, 19 Sep 2023 08:46:17 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C57112C for ; Tue, 19 Sep 2023 05:46:08 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3ff1c397405so60881175e9.3 for ; Tue, 19 Sep 2023 05:46:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1695127566; x=1695732366; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=1cayq2XwlrQqenkKdhvhc7PohXHp9znYKa41IjUAF5M=; b=1jHnQ4nnifw4Tu6o8RPPr/cQxt9dmogX5YtccjTHuwNL7YhLYIL5v6HyOk7WP2Yxn2 XPmwVGwch5YBwGeBzjiJ2yit/yBPvI53LZ/RHPleL1Rd7PYpGLLx20cQHLCypcDA2cr7 /a1LtU6oDy9B2v5q/OfQ1X4y0Bnw8VSMP++8g4rHEmim6PQ3Ch7+40sNs7URuMJlteJJ nzA/1POYQ7UvRnNvfvHAHYt1YzxOz8fKVw+cOWgdeF1j6MczUYbN/dnZ5Jhc2boXfRup BtNTBPU2D7j1Ehk1gFd38lFHGbYXvRQpUZDIgEvpzkAKjmOLw4juM8AdP0bBzY/P9yyF 4FTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695127566; x=1695732366; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1cayq2XwlrQqenkKdhvhc7PohXHp9znYKa41IjUAF5M=; b=M5Zm/1WNtrdmScUxjzp7FjLBK+NQg6Dn00vZ1otJK1KmjhC/OSCIScF+UX8nRjQHc0 qERIEY2nh92pid4cMIs5QZ/IddWT8dSkqS1KysA5VJpQz5dpCUIBve6YiMkUv4yVhn+a OFVds1PZBRU20MtvTgjLcnnKM8n3ssbs5yhWvCd+DYkQ/7tO0lYeqibh+wNsV1XaFRGf Ng6rg85CUzreatRva+DRLesDAM9g1ZZ4Fgw2SsqAvp1C1G0KmsSqkc4exVuXTSNIPUn6 AFQ8pFVyMLDYQoHPSkCn39uf+s7XgshGTo4LOVHW3GTN8oZvr0DaVQkCb5PlzmrLePVP zPVg== X-Gm-Message-State: AOJu0YyA51Te89VuEr4SOsPCTUW5S9a18LtVbcsVrSfLkiy2ED1P9vnS JWbvTgQbYfRHwpKdPHRkC1z9HQ== X-Google-Smtp-Source: AGHT+IHQmdZ3mCAQWWF0IvQWyCVEp8mSaOHrK4oyGbefs0W0x7kd31beka/YHFqu8VaqZfM7QZIPNA== X-Received: by 2002:a05:6000:612:b0:321:55e6:9a12 with SMTP id bn18-20020a056000061200b0032155e69a12mr4808624wrb.6.1695127566482; Tue, 19 Sep 2023 05:46:06 -0700 (PDT) Received: from otso.luca.vpn.lucaweiss.eu (static-212-193-78-212.thenetworkfactory.nl. [212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:06 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:45:57 +0200 Subject: [PATCH v2 3/7] arm64: dts: qcom: pm7250b: make SID configurable MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-3-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Like other Qualcomm PMICs the PM7250B can be used on different addresses on the SPMI bus. Use similar defines like the PMK8350 to make this possible but skip the ifndef based on maintainer feedback. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/pm7250b.dtsi | 14 +++++++------- arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 4 ++++ 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi index e8540c36bd99..df0afe82f250 100644 --- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi +++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi @@ -39,16 +39,16 @@ trip2 { }; &spmi_bus { - pmic@2 { + pmic@PM7250B_SID { compatible = "qcom,pm7250b", "qcom,spmi-pmic"; - reg = <0x2 SPMI_USID>; + reg = ; #address-cells = <1>; #size-cells = <0>; pm7250b_temp: temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; - interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + interrupts = ; io-channels = <&pm7250b_adc ADC5_DIE_TEMP>; io-channel-names = "thermal"; #thermal-sensor-cells = <0>; @@ -60,7 +60,7 @@ pm7250b_adc: adc@3100 { #address-cells = <1>; #size-cells = <0>; #io-channel-cells = <1>; - interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; channel@0 { reg = ; @@ -141,7 +141,7 @@ channel@99 { pm7250b_adc_tm: adc-tm@3500 { compatible = "qcom,spmi-adc-tm5"; reg = <0x3500>; - interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; #thermal-sensor-cells = <1>; #address-cells = <1>; #size-cells = <0>; @@ -159,9 +159,9 @@ pm7250b_gpios: pinctrl@c000 { }; }; - pmic@3 { + pmic@PM7250B_SID1 { compatible = "qcom,pm7250b", "qcom,spmi-pmic"; - reg = <0x3 SPMI_USID>; + reg = ; #address-cells = <1>; #size-cells = <0>; }; diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts index 136e273d09a7..943d5a150b64 100644 --- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts @@ -5,6 +5,10 @@ /dts-v1/; +/* PM7250B is configured to use SID2/3 */ +#define PM7250B_SID 2 +#define PM7250B_SID1 3 + /* PMK8350 (in reality a PMK8003) is configured to use SID6 instead of 0 */ #define PMK8350_SID 6 From patchwork Tue Sep 19 12:45:58 2023 Content-Type: text/plain; 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:06 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:45:58 +0200 Subject: [PATCH v2 4/7] arm64: dts: qcom: pm8350c: Add flash led node MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-4-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add a node for the led controller found on PM8350C, used for flash and torch purposes. Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/pm8350c.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8350c.dtsi b/arch/arm64/boot/dts/qcom/pm8350c.dtsi index f28e71487d5c..aa74e21fe0dc 100644 --- a/arch/arm64/boot/dts/qcom/pm8350c.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8350c.dtsi @@ -30,6 +30,12 @@ pm8350c_gpios: gpio@8800 { #interrupt-cells = <2>; }; + pm8350c_flash: led-controller@ee00 { + compatible = "qcom,pm8350c-flash-led", "qcom,spmi-flash-led"; + reg = <0xee00>; + status = "disabled"; + }; + pm8350c_pwm: pwm { compatible = "qcom,pm8350c-pwm"; #pwm-cells = <2>; From patchwork Tue Sep 19 12:45:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13391351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DFB1CD5BB7 for ; Tue, 19 Sep 2023 12:46:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232202AbjISMqZ (ORCPT ); Tue, 19 Sep 2023 08:46:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232180AbjISMqT (ORCPT ); Tue, 19 Sep 2023 08:46:19 -0400 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC07A181 for ; Tue, 19 Sep 2023 05:46:09 -0700 (PDT) Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-5310aec4121so2837838a12.2 for ; Tue, 19 Sep 2023 05:46:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1695127568; x=1695732368; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4Aj8Gv+tiuDZcymBcA5+44sWc7PVlwPM61yOxENISt0=; b=gzSo6D6uGAP/OUJZtaLbsHgMM0LqNUHITaIFAVR4h8j3adM3nBMKKLARgQJdGPCkHT T1uXiQDK/LX6N3dDbm4eHESM5rdgu9QNCkzsxzfIs076nTvGeVMzQByFi0tS7W6nzhV9 vDtTCzMYMXCS/c0SqfI/DuaxFdtYv8r0//D1+MAKnBOEiqNdo3DLrjSe1pPVzNjI7uJB HWAJCxV4WCSA0olnb6SkSz8Id7q0FXKBb62UAwh2RrfYxdX5c6iJY6rGir2UYunwexYw K6T+Fxtn1MqdZJrd8OtTQAXP9ADgbGSVzCu4WRGrF6P8XAYjE2doQuR/qv2ZKy76tYyp hMSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695127568; x=1695732368; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4Aj8Gv+tiuDZcymBcA5+44sWc7PVlwPM61yOxENISt0=; b=GZ9rEXfcOj7WYqm0IJP7YVUuz92u1KIwTA78FdvGqPvyi2DvBVsuzLkzQcyy1TUIW4 Glt7L2I7Ghayqe146lklgUs6C59FB+aa0OvDSGtoW8cbdGdlpgyBxnOANAwpWpm0B5pF 2OftDhBIAAM2cu8SFiFEsC+ov3krDIu9JlsE3pQnU/NvWsWO1VpFbe0ozY7pd8JaV0lX 3CuCbsc7UtFgxC80OQ51mhZg1UQUzvPy5jITkageWj41yfcqkrB/BQSFdyx+V9aRU9vN dUaRa4Bm5MiX+UH7Do3Z/hRp244r8Ui6MoMSk08LJbqIJKJp3afKWoxyl1uSvITexmv8 5hwg== X-Gm-Message-State: AOJu0YxeDEh7z9jqKifwsQ1S2xMdB00GqdjKZOxSBWF1vLbLV6+zwTm4 qPuR7xDIoLU+MOP3aGlDmCgzYw== X-Google-Smtp-Source: AGHT+IHY4XkH3n3f08uxPsLLePpLe5k2m9wL4+D7Lpa4GDsuvM4bqhqKckSMAs66C27gXJW0c+//AQ== X-Received: by 2002:aa7:d954:0:b0:526:9c4:bc06 with SMTP id l20-20020aa7d954000000b0052609c4bc06mr9723390eds.18.1695127567821; Tue, 19 Sep 2023 05:46:07 -0700 (PDT) Received: from otso.luca.vpn.lucaweiss.eu (static-212-193-78-212.thenetworkfactory.nl. [212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:07 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:45:59 +0200 Subject: [PATCH v2 5/7] dt-bindings: pinctrl: qcom,sc7280: Allow gpio-reserved-ranges MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-5-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss , Krzysztof Kozlowski X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Allow the gpio-reserved-ranges property on SC7280 TLMM. Acked-by: Linus Walleij Acked-by: Krzysztof Kozlowski Signed-off-by: Luca Weiss --- Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml index 368d44ff5468..c8735ab97e40 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml @@ -41,6 +41,10 @@ properties: gpio-ranges: maxItems: 1 + gpio-reserved-ranges: + minItems: 1 + maxItems: 88 + gpio-line-names: maxItems: 175 From patchwork Tue Sep 19 12:46:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13391349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C56CCD5BB7 for ; Tue, 19 Sep 2023 12:46:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232124AbjISMqV (ORCPT ); Tue, 19 Sep 2023 08:46:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232184AbjISMqT (ORCPT ); Tue, 19 Sep 2023 08:46:19 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB951187 for ; Tue, 19 Sep 2023 05:46:10 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-501eec0a373so9167423e87.3 for ; Tue, 19 Sep 2023 05:46:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1695127568; x=1695732368; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=7fWFiq2Z3kzEyU88O2c9+i0+0nk8+Hu7Vs+xo2WgRZY=; b=0qu5Ts8zT7BUKq+V4tf8qNL+Uamsn0u4PCcd/SdXWT66uBOofC56VEyRBtviIASGBt Fri7YsQnAta4i68K5lR9fRr86BuIsSfJjVuz2LD5/l0QM8X8ZXzfvEBXMujWlx1la7cW qvFI+xYOAX523nh/J32xpYNYTPdY5PnFU7yIQTDhjfHQ/shfG2rJVuWdVMt/fv+aZzen dNqp1ckCWBw8IbGaB+GzaXRAUBVt6a2N/2nVSMMLKaIdVSpjd7HlWynoRZ921MSAH/W9 AyvWhlToFeX598Mks+iZGC9GadgNcHgQ2HtHEflgKgosd2gCtyU1L6euO/c6TTajnQRi eWrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695127568; x=1695732368; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7fWFiq2Z3kzEyU88O2c9+i0+0nk8+Hu7Vs+xo2WgRZY=; b=jWML9334KfUZEu7TPptzGn121XPOQFVgB2cDa4+GzB7dE4bj9MRML5nmYxiJ2zud+M zDJ3a+E4wflHI/AONONFcopVNzelBgYJwwzwLrHcXL2dLClUgSMSxbmwnGOVVwyZUXpZ Fm8UX6YcpD/CYxcPZYL2pPgIgp9xzLtFzKe5gEg2cciqdAm/H4eKEh+IKf5nYTnd/Cqx hYyX/kNaaWZih+NazPp5D4RgXJsbwq9Is6igJinwZMllGnt8PliH7n5nGHMv4cA0btT1 HAGKvTYmWYt+e7rL8XlW1Uh+Y19VPmFy3wliTYr+TmGvPL5mwj8+Hhbz5rkcJ6RVjnWj L/9A== X-Gm-Message-State: AOJu0YyTl1vWxC5sQ7mopQ/Mn1dsl1kAwEZ6K1oJow4wcllxZTGWLUhd UdGjeF0TndEmyvcxe92ON4by+bUYDTw1Sd0LbRXolc4t X-Google-Smtp-Source: AGHT+IGZklR6vmwx+I1m2TYBs5iOwsPLRBe+Obf/CId5PwS12y8h+KZFNQQ9tDvt0rDzC8/Y2ewakQ== X-Received: by 2002:a05:6512:31cd:b0:503:1722:bf3a with SMTP id j13-20020a05651231cd00b005031722bf3amr5986480lfe.1.1695127568502; Tue, 19 Sep 2023 05:46:08 -0700 (PDT) Received: from otso.luca.vpn.lucaweiss.eu (static-212-193-78-212.thenetworkfactory.nl. [212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:08 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:46:00 +0200 Subject: [PATCH v2 6/7] dt-bindings: arm: qcom: Add QCM6490 Fairphone 5 MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-6-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Fairphone 5 is a smartphone based on the QCM6490 SoC. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index adbfaea32343..76934f4772e9 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -50,6 +50,7 @@ description: | msm8998 qcs404 qcm2290 + qcm6490 qdu1000 qrb2210 qrb4210 @@ -391,6 +392,11 @@ properties: - const: qcom,qrb2210 - const: qcom,qcm2290 + - items: + - enum: + - fairphone,fp5 + - const: qcom,qcm6490 + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform items: - enum: From patchwork Tue Sep 19 12:46:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 13391352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D65DCD5BAD for ; Tue, 19 Sep 2023 12:46:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232243AbjISMqb (ORCPT ); Tue, 19 Sep 2023 08:46:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230021AbjISMqV (ORCPT ); Tue, 19 Sep 2023 08:46:21 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99C0D18C for ; Tue, 19 Sep 2023 05:46:11 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-52f3ba561d9so12244761a12.1 for ; Tue, 19 Sep 2023 05:46:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1695127569; x=1695732369; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=J44mZzWjQyY1guglcmUOa5cmciPRQKQkNeefCkSp08A=; b=dQzijmKIQZU/DWx+nl5pOGQbuq554HYV09wFnsj86BsLYiPWrPfHiZn/lJdMeEsh6Z ERDMuFIGvQf6B2ik8PRwcCL0/CJIMUyCQSul76Se4XNC4CrMnDFyKZNanCO6dclVkNGL A0VMlXqOP/TVXH8sRVYaNhSVQgQXGVy6Oy4ZkA8v8icW8awI/u7p0Cm8cSlKZyv/0v/5 CPoNtqtOfy+XH5J+x3/0Ol+tZXLxxI13SySCblLiJHgV1zKrM8KxQH/DsELNNes4Mnbn 93uPNkYMxUy5z4hW3B3ObGi+njOPLqrhCuj54ayZfc9nAAWpouA2UCMOcsen0bZjQPkH HPbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695127569; x=1695732369; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J44mZzWjQyY1guglcmUOa5cmciPRQKQkNeefCkSp08A=; b=vrELWOMQdTTEPDCwtsL7VTM/ZzdOiKOQ2cGRFZCM/tSjZ9X8soTLIwNc2a1phLYsr5 7qsemyrlVaOBCtmiR2cXu1lJsTW3ipaSIia3ROEU5Iwy8lYw4lyD06IFdASHcLKTkcXk V2kpvxQ3kM/Sje9wuVRz0H6DY/4wq1tQFZXT+O4GSAVaF8CdmOVbLcz/VdPND2qIXZ5T jZfp8Kpf0e3Sn59lJA6eBuLAjuZTdJJzxSqbzVW0hIcVZBI/b4WCwac7Ba7AnQ3xfMJs O1CfIBUaAxKUxGAOGOi2friGt+40lFqst+8lItkarvaY3MTz3MAhdvOrxMF/27HWcZqD hJAA== X-Gm-Message-State: AOJu0YzAZ0MbB6BaLUVRVD6WUYhDXlIOYrsUuqrejKsbhwbuywVNcIln Y3O4dUpHdsj16iuBcx3seo2r0w== X-Google-Smtp-Source: AGHT+IHQMNE23HrtgbzNtTxFGBN8cvuf8F9XbyH4kQzKk5u+UrPBPmrVhk08wnaiUMi/pdqbhEgWVw== X-Received: by 2002:a05:6402:3583:b0:530:493:359f with SMTP id y3-20020a056402358300b005300493359fmr3440381edc.12.1695127569183; Tue, 19 Sep 2023 05:46:09 -0700 (PDT) Received: from otso.luca.vpn.lucaweiss.eu (static-212-193-78-212.thenetworkfactory.nl. [212.78.193.212]) by smtp.gmail.com with ESMTPSA id dn22-20020a05640222f600b00532c1dfe8ecsm635878edb.66.2023.09.19.05.46.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 05:46:08 -0700 (PDT) From: Luca Weiss Date: Tue, 19 Sep 2023 14:46:01 +0200 Subject: [PATCH v2 7/7] arm64: dts: qcom: qcm6490: Add device-tree for Fairphone 5 MIME-Version: 1.0 Message-Id: <20230919-fp5-initial-v2-7-14bb7cedadf5@fairphone.com> References: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> In-Reply-To: <20230919-fp5-initial-v2-0-14bb7cedadf5@fairphone.com> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Linus Walleij , "Rafael J. Wysocki" , Viresh Kumar Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add device tree for the Fairphone 5 smartphone which is based on the QCM6490 SoC. Supported features are, as of now: * Bluetooth * Debug UART * Display via simplefb * Flash/torch LED * Flip cover sensor * Power & volume buttons * RTC * SD card * USB * Various plumbing like regulators, i2c, spi, etc Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Tested-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 667 +++++++++++++++++++++ 2 files changed, 668 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 2cca20563a1d..73c3be0f8872 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-lilac.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcm6490-fairphone-fp5.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts new file mode 100644 index 000000000000..2de0b8c26c35 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts @@ -0,0 +1,667 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023, Luca Weiss + */ + +/dts-v1/; + +/* PM7250B is configured to use SID8/9 */ +#define PM7250B_SID 8 +#define PM7250B_SID1 9 + +#include +#include +#include +#include "sc7280.dtsi" +#include "pm7250b.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" /* PM7350C */ +#include "pmk8350.dtsi" /* PMK7325 */ + +/delete-node/ &rmtfs_mem; + +/ { + model = "Fairphone 5"; + compatible = "fairphone,fp5", "qcom,qcm6490"; + chassis-type = "handset"; + + aliases { + serial0 = &uart5; + serial1 = &uart7; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@a000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0xe1000000 0x0 (2700 * 1224 * 4)>; + width = <1224>; + height = <2700>; + stride = <(1224 * 4)>; + format = "a8r8g8b8"; + clocks = <&gcc GCC_DISP_HF_AXI_CLK>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&volume_down_default>, <&hall_sensor_default>; + pinctrl-names = "default"; + + key-volume-up { + label = "Volume up"; + gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + /* Powered by the always-on vreg_l8c */ + event-hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 155 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + linux,can-disable; + wakeup-source; + }; + }; + + reserved-memory { + cont_splash_mem: cont-splash@e1000000 { + reg = <0x0 0xe1000000 0x0 0x2300000>; + no-map; + }; + + adsp_mem: adsp@86700000 { + reg = <0x0 0x86700000 0x0 0x2800000>; + no-map; + }; + + cdsp_mem: cdsp@88f00000 { + reg = <0x0 0x88f00000 0x0 0x1e00000>; + no-map; + }; + + mpss_mem: mpss@8b800000 { + reg = <0x0 0x8b800000 0x0 0xf600000>; + no-map; + }; + + wpss_mem: wpss@9ae00000 { + reg = <0x0 0x9ae00000 0x0 0x1900000>; + no-map; + }; + + rmtfs_mem: memory@f8500000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0xf8500000 0x0 0x600000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = , ; + }; + }; + + ois_avdd0_1p8: regulator-ois-avdd0-1p8 { + compatible = "regulator-fixed"; + regulator-name = "OIS_AVDD0_1P8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vreg_bob>; + }; + + ois_dvdd_1p1: regulator-ois-dvdd-1p1 { + compatible = "regulator-fixed"; + regulator-name = "OIS_DVDD_1P1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + gpio = <&tlmm 97 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vreg_s8b>; + }; + + afvdd_2p8: regulator-afvdd-2p8 { + compatible = "regulator-fixed"; + regulator-name = "AFVDD_2P8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&tlmm 68 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vreg_bob>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id = "b"; + + vreg_s1b: smps1 { + regulator-min-microvolt = <1840000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7b: smps7 { + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s8b: smps8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = ; + }; + + vreg_l1b: ldo1 { + regulator-min-microvolt = <825000>; + regulator-max-microvolt = <925000>; + regulator-initial-mode = ; + }; + + vreg_l2b: ldo2 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l3b: ldo3 { + regulator-min-microvolt = <312000>; + regulator-max-microvolt = <910000>; + regulator-initial-mode = ; + }; + + vreg_l6b: ldo6 { + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + }; + + vreg_l7b: ldo7 { + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8b: ldo8 { + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + }; + + vreg_l9b: ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l11b: ldo11 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l12b: ldo12 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = ; + }; + + vreg_l13b: ldo13 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = ; + }; + + vreg_l14b: ldo14 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l15b: ldo15 { + regulator-min-microvolt = <765000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = ; + }; + + vreg_l16b: ldo16 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + }; + + vreg_l17b: ldo17 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = ; + }; + + vreg_l18b: ldo18 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l19b: ldo19 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s1c: smps1 { + regulator-min-microvolt = <2190000>; + regulator-max-microvolt = <2210000>; + regulator-initial-mode = ; + }; + + vreg_s9c: smps9 { + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + regulator-initial-mode = ; + }; + + vreg_l1c: ldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l2c: ldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1950000>; + regulator-initial-mode = ; + }; + + vreg_l3c: ldo3 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + regulator-initial-mode = ; + }; + + vreg_l4c: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l5c: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l6c: ldo6 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7c: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8c: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + /* Hall sensor VDD */ + regulator-always-on; + }; + + vreg_l9c: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l10c: ldo10 { + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + }; + + vreg_l11c: ldo11 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l12c: ldo12 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l13c: ldo13 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + }; +}; + +&dispcc { + /* Disable for now so simple-framebuffer continues working */ + status = "disabled"; +}; + +&gcc { + protected-clocks = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + /* PM8008 PMIC @ 8 and 9 */ + /* Pixelworks @ 26 */ + /* FSA4480 USB audio switch @ 42 */ + /* AW86927FCR haptics @ 5a */ +}; + +&i2c2 { + status = "okay"; + + /* AW88261FCR amplifier @ 34 */ + /* AW88261FCR amplifier @ 35 */ +}; + +&i2c4 { + status = "okay"; + + /* PTN36502 USB redriver @ 1a */ +}; + +&i2c9 { + status = "okay"; + + /* ST21NFC NFC @ 28 */ + /* VL53L3 ToF @ 29 */ +}; + +&ipa { + qcom,gsi-loader = "self"; + memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/qcm6490/fairphone5/ipa_fws.mdt"; + status = "okay"; +}; + +&pm7325_gpios { + volume_down_default: volume-down-default-state { + pins = "gpio6"; + function = PMIC_GPIO_FUNC_NORMAL; + power-source = <1>; + bias-pull-up; + input-enable; + }; +}; + +&pm8350c_flash { + status = "okay"; + + led-0 { + function = LED_FUNCTION_FLASH; + color = ; + led-sources = <1>, <4>; + led-max-microamp = <500000>; + flash-max-microamp = <1500000>; + flash-max-timeout-us = <1280000>; + }; +}; + +&pmk8350_rtc { + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + linux,code = ; + status = "okay"; +}; + +&qup_spi13_cs { + drive-strength = <6>; + bias-disable; +}; + +&qup_spi13_data_clk { + drive-strength = <6>; + bias-disable; +}; + +&qup_uart5_rx { + drive-strength = <2>; + bias-disable; +}; + +&qup_uart5_tx { + drive-strength = <2>; + bias-disable; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&sdc2_clk { + drive-strength = <16>; + bias-disable; +}; + +&sdc2_cmd { + drive-strength = <10>; + bias-pull-up; +}; + +&sdc2_data { + drive-strength = <10>; + bias-pull-up; +}; + +&sdhc_2 { + vmmc-supply = <&vreg_l9c>; + vqmmc-supply = <&vreg_l6c>; + + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>; + + status = "okay"; +}; + +&spi13 { + status = "okay"; + + /* Goodix touchscreen @ 0 */ +}; + +&tlmm { + /* + * 32-33: SMB1394 (SPMI) + * 56-59: fingerprint reader (SPI) + */ + gpio-reserved-ranges = <32 2>, <56 4>; + + bluetooth_enable_default: bluetooth-enable-default-state { + pins = "gpio85"; + function = "gpio"; + output-low; + bias-disable; + }; + + hall_sensor_default: hall-sensor-default-state { + pins = "gpio155"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { + pins = "gpio28"; + function = "gpio"; + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; + }; + + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { + pins = "gpio29"; + function = "gpio"; + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + bias-pull-down; + }; + + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { + pins = "gpio30"; + function = "gpio"; + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + bias-pull-up; + }; + + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { + pins = "gpio31"; + function = "gpio"; + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + bias-pull-up; + }; + + sw_ctrl_default: sw-ctrl-default-state { + pins = "gpio86"; + function = "gpio"; + bias-pull-down; + }; +}; + +&uart5 { + compatible = "qcom,geni-debug-uart"; + status = "okay"; +}; + +&uart7 { + /delete-property/interrupts; + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; + pinctrl-names = "default", "sleep"; + + status = "okay"; + + bluetooth: bluetooth { + compatible = "qcom,wcn6750-bt"; + + pinctrl-0 = <&bluetooth_enable_default>, <&sw_ctrl_default>; + pinctrl-names = "default"; + + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; + + vddio-supply = <&vreg_l19b>; + vddaon-supply = <&vreg_s7b>; + vddbtcxmx-supply = <&vreg_s7b>; + vddrfacmn-supply = <&vreg_s7b>; + vddrfa0p8-supply = <&vreg_s7b>; + vddrfa1p7-supply = <&vreg_s1b>; + vddrfa1p2-supply = <&vreg_s8b>; + vddrfa2p2-supply = <&vreg_s1c>; + vddasd-supply = <&vreg_l11c>; + + max-speed = <3200000>; + }; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l10c>; + vdda18-supply = <&vreg_l1c>; + vdda33-supply = <&vreg_l2b>; + + qcom,hs-crossover-voltage-microvolt = <28000>; + qcom,hs-output-impedance-micro-ohms = <2600000>; + qcom,hs-rise-fall-time-bp = <5430>; + qcom,hs-disconnect-bp = <1743>; + qcom,hs-amplitude-bp = <2430>; + + qcom,pre-emphasis-amplitude-bp = <20000>; + qcom,pre-emphasis-duration-bp = <20000>; + + qcom,squelch-detector-bp = <(-2090)>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l6b>; + vdda-pll-supply = <&vreg_l1b>; + + status = "okay"; +};