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Tue, 19 Sep 2023 16:28:07 +0000 From: Joey Gouly To: CC: , , , Subject: [PATCH v1 1/2] arm64: add FEAT_LRCPC3 HWCAP Date: Tue, 19 Sep 2023 17:27:56 +0100 Message-ID: <20230919162757.2707023-2-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230919162757.2707023-1-joey.gouly@arm.com> References: <20230919162757.2707023-1-joey.gouly@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT025:EE_|AM7PR08MB5304:EE_|VI1EUR03FT028:EE_|DB9PR08MB6457:EE_ X-MS-Office365-Filtering-Correlation-Id: 2deb9b9e-ca51-4551-97c9-08dbb92d81ba x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: McLAcS3q1O/p794eJjxQ/U7pI8177mqWOPzLD53O1gnds/5+a+5YmLHySoKBI8e4No518TRjwlykJBrxdUCNiwVro2EencNw6qOOzy+ddIDQsML2V/SPhqE508Ahp2CfdVdJAbu6P4Qi2XX1uSSASAYfsx5jdvxeVKmKWpYZnFTdz8geg+zNWX8GE/6fCrRlatfDMmQYpIHGedRoNZXWhAAoKL48v/Z33OX3H9nGB0fDUw97FdLSDSKhNJpFJCXvw4DuC578AE1IsBHb1dX4U+3LgvcsXRMRxHSjxxQ3jdlm5zXYU0LcJabizcjGR60HDBk4dPiek/HtluGQ+nmFVSNXDtcoty5Ay11DiA94meI8YnHfbd+3cui07nkAz0CbyZI5jYWQKrBN22JUSCuryP9s7KAvIukkNn88zsP8p+OIWYw0t0uIkwlTCBpTGiSooog49L6Axry47/o1Tr7u0WUUCVodSxwYJ5DAea68bWVssLqsgcVIdy2jjWFZb9dx3OzJC4mKlq0kNm4Pu5ixDTkJ34agfeXVcOFDGUovrfoWExhlm4DilS0R1LolBd7FS0TUfYqyzbUNJ8Tq6SdCf3C7V+Cx3hfr+M8ylRtJktwspEyv/czKeoB/YgDCE0kDjcbI7zrhAZsUJZpr79urqJvZLvVbuNNX2jsBdNdKxAlFrYBcpNB+qksY/aYjRYOpJUiTP9mArwsPfB5S3ulSqCV5jAyeEsRr0Bd/HljUCUnRrykK7+QEvAMdn4V/cuM+ X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(396003)(136003)(39850400004)(346002)(451199024)(1800799009)(186009)(82310400011)(46966006)(36840700001)(6666004)(7696005)(1076003)(82740400003)(40480700001)(356005)(86362001)(81166007)(36756003)(36860700001)(26005)(4326008)(47076005)(2906002)(426003)(478600001)(6916009)(8936002)(8676002)(5660300002)(2616005)(316002)(41300700001)(44832011)(54906003)(70206006)(336012)(70586007)(36900700001);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Sep 2023 16:28:50.3119 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2deb9b9e-ca51-4551-97c9-08dbb92d81ba X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VI1EUR03FT028.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6457 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230919_094331_355467_8075E7F8 X-CRM114-Status: GOOD ( 11.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org FEAT_LRCPC3 adds more instructions to support the Release Consistency model. Add a HWCAP so that userspace can make decisions about instructions it can use. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- Documentation/arch/arm64/elf_hwcaps.rst | 3 +++ arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 1 + arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/tools/sysreg | 1 + 6 files changed, 8 insertions(+) diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst index 76ff9d7398fd..3cc1d7662f0a 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -308,6 +308,9 @@ HWCAP2_MOPS HWCAP2_HBC Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001. +HWCAP2_LRCPC3 + Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0011. + 4. Unused AT_HWCAP bits ----------------------- diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 521267478d18..802e74cdb6ad 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -139,6 +139,7 @@ #define KERNEL_HWCAP_SME_F16F16 __khwcap2_feature(SME_F16F16) #define KERNEL_HWCAP_MOPS __khwcap2_feature(MOPS) #define KERNEL_HWCAP_HBC __khwcap2_feature(HBC) +#define KERNEL_HWCAP_LRCPC3 __khwcap2_feature(LRCPC3) /* * This yields a mask that user programs can use to figure out what diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h index 53026f45a509..5d24fdc8f5b4 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -104,5 +104,6 @@ #define HWCAP2_SME_F16F16 (1UL << 42) #define HWCAP2_MOPS (1UL << 43) #define HWCAP2_HBC (1UL << 44) +#define HWCAP2_LRCPC3 (1UL << 45) #endif /* _UAPI__ASM_HWCAP_H */ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 444a73c2e638..5f6c8389ff43 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2807,6 +2807,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { HWCAP_CAP(ID_AA64ISAR1_EL1, FCMA, IMP, CAP_HWCAP, KERNEL_HWCAP_FCMA), HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, IMP, CAP_HWCAP, KERNEL_HWCAP_LRCPC), HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, LRCPC2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC), + HWCAP_CAP(ID_AA64ISAR1_EL1, LRCPC, LRCPC3, CAP_HWCAP, KERNEL_HWCAP_LRCPC3), HWCAP_CAP(ID_AA64ISAR1_EL1, FRINTTS, IMP, CAP_HWCAP, KERNEL_HWCAP_FRINT), HWCAP_CAP(ID_AA64ISAR1_EL1, SB, IMP, CAP_HWCAP, KERNEL_HWCAP_SB), HWCAP_CAP(ID_AA64ISAR1_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_BF16), diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 98fda8500535..4b8a06c9cbe3 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -127,6 +127,7 @@ static const char *const hwcap_str[] = { [KERNEL_HWCAP_SME_F16F16] = "smef16f16", [KERNEL_HWCAP_MOPS] = "mops", [KERNEL_HWCAP_HBC] = "hbc", + [KERNEL_HWCAP_LRCPC3] = "lrcpc3", }; #ifdef CONFIG_COMPAT diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 76ce150e7347..aa701aa56c0f 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -1305,6 +1305,7 @@ UnsignedEnum 23:20 LRCPC 0b0000 NI 0b0001 IMP 0b0010 LRCPC2 + 0b0011 LRCPC3 EndEnum UnsignedEnum 19:16 FCMA 0b0000 NI From patchwork Tue Sep 19 16:27:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13391598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26770CE79A9 for ; Tue, 19 Sep 2023 16:29:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Sep 2023 16:28:41.9550 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3c3a515-78bc-4a06-4625-08dbb92d7cb8 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT038.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB9094 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230919_092847_966004_AB914345 X-CRM114-Status: GOOD ( 12.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a test for the newly added HWCAP2_LRCPC3. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- tools/testing/selftests/arm64/abi/hwcap.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index e3d262831d91..19d548b74111 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -289,6 +289,19 @@ static void uscat_sigbus(void) asm volatile(".inst 0xb820003f" : : : ); } +static void lrcpc3_sigill(void) +{ + int data[2] = { 1, 2 }; + + register int *src asm ("x0") = data; + register int data0 asm ("w2") = 0; + register int data1 asm ("w3") = 0; + + /* LDIAPP w2, w3, [x0] */ + asm volatile(".inst 0x99431802" + : "=r" (data0), "=r" (data1) : "r" (src) :); +} + static const struct hwcap_data { const char *name; unsigned long at_hwcap; @@ -348,6 +361,13 @@ static const struct hwcap_data { .cpuinfo = "ilrcpc", .sigill_fn = ilrcpc_sigill, }, + { + .name = "LRCPC3", + .at_hwcap = AT_HWCAP2, + .hwcap_bit = HWCAP2_LRCPC3, + .cpuinfo = "lrcpc3", + .sigill_fn = lrcpc3_sigill, + }, { .name = "LSE", .at_hwcap = AT_HWCAP,