From patchwork Thu Sep 28 14:36:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Ferre X-Patchwork-Id: 13403197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF9D4E732DE for ; Thu, 28 Sep 2023 14:38:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=zFDcHDHnntIl3Z65szBCBvOFQvl2bpbCsbIEukJQW1Y=; b=4iBOvUb1PVQZsw wEyN8FzPP3TtdaKCd8VxtCVYTf2VVJjohkI83j/Q88LGkoWgJNNbGxdT/QSzeFpLhUgghHFIlfNfp m6MdDT5kD5PEg1DfVZrAyPFRTlNEPhJg2LJcW4jabLTRPCLc2AbHDmGzM9G8TJBuYCEUiVIVZ3T/Q c5hCJiHOXAJMDQLDPcbDfRW8cHcLdI3gFyYCtPcPGHSDVwDF9NW5x9m9wKqdnU2A/Feqla1OwV/wt MVBhOrauSMUD09UZpRmiC1NW2ijuQrcwYYFbSdHGO8qwELezJ0iCoL/ivtKCGAdVxWKbZbB7Jn6Rk rsyL3tTd1PZxF/fbC7UA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qls9F-004xAi-2X; Thu, 28 Sep 2023 14:37:49 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qls9B-004x5t-2v for linux-arm-kernel@lists.infradead.org; Thu, 28 Sep 2023 14:37:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1695911865; x=1727447865; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=VX9nwVrqBkZ7pbyV1snJDbtj8uP2ZRcb8DPHidThz1s=; b=jn7qSpjAkXNP6DPykkgdGKuqwgDh54jHFB45rkYmp68wvd6XjpNHnH9l I1oDLjWhS+rj2iIalr1CNEB1IfSmlptHZ1ECIni0Fh8DjY6LnbhxBup+h uNZzWllCrlQFZUb9muRCOcpHyosldX2Wf3MO7kJijlpd9/JN9A5Q1Tb4f cqO7AtfEVJi9FhJjt2ky29UNCxn2yx7NAMLHVCbdqCs292VTFuW1/zzBe VvNtEpx8x4vGSBmtZQkmdIKVEinyhNfOXrilQhIi8OiOENAsyV/H8FQ0U brybUop53otaITYfuZSyWXwTvKI5fDWAesbbVST9po38R+as6kk/jH1tP g==; X-CSE-ConnectionGUID: Xa7eooHcQCaStKetqeRDsQ== X-CSE-MsgGUID: yGN/veqWQmCaCtwapdt2aQ== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="7359184" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 28 Sep 2023 07:37:40 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 28 Sep 2023 07:37:10 -0700 Received: from ROU-LL-M43238.home (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 28 Sep 2023 07:37:08 -0700 From: To: Claudiu Beznea , CC: Alexandre Belloni , , , Tudor Ambarus Subject: [PATCH] ARM: dts: at91: sam9x60_curiosity: Add mandatory dt property for RTT Date: Thu, 28 Sep 2023 16:36:44 +0200 Message-ID: <20230928143644.208515-1-nicolas.ferre@microchip.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230928_073746_079033_692F59EC X-CRM114-Status: GOOD ( 10.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Tudor Ambarus atmel,rtt-rtc-time-reg is a mandatory property and encodes the GPBR register used to store the time base when the RTT is used as an RTC. Align the RTT with what's currently done for sam9x60ek and sama7g5ek, and enable it by default even if RTC is also enabled. Signed-off-by: Tudor Ambarus [nicolas.ferre@microchip.com: adapt to newer kernel] Signed-off-by: Nicolas Ferre Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts index cb86a3a170ce..83372c1f291b 100644 --- a/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts @@ -439,6 +439,10 @@ &pwm0 { status = "okay"; }; +&rtt { + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; +}; + &sdmmc0 { bus-width = <4>; pinctrl-names = "default";