From patchwork Thu Sep 28 17:33:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Levitsky X-Patchwork-Id: 13403357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 526BBE732FE for ; Thu, 28 Sep 2023 17:34:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231976AbjI1Re6 (ORCPT ); Thu, 28 Sep 2023 13:34:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbjI1Re4 (ORCPT ); Thu, 28 Sep 2023 13:34:56 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C48D195 for ; Thu, 28 Sep 2023 10:34:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1695922450; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oOqP2ppbORxupNPRbUHGH6nf4SvE0P2uUesTtFRc8Ik=; b=FZT/E3pOWqsQ1PGe7FiamhZKRvhJrb9CjbCv50Vqu6n7bRTMnWOmiZIpeksb95fm0nrMa6 27TJr4vY5TNHxtq/buyx4OcXVwXlJABdvrTpLy/YJi0eMCJBTKEsGnav5kiAHN+0Q7Pxcs 4g/1cK2eMvnf+z1jTOzTAtUIxnOT/Mw= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-436-Df1GUGMiNMW4qntqZxmpqQ-1; Thu, 28 Sep 2023 13:34:04 -0400 X-MC-Unique: Df1GUGMiNMW4qntqZxmpqQ-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 6EBE92810D42; Thu, 28 Sep 2023 17:34:03 +0000 (UTC) Received: from localhost.localdomain (unknown [10.45.226.141]) by smtp.corp.redhat.com (Postfix) with ESMTP id 723E314171B6; Thu, 28 Sep 2023 17:33:59 +0000 (UTC) From: Maxim Levitsky To: kvm@vger.kernel.org Cc: iommu@lists.linux.dev, "H. Peter Anvin" , Sean Christopherson , Maxim Levitsky , Paolo Bonzini , Thomas Gleixner , Borislav Petkov , Joerg Roedel , x86@kernel.org, Suravee Suthikulpanit , linux-kernel@vger.kernel.org, Dave Hansen , Will Deacon , Ingo Molnar , Robin Murphy , stable@vger.kernel.org Subject: [PATCH v2 1/4] x86: KVM: SVM: always update the x2avic msr interception Date: Thu, 28 Sep 2023 20:33:51 +0300 Message-Id: <20230928173354.217464-2-mlevitsk@redhat.com> In-Reply-To: <20230928173354.217464-1-mlevitsk@redhat.com> References: <20230928173354.217464-1-mlevitsk@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The following problem exists since x2avic was enabled in the KVM: svm_set_x2apic_msr_interception is called to enable the interception of the x2apic msrs. In particular it is called at the moment the guest resets its apic. Assuming that the guest's apic was in x2apic mode, the reset will bring it back to the xapic mode. The svm_set_x2apic_msr_interception however has an erroneous check for '!apic_x2apic_mode()' which prevents it from doing anything in this case. As a result of this, all x2apic msrs are left unintercepted, and that exposes the bare metal x2apic (if enabled) to the guest. Oops. Remove the erroneous '!apic_x2apic_mode()' check to fix that. This fixes CVE-2023-5090 Fixes: 4d1d7942e36a ("KVM: SVM: Introduce logic to (de)activate x2AVIC mode") Cc: stable@vger.kernel.org Signed-off-by: Maxim Levitsky Reviewed-by: Sean Christopherson Reviewed-by: Suravee Suthikulpanit Tested-by: Suravee Suthikulpanit --- arch/x86/kvm/svm/svm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 9507df93f410a63..acdd0b89e4715a3 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -913,8 +913,7 @@ void svm_set_x2apic_msr_interception(struct vcpu_svm *svm, bool intercept) if (intercept == svm->x2avic_msrs_intercepted) return; - if (!x2avic_enabled || - !apic_x2apic_mode(svm->vcpu.arch.apic)) + if (!x2avic_enabled) return; for (i = 0; i < MAX_DIRECT_ACCESS_MSRS; i++) { From patchwork Thu Sep 28 17:33:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Levitsky X-Patchwork-Id: 13403358 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7F4CE732FE for ; Thu, 28 Sep 2023 17:35:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232026AbjI1RfF (ORCPT ); Thu, 28 Sep 2023 13:35:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231987AbjI1RfE (ORCPT ); Thu, 28 Sep 2023 13:35:04 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65D0B1A3 for ; Thu, 28 Sep 2023 10:34:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1695922455; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y+xDOUzJP3Y3bm7S22bgnNGRpZTJ9N7w9x7x0py/CUU=; b=Ldy/92f4ocWdQ62/st8UfCJUcEBT6Il+zzipLW4bycrYNvzPNdReZ5yOPJXRgy3KMFaPj2 w44WZHkqZCRAonAbED0snMuWUa4FvB7mDDsshghqJJp4Ml4+o9NHHVy3HLiSmiPhDLCYJu fSFFgFxH3eRZwvZOmXP6UMgH7lq80qM= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-518-HV-dXwYNNUe7OoOnepqTxw-1; Thu, 28 Sep 2023 13:34:10 -0400 X-MC-Unique: HV-dXwYNNUe7OoOnepqTxw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 460F429AA386; Thu, 28 Sep 2023 17:34:07 +0000 (UTC) Received: from localhost.localdomain (unknown [10.45.226.141]) by smtp.corp.redhat.com (Postfix) with ESMTP id C356214171CA; Thu, 28 Sep 2023 17:34:03 +0000 (UTC) From: Maxim Levitsky To: kvm@vger.kernel.org Cc: iommu@lists.linux.dev, "H. Peter Anvin" , Sean Christopherson , Maxim Levitsky , Paolo Bonzini , Thomas Gleixner , Borislav Petkov , Joerg Roedel , x86@kernel.org, Suravee Suthikulpanit , linux-kernel@vger.kernel.org, Dave Hansen , Will Deacon , Ingo Molnar , Robin Murphy , stable@vger.kernel.org Subject: [PATCH v2 2/4] x86: KVM: SVM: add support for Invalid IPI Vector interception Date: Thu, 28 Sep 2023 20:33:52 +0300 Message-Id: <20230928173354.217464-3-mlevitsk@redhat.com> In-Reply-To: <20230928173354.217464-1-mlevitsk@redhat.com> References: <20230928173354.217464-1-mlevitsk@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org In later revisions of AMD's APM, there is a new 'incomplete IPI' exit code: "Invalid IPI Vector - The vector for the specified IPI was set to an illegal value (VEC < 16)" Note that tests on Zen2 machine show that this VM exit doesn't happen and instead AVIC just does nothing. Add support for this exit code by doing nothing, instead of filling the kernel log with errors. Also replace an unthrottled 'pr_err()' if another unknown incomplete IPI exit happens with vcpu_unimpl() (e.g in case AMD adds yet another 'Invalid IPI' exit reason) Cc: Signed-off-by: Maxim Levitsky Reviewed-by: Sean Christopherson --- arch/x86/include/asm/svm.h | 1 + arch/x86/kvm/svm/avic.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 19bf955b67e0da0..3ac0ffc4f3e202b 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -268,6 +268,7 @@ enum avic_ipi_failure_cause { AVIC_IPI_FAILURE_TARGET_NOT_RUNNING, AVIC_IPI_FAILURE_INVALID_TARGET, AVIC_IPI_FAILURE_INVALID_BACKING_PAGE, + AVIC_IPI_FAILURE_INVALID_IPI_VECTOR, }; #define AVIC_PHYSICAL_MAX_INDEX_MASK GENMASK_ULL(8, 0) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 2092db892d7d052..4b74ea91f4e6bb6 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -529,8 +529,11 @@ int avic_incomplete_ipi_interception(struct kvm_vcpu *vcpu) case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE: WARN_ONCE(1, "Invalid backing page\n"); break; + case AVIC_IPI_FAILURE_INVALID_IPI_VECTOR: + /* Invalid IPI with vector < 16 */ + break; default: - pr_err("Unknown IPI interception\n"); + vcpu_unimpl(vcpu, "Unknown avic incomplete IPI interception\n"); } return 1; From patchwork Thu Sep 28 17:33:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Levitsky X-Patchwork-Id: 13403359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED65ECE7B06 for ; Thu, 28 Sep 2023 17:35:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231987AbjI1RfG (ORCPT ); Thu, 28 Sep 2023 13:35:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232005AbjI1RfF (ORCPT ); Thu, 28 Sep 2023 13:35:05 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFC0AE5 for ; Thu, 28 Sep 2023 10:34:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1695922457; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jEwA8CyX78/GkMVoiAVbpRnGMlV0gBkCqcXscfLzkHs=; b=AibIh1zeF+jQE/xbRMvCpy1Wdvg3LY8HTTRaQ4/hoBdW69EkRvsyaZWA/+FJB1m/la36ib kn4vDh5JqP0FjKFDvgTol5jJOMWiCm0PoR88L8uERgC3MLm2Z+RTvgw+v3y2xxG+jxOcWP iNxl2IFjhYzq+q1NjKZ75LVejtZutVA= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-37-8q4-2IX4M9GzgZ9LF6aO2A-1; Thu, 28 Sep 2023 13:34:12 -0400 X-MC-Unique: 8q4-2IX4M9GzgZ9LF6aO2A-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 1C8F9185A790; Thu, 28 Sep 2023 17:34:11 +0000 (UTC) Received: from localhost.localdomain (unknown [10.45.226.141]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9B43D14171CB; Thu, 28 Sep 2023 17:34:07 +0000 (UTC) From: Maxim Levitsky To: kvm@vger.kernel.org Cc: iommu@lists.linux.dev, "H. Peter Anvin" , Sean Christopherson , Maxim Levitsky , Paolo Bonzini , Thomas Gleixner , Borislav Petkov , Joerg Roedel , x86@kernel.org, Suravee Suthikulpanit , linux-kernel@vger.kernel.org, Dave Hansen , Will Deacon , Ingo Molnar , Robin Murphy , stable@vger.kernel.org Subject: [PATCH v2 3/4] x86: KVM: SVM: refresh AVIC inhibition in svm_leave_nested() Date: Thu, 28 Sep 2023 20:33:53 +0300 Message-Id: <20230928173354.217464-4-mlevitsk@redhat.com> In-Reply-To: <20230928173354.217464-1-mlevitsk@redhat.com> References: <20230928173354.217464-1-mlevitsk@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org svm_leave_nested() similar to a nested VM exit, get the vCPU out of nested mode and thus should end the local inhibition of AVIC on this vCPU. Failure to do so, can lead to hangs on guest reboot. Raise the KVM_REQ_APICV_UPDATE request to refresh the AVIC state of the current vCPU in this case. Fixes: f44509f849fe ("KVM: x86: SVM: allow AVIC to co-exist with a nested guest running") Cc: stable@vger.kernel.org Signed-off-by: Maxim Levitsky Reviewed-by: Sean Christopherson --- arch/x86/kvm/svm/nested.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index dd496c9e5f91f28..3fea8c47679e689 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -1253,6 +1253,9 @@ void svm_leave_nested(struct kvm_vcpu *vcpu) nested_svm_uninit_mmu_context(vcpu); vmcb_mark_all_dirty(svm->vmcb); + + if (kvm_apicv_activated(vcpu->kvm)) + kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu); } kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu); From patchwork Thu Sep 28 17:33:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Levitsky X-Patchwork-Id: 13403360 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF221E732FD for ; Thu, 28 Sep 2023 17:35:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232180AbjI1RfP (ORCPT ); Thu, 28 Sep 2023 13:35:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232064AbjI1RfK (ORCPT ); Thu, 28 Sep 2023 13:35:10 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66B621A8 for ; Thu, 28 Sep 2023 10:34:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1695922458; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bXvR8P30J13RoiFY6oQnabnLblTIM5XWqXhOKK4pnys=; b=GNVoOK68fxuwRpWEU0gGVssNSe7YrBBahM4wQ8iGCi9zDi0tvfhemYUHhHlhWoigcxV5ub bplwDOix2JPAfB1MPKgmgEWLLJQgzoHqYf/4Ot/j7QIF9b7qvmTnJraTb4s+ZdsEUtWVJR Jb1k/MwPfkLSzJy9u8OR7p6hU/Z+dUE= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-527-dV2krgcqMdaXISgjC_sr8Q-1; Thu, 28 Sep 2023 13:34:15 -0400 X-MC-Unique: dV2krgcqMdaXISgjC_sr8Q-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id B8A308015AB; Thu, 28 Sep 2023 17:34:14 +0000 (UTC) Received: from localhost.localdomain (unknown [10.45.226.141]) by smtp.corp.redhat.com (Postfix) with ESMTP id 710B814171B6; Thu, 28 Sep 2023 17:34:11 +0000 (UTC) From: Maxim Levitsky To: kvm@vger.kernel.org Cc: iommu@lists.linux.dev, "H. Peter Anvin" , Sean Christopherson , Maxim Levitsky , Paolo Bonzini , Thomas Gleixner , Borislav Petkov , Joerg Roedel , x86@kernel.org, Suravee Suthikulpanit , linux-kernel@vger.kernel.org, Dave Hansen , Will Deacon , Ingo Molnar , Robin Murphy Subject: [PATCH v2 4/4] x86: KVM: SVM: workaround for AVIC's errata #1235 Date: Thu, 28 Sep 2023 20:33:54 +0300 Message-Id: <20230928173354.217464-5-mlevitsk@redhat.com> In-Reply-To: <20230928173354.217464-1-mlevitsk@redhat.com> References: <20230928173354.217464-1-mlevitsk@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Zen2 (and likely on Zen1 as well), AVIC doesn't reliably detect a change in the 'is_running' bit during ICR write emulation and might skip a VM exit, if that bit was recently cleared. The absence of the VM exit, leads to the KVM not waking up / triggering nested vm exit on the target(s) of the IPI which can, in some cases, lead to an unbounded delays in the guest execution. As I recently discovered, a reasonable workaround exists: make the KVM never set the is_running bit. This workaround ensures that (*) all ICR writes always cause a VM exit and therefore correctly emulated, in expense of never enjoying VM exit-less ICR emulation. This workaround does carry a performance penalty but according to my benchmarks is still much better than not using AVIC at all, because AVIC is still used for the receiving end of the IPIs, and for the posted interrupts. If the user is aware of the errata and it doesn't affect his workload, the user can disable the workaround with 'avic_zen2_errata_workaround=0' (*) More correctly all ICR writes except when 'Self' shorthand is used: In this case AVIC skips reading physid table and just sets bits in IRR of local APIC. Thankfully in this case, the errata is not possible, therefore an extra workaround for this case is not needed. Signed-off-by: Maxim Levitsky --- arch/x86/kvm/svm/avic.c | 63 +++++++++++++++++++++++++++++------------ arch/x86/kvm/svm/svm.h | 1 + 2 files changed, 46 insertions(+), 18 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 4b74ea91f4e6bb6..28bb0e6b321660d 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -62,6 +62,9 @@ static_assert(__AVIC_GATAG(AVIC_VM_ID_MASK, AVIC_VCPU_ID_MASK) == -1u); static bool force_avic; module_param_unsafe(force_avic, bool, 0444); +static int avic_zen2_errata_workaround = -1; +module_param(avic_zen2_errata_workaround, int, 0444); + /* Note: * This hash table is used to map VM_ID to a struct kvm_svm, * when handling AMD IOMMU GALOG notification to schedule in @@ -276,7 +279,7 @@ static u64 *avic_get_physical_id_entry(struct kvm_vcpu *vcpu, static int avic_init_backing_page(struct kvm_vcpu *vcpu) { - u64 *entry, new_entry; + u64 *entry; int id = vcpu->vcpu_id; struct vcpu_svm *svm = to_svm(vcpu); @@ -308,10 +311,10 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu) if (!entry) return -EINVAL; - new_entry = __sme_set((page_to_phys(svm->avic_backing_page) & - AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK) | - AVIC_PHYSICAL_ID_ENTRY_VALID_MASK); - WRITE_ONCE(*entry, new_entry); + svm->avic_physical_id_entry = __sme_set((page_to_phys(svm->avic_backing_page) & + AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK) | + AVIC_PHYSICAL_ID_ENTRY_VALID_MASK); + WRITE_ONCE(*entry, svm->avic_physical_id_entry); svm->avic_physical_id_cache = entry; @@ -835,7 +838,7 @@ static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi) * will update the pCPU info when the vCPU awkened and/or scheduled in. * See also avic_vcpu_load(). */ - entry = READ_ONCE(*(svm->avic_physical_id_cache)); + entry = READ_ONCE(svm->avic_physical_id_entry); if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) amd_iommu_update_ga(entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK, true, pi->ir_data); @@ -1027,7 +1030,6 @@ avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r) void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu) { - u64 entry; int h_physical_id = kvm_cpu_get_apicid(cpu); struct vcpu_svm *svm = to_svm(vcpu); unsigned long flags; @@ -1056,14 +1058,23 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu) */ spin_lock_irqsave(&svm->ir_list_lock, flags); - entry = READ_ONCE(*(svm->avic_physical_id_cache)); - WARN_ON_ONCE(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK); - entry &= ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK; - entry |= (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK); - entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK; + WARN_ON_ONCE(svm->avic_physical_id_entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK); + + svm->avic_physical_id_entry &= ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK; + svm->avic_physical_id_entry |= + (h_physical_id & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK); + + svm->avic_physical_id_entry |= AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK; + + /* + * Do not update the actual physical id table entry if workaround + * for #1235 - the physical ID entry is_running is never set when + * the workaround is activated + */ + if (!avic_zen2_errata_workaround) + WRITE_ONCE(*(svm->avic_physical_id_cache), svm->avic_physical_id_entry); - WRITE_ONCE(*(svm->avic_physical_id_cache), entry); avic_update_iommu_vcpu_affinity(vcpu, h_physical_id, true); spin_unlock_irqrestore(&svm->ir_list_lock, flags); @@ -1071,7 +1082,6 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu) void avic_vcpu_put(struct kvm_vcpu *vcpu) { - u64 entry; struct vcpu_svm *svm = to_svm(vcpu); unsigned long flags; @@ -1084,10 +1094,9 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu) * can't be scheduled out and thus avic_vcpu_{put,load}() can't run * recursively. */ - entry = READ_ONCE(*(svm->avic_physical_id_cache)); /* Nothing to do if IsRunning == '0' due to vCPU blocking. */ - if (!(entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)) + if (!(svm->avic_physical_id_entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)) return; /* @@ -1102,8 +1111,14 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu) avic_update_iommu_vcpu_affinity(vcpu, -1, 0); - entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK; - WRITE_ONCE(*(svm->avic_physical_id_cache), entry); + svm->avic_physical_id_entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK; + + /* + * Do not update the actual physical id table entry + * See explanation in avic_vcpu_load + */ + if (!avic_zen2_errata_workaround) + WRITE_ONCE(*(svm->avic_physical_id_cache), svm->avic_physical_id_entry); spin_unlock_irqrestore(&svm->ir_list_lock, flags); @@ -1217,5 +1232,17 @@ bool avic_hardware_setup(void) amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier); + if (avic_zen2_errata_workaround == -1) { + + /* Assume that Zen1 and Zen2 have errata #1235 */ + if (boot_cpu_data.x86 == 0x17) + avic_zen2_errata_workaround = 1; + else + avic_zen2_errata_workaround = 0; + } + + if (avic_zen2_errata_workaround) + pr_info("Workaround for AVIC errata #1235 is enabled\n"); + return true; } diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index be67ab7fdd104e3..98dc45b9c194d2e 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -265,6 +265,7 @@ struct vcpu_svm { u32 ldr_reg; u32 dfr_reg; struct page *avic_backing_page; + u64 avic_physical_id_entry; u64 *avic_physical_id_cache; /*