From patchwork Wed Oct 4 07:16:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zev Weiss X-Patchwork-Id: 13408284 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6384CE8FDD4 for ; Wed, 4 Oct 2023 07:17:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=+FMS0YG2ZVCpuqtrziOXbue5vjDJ20vD7Jlvn20vrgc=; b=KUHp5L/T27bRpe 7nx0ZjIllJVTi0Ib04V8yETADuRIHIakWMaB/efCFkO3TaXbwSGQObCNbBS8ilb1taP/zB7F/oCj2 lC67t3XdEB1+YjAVPmAIpEDT/kPi/lAAwjlhF+qCJHPF27pVKRCsj+aR5kjamF8UIheGYTp22EO0S PrWquZTxrJmbOZ/YELq45BAqPdUDjzC64BQXBdkC4rE8CrqIWP8o3z1mDECEPaMiEBiquuuAEG4Sj OJntba817UOtYyZzPWCBjvMZgJOPdWKgVw8z76ap7oXp2pVEHxfbL9B4vEn0rqyv/dS2ikc4CRqHE 3I4d48YS6k225f1erUig==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qnw7o-00GZDM-0O; Wed, 04 Oct 2023 07:16:52 +0000 Received: from thorn.bewilderbeest.net ([71.19.156.171]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qnw7k-00GZC4-2c for linux-arm-kernel@lists.infradead.org; Wed, 04 Oct 2023 07:16:50 +0000 Received: from hatter.bewilderbeest.net (unknown [IPv6:2602:61:7e5d:5300::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: zev) by thorn.bewilderbeest.net (Postfix) with ESMTPSA id DAF71DD9; Wed, 4 Oct 2023 00:16:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bewilderbeest.net; s=thorn; t=1696403803; bh=yFCKItcXGPE1Q+oFb43qALwVs7ooi/Pj1fioqFcF6gw=; h=From:To:Cc:Subject:Date:From; b=hadfSUMfsGJ2vkIP/x8ARWUdzgF/1O22W2p3kl7aFETYKCgQYjqWYD8dd+u5IMAAb QwIJfiO2YOrAUYq9LkkngRKjaINpWN+x9ECkRf7URPtuomY/zTeiNAxm2O2wvooZcE b7E7qQkbbCzfQW+29dD3HVZmiKypiBPXXo7HwIbY= From: Zev Weiss To: Andrew Jeffery , Linus Walleij , Joel Stanley , linux-aspeed@lists.ozlabs.org Cc: Zev Weiss , openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] pinctrl: aspeed: Allow changing hardware strap defaults Date: Wed, 4 Oct 2023 00:16:06 -0700 Message-ID: <20231004071605.21323-2-zev@bewilderbeest.net> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231004_001648_855062_D0D8703C X-CRM114-Status: GOOD ( 18.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Previously we've generally assumed that the defaults in the hardware strapping register are in fact appropriate for the system and thus have avoided making any changes to its contents (with the exception of the bits controlling the GPIO passthrough feature). Unfortunately, on some platforms corrections from software are required as the hardware strapping is simply incorrect for the system (such as the SPI1 interface being configured for passthrough mode when master mode is in fact the only useful configuration for it). We thus remove the checks preventing changes to the strap register so that the pinctrl subsystem can be used for such corrections. Signed-off-by: Zev Weiss --- drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 21 --------------------- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 21 --------------------- drivers/pinctrl/aspeed/pinmux-aspeed.h | 3 --- 3 files changed, 45 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c index bfed0e274643..7ecfe3e4280e 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c @@ -2556,27 +2556,6 @@ static int aspeed_g4_sig_expr_set(struct aspeed_pinmux_data *ctx, if (!ctx->maps[desc->ip]) return -ENODEV; - /* - * Strap registers are configured in hardware or by early-boot - * firmware. Treat them as read-only despite that we can write - * them. This may mean that certain functions cannot be - * deconfigured and is the reason we re-evaluate after writing - * all descriptor bits. - * - * Port D and port E GPIO loopback modes are the only exception - * as those are commonly used with front-panel buttons to allow - * normal operation of the host when the BMC is powered off or - * fails to boot. Once the BMC has booted, the loopback mode - * must be disabled for the BMC to control host power-on and - * reset. - */ - if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 && - !(desc->mask & (BIT(21) | BIT(22)))) - continue; - - if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2) - continue; - ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg, desc->mask, val); diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c index 4c0d26606b6c..3e57e76c2eb7 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c @@ -2735,27 +2735,6 @@ static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx, return PTR_ERR(map); } - /* - * Strap registers are configured in hardware or by early-boot - * firmware. Treat them as read-only despite that we can write - * them. This may mean that certain functions cannot be - * deconfigured and is the reason we re-evaluate after writing - * all descriptor bits. - * - * Port D and port E GPIO loopback modes are the only exception - * as those are commonly used with front-panel buttons to allow - * normal operation of the host when the BMC is powered off or - * fails to boot. Once the BMC has booted, the loopback mode - * must be disabled for the BMC to control host power-on and - * reset. - */ - if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 && - !(desc->mask & (BIT(21) | BIT(22)))) - continue; - - if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2) - continue; - /* On AST2500, Set bits in SCU70 are cleared from SCU7C */ if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) { u32 value = ~val & desc->mask; diff --git a/drivers/pinctrl/aspeed/pinmux-aspeed.h b/drivers/pinctrl/aspeed/pinmux-aspeed.h index aaa78a613196..e9068acd5879 100644 --- a/drivers/pinctrl/aspeed/pinmux-aspeed.h +++ b/drivers/pinctrl/aspeed/pinmux-aspeed.h @@ -16,9 +16,6 @@ * bits. Some difficulty arises as the pin's function bit masks for each * priority level are frequently not the same (i.e. cannot just flip a bit to * change from a high to low priority signal), or even in the same register. - * Further, not all signals can be unmuxed, as some expressions depend on - * values in the hardware strapping register (which may be treated as - * read-only). * * SoC Multi-function Pin Expression Examples * ------------------------------------------