From patchwork Thu Oct 12 17:58:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419592 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08635C41513 for ; Thu, 12 Oct 2023 17:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347362AbjJLR6t (ORCPT ); Thu, 12 Oct 2023 13:58:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347361AbjJLR6r (ORCPT ); Thu, 12 Oct 2023 13:58:47 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BEEADD; Thu, 12 Oct 2023 10:58:45 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-533d31a8523so2241482a12.1; Thu, 12 Oct 2023 10:58:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133523; x=1697738323; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rzfQcNKj9bFAhiJUmlpF+2fxTSAfgcm+jA7Xbn+UotE=; b=GZgP84BAMHBUCuyVy7UPztMjRSFQRh0NVBaZCHLuTu/j83A823G17Cs3fPcvNRyK54 0DTEviAsE03lX+MZak1zVJUoGwWUnf0q5ar3A/SHWu7RGVoEza0nJkQ582YeHe0uX7lV E5UZbx0+BHIV4pLBs05FcIkR/y2u/jxa+RAvLTWJHzH4xTdPfD8jc7SUZckwGYdjlAUt i8ZqjsffFhZf3NFmaPddXNy8Q2DFtkxRDZSJwjoGZW9huijAHCUCXkGHBTS62DZcVZ4m QZTAzv0bJ2OI061iaqyJNDHl7pGPT16LBOwWI5VwAelXNBeGzsxB3ba59d0+gQ1Kb/Xm /aEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133523; x=1697738323; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rzfQcNKj9bFAhiJUmlpF+2fxTSAfgcm+jA7Xbn+UotE=; b=g7fpWagXc+ZajaLQEVueHnzbL03ilm+A+h6unufy2XPleXFtkJwxToOZwl5ycS5e4u J681xJ06YfWrMQGbxkkAb8kVMca4KUL6o/6KaZEws3pVRlRdR4r+1Tg1jCSWuP++Mqaw O/92rLDiu8TYjQaN5jyaf2aRsSDQHHbItZ0E3AUKY21psmsDfvLoGS0Yc0Yw6JBoF/mr ANqzj+amqLXT2vFOLXr29KQL2CaeHMPCH3yMpbSCWE8Qq2Y5rprICHVReqgIa797gJ5c atxhk5Be+XfcjVZRHYz6McA1WhQ6CRzKRnQLUHxwDgjZN450EsqgamGWmImLY5MIWUA2 YPZA== X-Gm-Message-State: AOJu0YwQDeoI1c1EUqXQn4u2XTN9ig29VFMu6alohkieLIlWyDNUCufe 3KerCMXZqC2xDHVr/F6EFuU= X-Google-Smtp-Source: AGHT+IEua/WFR915wZmoKm8hk19cT/0O73wXX5UGg5ABN0p51b0mmwjhzlXpiVlTLsQMoPYPDDV4TA== X-Received: by 2002:a05:6402:50c7:b0:53d:ed7a:11f2 with SMTP id h7-20020a05640250c700b0053ded7a11f2mr4792289edb.38.1697133523129; Thu, 12 Oct 2023 10:58:43 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id ee48-20020a056402293000b0053120f313cbsm3652326edb.39.2023.10.12.10.58.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:42 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 01/13] thermal: Store device tree node for thermal zone devices Date: Thu, 12 Oct 2023 19:58:22 +0200 Message-ID: <20231012175836.3408077-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding Store the device tree node for each thermal zone device to allow it to be referenced. Signed-off-by: Thierry Reding --- Changes in v2: - new patch to track thermal zone device tree nodes drivers/thermal/thermal_of.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c index db83596ea105..2acb65e97090 100644 --- a/drivers/thermal/thermal_of.c +++ b/drivers/thermal/thermal_of.c @@ -443,6 +443,7 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz) struct thermal_zone_device_ops *ops = tz->ops; thermal_zone_device_disable(tz); + of_node_put(tz->device.of_node); thermal_zone_device_unregister(tz); kfree(trips); kfree(ops); @@ -521,6 +522,8 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node * goto out_kfree_trips; } + tz->device.of_node = np; + ret = thermal_zone_device_enable(tz); if (ret) { pr_err("Failed to enabled thermal zone '%s', id=%d: %d\n", From patchwork Thu Oct 12 17:58:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419593 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9133BCDB47E for ; Thu, 12 Oct 2023 17:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379631AbjJLR6u (ORCPT ); Thu, 12 Oct 2023 13:58:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347367AbjJLR6s (ORCPT ); Thu, 12 Oct 2023 13:58:48 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A1DFDE; Thu, 12 Oct 2023 10:58:46 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-9a9f139cd94so201469366b.2; Thu, 12 Oct 2023 10:58:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133525; x=1697738325; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Na7qEhQMzmgECrh7kCLViTW0+wjTG3BvT0gTVRTb1co=; b=cKB13n2yKiBD/+PeliRSCVQYcidNla4SJ8EDGAsYzS2/32zgNBqo5nhj7zdmbdyevP 6OLJoKfqisvvIQ+IGJ/Yri8+idaHbc4G2hhjGMbNVf5Ou0sqeN20GvbxR0XzzEAR6tgB OMSDXI1gFF2YGrqDxMIAweyr6BEhW3C63JFOUSky17x8tTj0xW3tTblms8gDZxOZYrAF vB/uP2H2LeMHVzlrAdwmJehXLpPq2GSJtK1GU2Lncd2o2oSoOjmx7UtO5zInVsErpuUE ydZOpEImveOqnlDQ3S2bLE1fjLQlYBXwHtqLt2LnDvxakfSMby9FUeLLeiwTcBcp0sKU IVqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133525; x=1697738325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Na7qEhQMzmgECrh7kCLViTW0+wjTG3BvT0gTVRTb1co=; b=KNclR0pOen7fgix9c80TCBLF4VfSt4OiK9g8aCCQt5tSL5/w7z68oKdQnOBXHuHv2r qymt4IgAvKo0V5sLz1St+yK4x82MJ5Gszd6idKfg60QnwORD18Uce7C37JyEA+4EB362 CO2cuwU8xjSZErkq+2YA3dGBxPrHJ1lKnqcz7SW7VOEBd1hjWQdGa27y1MAcLtqyWnOO WCw2l4DIhFk/mfzVha8kkYLiAh7WD2nSi6bwdWMOKNZQpuB0yvYIxZAG/ojRKqwB3j77 TuHIm35cqEzM3sHctSQ8GXKFcIurhEWZ5s++7vRG0qxS+Wa/G7T0W9GxYDtn2/Jq0ghq X5tw== X-Gm-Message-State: AOJu0YyDrkrjKV+c0YlNBBcUg/puCRiSXGCxFEo93L60v2asLE0OmJGT B9Q7LdzUUCbZrMOJNOVaM8o= X-Google-Smtp-Source: AGHT+IFsGm9j0df0xfB5g2DVVwguqau1uG6sbL8fG+3Kle7Qv1Kxdj2UGMlkZhbvgbFmTlKGn6hrfw== X-Received: by 2002:a17:907:1b11:b0:9ae:6ffd:bdf7 with SMTP id mp17-20020a1709071b1100b009ae6ffdbdf7mr27150064ejc.39.1697133524718; Thu, 12 Oct 2023 10:58:44 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id p8-20020a170906b20800b009adce1c97ccsm11335626ejz.53.2023.10.12.10.58.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:43 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 02/13] dt-bindings: thermal: tegra: Document throttle temperature Date: Thu, 12 Oct 2023 19:58:23 +0200 Message-ID: <20231012175836.3408077-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding Each throttling configuration needs to specify the temperature threshold at which it should start throttling. Previously this was tied to a given trip point as a cooling device and used the temperature specified for that trip point. This doesn't work well because the throttling mechanism is not a cooling device in the traditional sense. Instead, allow device trees to specify the throttle temperature in the throttle configuration directly so that the throttle doesn't need to be exposed as a cooling device. Signed-off-by: Thierry Reding --- Changes in v2: - rename temperature to temperature-millicelsius and drop $ref - add hysteresis-millicelsius property .../bindings/thermal/nvidia,tegra124-soctherm.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml index 04a2ba1aa946..0eb6277082fe 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml @@ -121,6 +121,20 @@ properties: # high (85%, TEGRA_SOCTHERM_THROT_LEVEL_HIGH) - 3 + temperature-millicelsius: + minimum: -273000 + maximum: 200000 + description: The temperature threshold (in millicelsius) that, + when crossed, will trigger the configured automatic throttling. + + hysteresis-millicelsius: + description: An unsigned integer expressing the hysteresis delta + (in millicelsius) with respect to the threshold temperature + property above. Throttling will be initiated when the + temperature falls below (temperature - hysteresis). This avoids + situations where throttling is repeatedly initiated and stopped + because of minor temperature variations. + # optional # Tegra210 specific and valid only for OCx throttle events nvidia,count-threshold: From patchwork Thu Oct 12 17:58:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419594 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CE89CDB483 for ; Thu, 12 Oct 2023 17:58:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379687AbjJLR6u (ORCPT ); Thu, 12 Oct 2023 13:58:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379619AbjJLR6t (ORCPT ); Thu, 12 Oct 2023 13:58:49 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0276D8; Thu, 12 Oct 2023 10:58:47 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-99de884ad25so206765366b.3; Thu, 12 Oct 2023 10:58:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133526; x=1697738326; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=q0oAnve8cYc6KUjHI3njmCc6tg17dGeZJbr4s0kltN4=; b=eCUgyGRjbmBQe+ufO9CcZlZKJsyDZREV7zke4FYsstlJLTrGnKhbhLp8K0eend7eOR 8G60IoblsvcKOjAaWKh6wFgLfcsJw5e6FDmsTulUpGQrPmAiq7EFnRxIT+RW987TEU+V u4ZOc2TcpgzX9XHxGSDukZ52Zc9ag91mn42m2mb4Q6X8AiBXUE3DtP72K7m5930plhoh p/t6imtkPZUtbs5FmXibUrs0i2yKpoWkGDp4XA5Z0/LpPdurJnZ/sKst/2jik9YM3FsA pwSAcxTGOHI3CqLcFhnH74UFHRoxU1iF34OUAQ0+Ut6zYwaq6wtfarVtzw1fv62mqG9M G1XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133526; x=1697738326; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q0oAnve8cYc6KUjHI3njmCc6tg17dGeZJbr4s0kltN4=; b=j3EIosEyr7hIUCszoyjUYh+ZsPaqL6JO3FAIL9+snwchSpqUdANQqJsFbPardiRqHL 6KClHEhvgQbCjh4YAtFAWNNDPjr9AcDDKdCdKnRDRIh4dlv3tV2DdO/o+Str3sPRR00b +yavrIo0IqNXU3BEhlTpfS9VlshLflt2rrYf9Jahg5/B/VEoybg+sWvPWBHJo+VVCU5l JwVO9AvjrKsWE0Yrjn6uRXTMvQQMxrOZ6acYb4W426EyrE0xo8V9A4qmFXx6UcQNK2nI 44/1vCogCMJLWtWL82/Hdag3bMBLqY2Kk1R5CjxntJ1OcdWcz9UTSx3mvHYEyTJcPhRe ybvg== X-Gm-Message-State: AOJu0YzxjDKAIFF2JCUTtSOhkwZM1ZkaLgL9MMQSa6BkUzHi+tvxUBVC WQ1hzEByXuL3dwQ7LZZOAqU= X-Google-Smtp-Source: AGHT+IHUvOSGncrYRjOb3iBZVORaW42pRMEajVW1II2lJOQdf4sSfG5bya02H7M4bbLWVKlGnkSIbA== X-Received: by 2002:a17:906:104e:b0:9b2:ba65:db21 with SMTP id j14-20020a170906104e00b009b2ba65db21mr23301796ejj.45.1697133526122; Thu, 12 Oct 2023 10:58:46 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id a24-20020a170906685800b009828e26e519sm11283686ejs.122.2023.10.12.10.58.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:45 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 03/13] dt-bindings: thermal: tegra: Add nvidia,thermal-zones property Date: Thu, 12 Oct 2023 19:58:24 +0200 Message-ID: <20231012175836.3408077-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding The throttle configurations need to be associated with one or more thermal zones before they can be enabled, so introduce a new property, called nvidia,thermal-zones, that contains a list of phandles to the thermal zones for which a throttle configuration is applicable. Signed-off-by: Thierry Reding --- Changes in v2: - new patch to hook up throttling with thermal zones .../bindings/thermal/nvidia,tegra124-soctherm.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml index 0eb6277082fe..359344f60a6e 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml @@ -161,6 +161,11 @@ properties: throttling is engaged after the OC event is deasserted. default: 0 + nvidia,thermal-zones: + $ref: /schemas/types.yaml#/definitions/phandle + description: A list of phandles to the thermal zones that this + throttle configuration applies to. + # optional nvidia,thermtrips: $ref: /schemas/types.yaml#/definitions/uint32-matrix From patchwork Thu Oct 12 17:58:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419596 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 305D0C41513 for ; Thu, 12 Oct 2023 17:59:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442093AbjJLR7B (ORCPT ); Thu, 12 Oct 2023 13:59:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379671AbjJLR6w (ORCPT ); Thu, 12 Oct 2023 13:58:52 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3391CB8; Thu, 12 Oct 2023 10:58:49 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-5347e657a11so2039652a12.2; Thu, 12 Oct 2023 10:58:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133527; x=1697738327; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sul7VIEtKmE6Ca4YfS1+LkRAlSPAG09Y67S7vqcXqTY=; b=VVGP+9yBjbQnhGI4nAX9o7w7Mw2v7lK7kP7EyyLnC4D3w/cTX8KR21WLKpzBEIFeCI oWFlEdXvz3hqnl42CX3EeoHL/vWWdu1oVbCmsRvlZGR1ou/3vx5qLg+aD0DDyOUs8ZIx iyRua6n5QYydNekneo61KGwMJPSMRoAT10oBNxxnge2KrOLDSPX2Lebmt/w+Pwv3MtRk GNDhdfJC5UkaG4qFww6fRf3e5tPa+svjCRoVwaIk1jR+9sC+MT0HVQu0j+97FYNhpC8v 8IUB+s3yYZhiB5hWJvO6wzbbTz2YJekQhS9Qmn4PpDiZUvg4h1958S5eEJV4zENDhClT CJHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133527; x=1697738327; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sul7VIEtKmE6Ca4YfS1+LkRAlSPAG09Y67S7vqcXqTY=; b=UhfdFCrH98y5rO1kC25fCe/BZWibG62+O4DngIuarDQR9L/O1pBeE/3fSWWduRvqpn Obhis0bNrMqmu87tKhhPq3vvZvvr07HaJ1cHQdckpuxtdXaISFecg2JdaFW0zRkxQ1Ar g8AYUyn1vjNvLBMDj4pYkIcbxsdVytoE1XGJYuqc0z8Dwx12piS9mP8psrXrFqD+nzg3 Q35VNVS6hL2XuyemJZLu689N1Y7W02/F9T5GKs6g/cV6EF7BUQ2hxbpQX7Gv7TlQB23t O+Dj9s5sW2Gqo/uD11ZeGA965Y4pGMIORJgphJHC38GS+CXgkohJQIH4uZNnwE+UKRhI N/bQ== X-Gm-Message-State: AOJu0YyJWv4iAp41icrogPfa3Qe1lD5jErWL29c4xaD7I1fz0jscDpUX JagriA0rnIOVeZ19deNukiI= X-Google-Smtp-Source: AGHT+IG7ySSfvPXg82HUmFgUA1OoZ7PFPJxrAMwD/Y8NJcjqqQTX/DkgJubwU0voepnoyCNphYiWag== X-Received: by 2002:aa7:c607:0:b0:530:7abf:3a84 with SMTP id h7-20020aa7c607000000b005307abf3a84mr20393321edq.25.1697133527523; Thu, 12 Oct 2023 10:58:47 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id bd19-20020a056402207300b0053e31113ff7sm193004edb.94.2023.10.12.10.58.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:46 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 04/13] thermal: tegra: Use driver-private data consistently Date: Thu, 12 Oct 2023 19:58:25 +0200 Message-ID: <20231012175836.3408077-5-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding Instead of passing around platform and plain devices and figuring out the driver-private data within each helper, directly pass around the driver-private data when it's available. Also store a pointer to the parent device in the main driver-private data structure for easier access. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 213 ++++++++++++++----------------- 1 file changed, 95 insertions(+), 118 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index e7fe8683bfc5..f434e141dcdf 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -299,7 +299,6 @@ static const char *const throt_names[] = { struct tegra_soctherm; struct tegra_thermctl_zone { void __iomem *reg; - struct device *dev; struct tegra_soctherm *ts; struct thermal_zone_device *tz; const struct tegra_tsensor_group *sg; @@ -327,6 +326,7 @@ struct soctherm_throt_cfg { }; struct tegra_soctherm { + struct device *dev; struct reset_control *reset; struct clk *clock_tsensor; struct clk *clock_soctherm; @@ -444,14 +444,15 @@ static int tegra_thermctl_get_temp(struct thermal_zone_device *tz, int *out_temp * * Return: The precision adjusted capped temperature in millicelsius. */ -static int enforce_temp_range(struct device *dev, int trip_temp) +static int enforce_temp_range(struct tegra_soctherm *ts, int trip_temp) { int temp; temp = clamp_val(trip_temp, min_low_temp, max_high_temp); if (temp != trip_temp) - dev_dbg(dev, "soctherm: trip temperature %d forced to %d\n", + dev_dbg(ts->dev, "trip temperature %d forced to %d\n", trip_temp, temp); + return temp; } @@ -471,18 +472,17 @@ static int enforce_temp_range(struct device *dev, int trip_temp) * * Return: 0 upon success, or %-EINVAL upon failure. */ -static int thermtrip_program(struct device *dev, +static int thermtrip_program(struct tegra_soctherm *ts, const struct tegra_tsensor_group *sg, int trip_temp) { - struct tegra_soctherm *ts = dev_get_drvdata(dev); int temp; u32 r; if (!sg || !sg->thermtrip_threshold_mask) return -EINVAL; - temp = enforce_temp_range(dev, trip_temp) / ts->soc->thresh_grain; + temp = enforce_temp_range(ts, trip_temp) / ts->soc->thresh_grain; r = readl(ts->regs + THERMCTL_THERMTRIP_CTL); r = REG_SET_MASK(r, sg->thermtrip_threshold_mask, temp); @@ -496,7 +496,7 @@ static int thermtrip_program(struct device *dev, /** * throttrip_program() - Configures the hardware to throttle the * pulse if a given sensor group reaches a given temperature - * @dev: ptr to the struct device for the SOC_THERM IP block + * @ts: pointer to a struct tegra_soctherm * @sg: pointer to the sensor group to set the thermtrip temperature for * @stc: pointer to the throttle need to be triggered * @trip_temp: the temperature in millicelsius to trigger the thermal trip at @@ -510,12 +510,11 @@ static int thermtrip_program(struct device *dev, * * Return: 0 upon success, or %-EINVAL upon failure. */ -static int throttrip_program(struct device *dev, +static int throttrip_program(struct tegra_soctherm *ts, const struct tegra_tsensor_group *sg, struct soctherm_throt_cfg *stc, int trip_temp) { - struct tegra_soctherm *ts = dev_get_drvdata(dev); int temp, cpu_throt, gpu_throt; unsigned int throt; u32 r, reg_off; @@ -523,7 +522,7 @@ static int throttrip_program(struct device *dev, if (!sg || !stc || !stc->init) return -EINVAL; - temp = enforce_temp_range(dev, trip_temp) / ts->soc->thresh_grain; + temp = enforce_temp_range(ts, trip_temp) / ts->soc->thresh_grain; /* Hardcode LIGHT on LEVEL1 and HEAVY on LEVEL2 */ throt = stc->id; @@ -536,7 +535,7 @@ static int throttrip_program(struct device *dev, cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_HEAVY; gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_HEAVY; if (throt != THROTTLE_HEAVY) - dev_warn(dev, + dev_warn(ts->dev, "invalid throt id %d - assuming HEAVY", throt); } @@ -588,7 +587,6 @@ static int tegra_thermctl_set_trip_temp(struct thermal_zone_device *tz, int trip struct tegra_soctherm *ts = zone->ts; struct thermal_trip trip; const struct tegra_tsensor_group *sg = zone->sg; - struct device *dev = zone->dev; int ret; if (!tz) @@ -605,7 +603,7 @@ static int tegra_thermctl_set_trip_temp(struct thermal_zone_device *tz, int trip * if not, program critical trip to HW. */ if (min_low_temp == tsensor_group_thermtrip_get(ts, sg->id)) - return thermtrip_program(dev, sg, temp); + return thermtrip_program(ts, sg, temp); else return 0; @@ -625,7 +623,7 @@ static int tegra_thermctl_set_trip_temp(struct thermal_zone_device *tz, int trip else continue; - return throttrip_program(dev, sg, stc, temp); + return throttrip_program(ts, sg, stc, temp); } } @@ -667,9 +665,9 @@ static int tegra_thermctl_set_trips(struct thermal_zone_device *tz, int lo, int r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 0); writel(r, zone->ts->regs + zone->sg->thermctl_lvl0_offset); - lo = enforce_temp_range(zone->dev, lo) / zone->ts->soc->thresh_grain; - hi = enforce_temp_range(zone->dev, hi) / zone->ts->soc->thresh_grain; - dev_dbg(zone->dev, "%s hi:%d, lo:%d\n", __func__, hi, lo); + lo = enforce_temp_range(zone->ts, lo) / zone->ts->soc->thresh_grain; + hi = enforce_temp_range(zone->ts, hi) / zone->ts->soc->thresh_grain; + dev_dbg(zone->ts->dev, "%s hi:%d, lo:%d\n", __func__, hi, lo); r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_up_thresh_mask, hi); r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_dn_thresh_mask, lo); @@ -731,11 +729,10 @@ static int get_hot_temp(struct thermal_zone_device *tz, int *trip_id, int *temp) * this one appears on the serial console: * ""throttrip: will throttle when sensor group XXX reaches YYYYYY mC" */ -static int tegra_soctherm_set_hwtrips(struct device *dev, +static int tegra_soctherm_set_hwtrips(struct tegra_soctherm *ts, const struct tegra_tsensor_group *sg, struct thermal_zone_device *tz) { - struct tegra_soctherm *ts = dev_get_drvdata(dev); struct soctherm_throt_cfg *stc; int i, trip, temperature, ret; @@ -745,18 +742,19 @@ static int tegra_soctherm_set_hwtrips(struct device *dev, if (thermal_zone_get_crit_temp(tz, &temperature)) temperature = max_high_temp; - ret = thermtrip_program(dev, sg, temperature); + ret = thermtrip_program(ts, sg, temperature); if (ret) { - dev_err(dev, "thermtrip: %s: error during enable\n", sg->name); + dev_err(ts->dev, "thermtrip: %s: error during enable\n", + sg->name); return ret; } - dev_info(dev, "thermtrip: will shut down when %s reaches %d mC\n", + dev_info(ts->dev, "thermtrip: will shut down when %s reaches %d mC\n", sg->name, temperature); ret = get_hot_temp(tz, &trip, &temperature); if (ret) { - dev_info(dev, "throttrip: %s: missing hot temperature\n", + dev_info(ts->dev, "throttrip: %s: missing hot temperature\n", sg->name); return 0; } @@ -773,21 +771,21 @@ static int tegra_soctherm_set_hwtrips(struct device *dev, else continue; - ret = throttrip_program(dev, sg, stc, temperature); + ret = throttrip_program(ts, sg, stc, temperature); if (ret) { - dev_err(dev, "throttrip: %s: error during enable\n", + dev_err(ts->dev, "throttrip: %s: error during enable\n", sg->name); return ret; } - dev_info(dev, + dev_info(ts->dev, "throttrip: will throttle when %s reaches %d mC\n", sg->name, temperature); break; } if (i == THROTTLE_SIZE) - dev_info(dev, "throttrip: %s: missing throttle cdev\n", + dev_info(ts->dev, "throttrip: %s: missing throttle cdev\n", sg->name); return 0; @@ -1253,8 +1251,7 @@ static int soctherm_oc_int_init(struct device_node *np, int num_irqs) #ifdef CONFIG_DEBUG_FS static int regs_show(struct seq_file *s, void *data) { - struct platform_device *pdev = s->private; - struct tegra_soctherm *ts = platform_get_drvdata(pdev); + struct tegra_soctherm *ts = s->private; const struct tegra_tsensor *tsensors = ts->soc->tsensors; const struct tegra_tsensor_group **ttgs = ts->soc->ttgs; u32 r, state; @@ -1449,24 +1446,24 @@ static int regs_show(struct seq_file *s, void *data) DEFINE_SHOW_ATTRIBUTE(regs); -static void soctherm_debug_init(struct platform_device *pdev) +static void soctherm_debug_init(struct tegra_soctherm *tegra) { - struct tegra_soctherm *tegra = platform_get_drvdata(pdev); struct dentry *root; root = debugfs_create_dir("soctherm", NULL); tegra->debugfs_dir = root; - debugfs_create_file("reg_contents", 0644, root, pdev, ®s_fops); + debugfs_create_file("reg_contents", 0644, root, tegra, ®s_fops); } #else -static inline void soctherm_debug_init(struct platform_device *pdev) {} +static inline void soctherm_debug_init(struct tegra_soctherm *ts) +{ +} #endif -static int soctherm_clk_enable(struct platform_device *pdev, bool enable) +static int soctherm_clk_enable(struct tegra_soctherm *tegra, bool enable) { - struct tegra_soctherm *tegra = platform_get_drvdata(pdev); int err; if (!tegra->clock_soctherm || !tegra->clock_tsensor) @@ -1531,10 +1528,8 @@ static const struct thermal_cooling_device_ops throt_cooling_ops = { .set_cur_state = throt_set_cdev_state, }; -static int soctherm_thermtrips_parse(struct platform_device *pdev) +static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) { - struct device *dev = &pdev->dev; - struct tegra_soctherm *ts = dev_get_drvdata(dev); struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; const int max_num_prop = ts->soc->num_ttgs * 2; u32 *tlb; @@ -1543,22 +1538,22 @@ static int soctherm_thermtrips_parse(struct platform_device *pdev) if (!tt) return -ENOMEM; - n = of_property_count_u32_elems(dev->of_node, "nvidia,thermtrips"); + n = of_property_count_u32_elems(ts->dev->of_node, "nvidia,thermtrips"); if (n <= 0) { - dev_info(dev, + dev_info(ts->dev, "missing thermtrips, will use critical trips as shut down temp\n"); return n; } n = min(max_num_prop, n); - tlb = devm_kcalloc(&pdev->dev, max_num_prop, sizeof(u32), GFP_KERNEL); + tlb = devm_kcalloc(ts->dev, max_num_prop, sizeof(u32), GFP_KERNEL); if (!tlb) return -ENOMEM; - ret = of_property_read_u32_array(dev->of_node, "nvidia,thermtrips", + ret = of_property_read_u32_array(ts->dev->of_node, "nvidia,thermtrips", tlb, n); if (ret) { - dev_err(dev, "invalid num ele: thermtrips:%d\n", ret); + dev_err(ts->dev, "invalid num ele: thermtrips:%d\n", ret); return ret; } @@ -1575,9 +1570,9 @@ static int soctherm_thermtrips_parse(struct platform_device *pdev) return 0; } -static void soctherm_oc_cfg_parse(struct device *dev, - struct device_node *np_oc, - struct soctherm_throt_cfg *stc) +static void soctherm_oc_cfg_parse(struct tegra_soctherm *tegra, + struct device_node *np_oc, + struct soctherm_throt_cfg *stc) { u32 val; @@ -1601,19 +1596,20 @@ static void soctherm_oc_cfg_parse(struct device *dev, stc->oc_cfg.mode = OC_THROTTLE_MODE_BRIEF; } -static int soctherm_throt_cfg_parse(struct device *dev, +static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, struct device_node *np, struct soctherm_throt_cfg *stc) { - struct tegra_soctherm *ts = dev_get_drvdata(dev); int ret; u32 val; ret = of_property_read_u32(np, "nvidia,priority", &val); if (ret) { - dev_err(dev, "throttle-cfg: %s: invalid priority\n", stc->name); + dev_err(ts->dev, "throttle-cfg: %s: invalid priority\n", + stc->name); return -EINVAL; } + stc->priority = val; ret = of_property_read_u32(np, ts->soc->use_ccroc ? @@ -1640,7 +1636,7 @@ static int soctherm_throt_cfg_parse(struct device *dev, return 0; err: - dev_err(dev, "throttle-cfg: %s: no throt prop or invalid prop\n", + dev_err(ts->dev, "throttle-cfg: %s: no throt prop or invalid prop\n", stc->name); return -EINVAL; } @@ -1648,25 +1644,23 @@ static int soctherm_throt_cfg_parse(struct device *dev, /** * soctherm_init_hw_throt_cdev() - Parse the HW throttle configurations * and register them as cooling devices. - * @pdev: Pointer to platform_device struct + * @tegra: pointer to Tegra soctherm structure */ -static void soctherm_init_hw_throt_cdev(struct platform_device *pdev) +static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) { - struct device *dev = &pdev->dev; - struct tegra_soctherm *ts = dev_get_drvdata(dev); struct device_node *np_stc, *np_stcc; const char *name; int i; for (i = 0; i < THROTTLE_SIZE; i++) { - ts->throt_cfgs[i].name = throt_names[i]; - ts->throt_cfgs[i].id = i; - ts->throt_cfgs[i].init = false; + tegra->throt_cfgs[i].name = throt_names[i]; + tegra->throt_cfgs[i].id = i; + tegra->throt_cfgs[i].init = false; } - np_stc = of_get_child_by_name(dev->of_node, "throttle-cfgs"); + np_stc = of_get_child_by_name(tegra->dev->of_node, "throttle-cfgs"); if (!np_stc) { - dev_info(dev, + dev_info(tegra->dev, "throttle-cfg: no throttle-cfgs - not enabling\n"); return; } @@ -1677,33 +1671,34 @@ static void soctherm_init_hw_throt_cdev(struct platform_device *pdev) int err; name = np_stcc->name; - stc = find_throttle_cfg_by_name(ts, name); + stc = find_throttle_cfg_by_name(tegra, name); if (!stc) { - dev_err(dev, - "throttle-cfg: could not find %s\n", name); + dev_err(tegra->dev, "throttle-cfg: could not find %s\n", + name); continue; } if (stc->init) { - dev_err(dev, "throttle-cfg: %s: redefined!\n", name); + dev_err(tegra->dev, "throttle-cfg: %s: redefined!\n", + name); of_node_put(np_stcc); break; } - err = soctherm_throt_cfg_parse(dev, np_stcc, stc); + err = soctherm_throt_cfg_parse(tegra, np_stcc, stc); if (err) continue; if (stc->id >= THROTTLE_OC1) { - soctherm_oc_cfg_parse(dev, np_stcc, stc); + soctherm_oc_cfg_parse(tegra, np_stcc, stc); stc->init = true; } else { tcd = thermal_of_cooling_device_register(np_stcc, - (char *)name, ts, + (char *)name, tegra, &throt_cooling_ops); if (IS_ERR_OR_NULL(tcd)) { - dev_err(dev, + dev_err(tegra->dev, "throttle-cfg: %s: failed to register cooling device\n", name); continue; @@ -1711,7 +1706,6 @@ static void soctherm_init_hw_throt_cdev(struct platform_device *pdev) stc->cdev = tcd; stc->init = true; } - } of_node_put(np_stc); @@ -1931,9 +1925,8 @@ static void soctherm_throttle_program(struct tegra_soctherm *ts, writel(r, ts->regs + THROT_PRIORITY_LOCK); } -static void tegra_soctherm_throttle(struct device *dev) +static void tegra_soctherm_throttle(struct tegra_soctherm *ts) { - struct tegra_soctherm *ts = dev_get_drvdata(dev); u32 v; int i; @@ -1969,43 +1962,29 @@ static void tegra_soctherm_throttle(struct device *dev) writel(v, ts->regs + THERMCTL_STATS_CTL); } -static int soctherm_interrupts_init(struct platform_device *pdev, - struct tegra_soctherm *tegra) +static int soctherm_interrupts_init(struct tegra_soctherm *tegra) { - struct device_node *np = pdev->dev.of_node; int ret; - ret = soctherm_oc_int_init(np, TEGRA_SOC_OC_IRQ_MAX); + ret = soctherm_oc_int_init(tegra->dev->of_node, TEGRA_SOC_OC_IRQ_MAX); if (ret < 0) { - dev_err(&pdev->dev, "soctherm_oc_int_init failed\n"); + dev_err(tegra->dev, "soctherm_oc_int_init failed\n"); return ret; } - tegra->thermal_irq = platform_get_irq(pdev, 0); - if (tegra->thermal_irq < 0) { - dev_dbg(&pdev->dev, "get 'thermal_irq' failed.\n"); - return 0; - } - - tegra->edp_irq = platform_get_irq(pdev, 1); - if (tegra->edp_irq < 0) { - dev_dbg(&pdev->dev, "get 'edp_irq' failed.\n"); - return 0; - } - - ret = devm_request_threaded_irq(&pdev->dev, + ret = devm_request_threaded_irq(tegra->dev, tegra->thermal_irq, soctherm_thermal_isr, soctherm_thermal_isr_thread, IRQF_ONESHOT, - dev_name(&pdev->dev), + dev_name(tegra->dev), tegra); if (ret < 0) { - dev_err(&pdev->dev, "request_irq 'thermal_irq' failed.\n"); + dev_err(tegra->dev, "failed to request thermal IRQ: %d\n", ret); return ret; } - ret = devm_request_threaded_irq(&pdev->dev, + ret = devm_request_threaded_irq(tegra->dev, tegra->edp_irq, soctherm_edp_isr, soctherm_edp_isr_thread, @@ -2013,16 +1992,15 @@ static int soctherm_interrupts_init(struct platform_device *pdev, "soctherm_edp", tegra); if (ret < 0) { - dev_err(&pdev->dev, "request_irq 'edp_irq' failed.\n"); + dev_err(tegra->dev, "failed to request EDP IRQ: %d\n", ret); return ret; } return 0; } -static void soctherm_init(struct platform_device *pdev) +static void soctherm_init(struct tegra_soctherm *tegra) { - struct tegra_soctherm *tegra = platform_get_drvdata(pdev); const struct tegra_tsensor_group **ttgs = tegra->soc->ttgs; int i; u32 pdiv, hotspot; @@ -2048,7 +2026,7 @@ static void soctherm_init(struct platform_device *pdev) writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF); /* Configure hw throttle */ - tegra_soctherm_throttle(&pdev->dev); + tegra_soctherm_throttle(tegra); } static const struct of_device_id tegra_soctherm_of_match[] = { @@ -2096,9 +2074,9 @@ static int tegra_soctherm_probe(struct platform_device *pdev) if (!tegra) return -ENOMEM; - mutex_init(&tegra->thermctl_lock); dev_set_drvdata(&pdev->dev, tegra); - + mutex_init(&tegra->thermctl_lock); + tegra->dev = &pdev->dev; tegra->soc = soc; tegra->regs = devm_platform_ioremap_resource_byname(pdev, "soctherm-reg"); @@ -2121,6 +2099,9 @@ static int tegra_soctherm_probe(struct platform_device *pdev) } } + tegra->thermal_irq = platform_get_irq(pdev, 0); + tegra->edp_irq = platform_get_irq(pdev, 1); + tegra->reset = devm_reset_control_get(&pdev->dev, "soctherm"); if (IS_ERR(tegra->reset)) { dev_err(&pdev->dev, "can't get soctherm reset\n"); @@ -2165,15 +2146,15 @@ static int tegra_soctherm_probe(struct platform_device *pdev) if (!tegra->thermctl_tzs) return -ENOMEM; - err = soctherm_clk_enable(pdev, true); + err = soctherm_clk_enable(tegra, true); if (err) return err; - soctherm_thermtrips_parse(pdev); + soctherm_thermtrips_parse(tegra); - soctherm_init_hw_throt_cdev(pdev); + soctherm_init_hw_throt_cdev(tegra); - soctherm_init(pdev); + soctherm_init(tegra); for (i = 0; i < soc->num_ttgs; ++i) { struct tegra_thermctl_zone *zone = @@ -2184,7 +2165,6 @@ static int tegra_soctherm_probe(struct platform_device *pdev) } zone->reg = tegra->regs + soc->ttgs[i]->sensor_temp_offset; - zone->dev = &pdev->dev; zone->sg = soc->ttgs[i]; zone->ts = tegra; @@ -2202,19 +2182,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev) tegra->thermctl_tzs[soc->ttgs[i]->id] = z; /* Configure hw trip points */ - err = tegra_soctherm_set_hwtrips(&pdev->dev, soc->ttgs[i], z); + err = tegra_soctherm_set_hwtrips(tegra, soc->ttgs[i], z); if (err) goto disable_clocks; } - err = soctherm_interrupts_init(pdev, tegra); + err = soctherm_interrupts_init(tegra); - soctherm_debug_init(pdev); + soctherm_debug_init(tegra); return 0; disable_clocks: - soctherm_clk_enable(pdev, false); + soctherm_clk_enable(tegra, false); return err; } @@ -2225,42 +2205,39 @@ static void tegra_soctherm_remove(struct platform_device *pdev) debugfs_remove_recursive(tegra->debugfs_dir); - soctherm_clk_enable(pdev, false); + soctherm_clk_enable(tegra, false); } static int __maybe_unused soctherm_suspend(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); + struct tegra_soctherm *tegra = dev_get_drvdata(dev); - soctherm_clk_enable(pdev, false); + soctherm_clk_enable(tegra, false); return 0; } static int __maybe_unused soctherm_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct tegra_soctherm *tegra = platform_get_drvdata(pdev); + struct tegra_soctherm *tegra = dev_get_drvdata(dev); struct tegra_soctherm_soc *soc = tegra->soc; int err, i; - err = soctherm_clk_enable(pdev, true); + err = soctherm_clk_enable(tegra, true); if (err) { - dev_err(&pdev->dev, - "Resume failed: enable clocks failed\n"); + dev_err(dev, "Resume failed: enable clocks failed\n"); return err; } - soctherm_init(pdev); + soctherm_init(tegra); for (i = 0; i < soc->num_ttgs; ++i) { struct thermal_zone_device *tz; tz = tegra->thermctl_tzs[soc->ttgs[i]->id]; - err = tegra_soctherm_set_hwtrips(dev, soc->ttgs[i], tz); + err = tegra_soctherm_set_hwtrips(tegra, soc->ttgs[i], tz); if (err) { - dev_err(&pdev->dev, - "Resume failed: set hwtrips failed\n"); + dev_err(dev, "Resume failed: set hwtrips failed\n"); return err; } } From patchwork Thu Oct 12 17:58:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419595 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E089CDB46E for ; Thu, 12 Oct 2023 17:59:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441930AbjJLR7A (ORCPT ); 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[2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id b25-20020aa7df99000000b0053808d83f0fsm10417564edy.9.2023.10.12.10.58.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:48 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 05/13] thermal: tegra: Constify SoC-specific data Date: Thu, 12 Oct 2023 19:58:26 +0200 Message-ID: <20231012175836.3408077-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding The SoC-specific parameter structure is read-only data, so consistently use const to mark it as such. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index f434e141dcdf..11c23ace2c81 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -339,7 +339,7 @@ struct tegra_soctherm { u32 *calib; struct thermal_zone_device **thermctl_tzs; - struct tegra_soctherm_soc *soc; + const struct tegra_soctherm_soc *soc; struct soctherm_throt_cfg throt_cfgs[THROTTLE_SIZE]; @@ -2054,19 +2054,15 @@ MODULE_DEVICE_TABLE(of, tegra_soctherm_of_match); static int tegra_soctherm_probe(struct platform_device *pdev) { - const struct of_device_id *match; struct tegra_soctherm *tegra; struct thermal_zone_device *z; struct tsensor_shared_calib shared_calib; - struct tegra_soctherm_soc *soc; + const struct tegra_soctherm_soc *soc; unsigned int i; int err; - match = of_match_node(tegra_soctherm_of_match, pdev->dev.of_node); - if (!match) - return -ENODEV; + soc = device_get_match_data(&pdev->dev); - soc = (struct tegra_soctherm_soc *)match->data; if (soc->num_ttgs > TEGRA124_SOCTHERM_SENSOR_NUM) return -EINVAL; @@ -2220,7 +2216,7 @@ static int __maybe_unused soctherm_suspend(struct device *dev) static int __maybe_unused soctherm_resume(struct device *dev) { struct tegra_soctherm *tegra = dev_get_drvdata(dev); - struct tegra_soctherm_soc *soc = tegra->soc; + const struct tegra_soctherm_soc *soc = tegra->soc; int err, i; err = soctherm_clk_enable(tegra, true); From patchwork Thu Oct 12 17:58:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419597 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05784C46CA1 for ; Thu, 12 Oct 2023 17:59:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442057AbjJLR7C (ORCPT ); Thu, 12 Oct 2023 13:59:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1441986AbjJLR6y (ORCPT ); Thu, 12 Oct 2023 13:58:54 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DF01C9; Thu, 12 Oct 2023 10:58:51 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-9ad810be221so200445866b.2; Thu, 12 Oct 2023 10:58:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133529; x=1697738329; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2WNElS/gVnJhRodzwUmP0WXL6VdUMTQJu5AaQ9GZlUg=; b=SPR6d2QwufOKWrXD2/9Q++jxb+iO7DJcj4nOwhln0SMWvYHA4FUeM2k22oL04Uoi+9 YyPfuCOzvA0ME4eNpBkOoqTcEVyJyLNcd8t7H740RXTWMOY1klh1bfuy3FHqit+ugpie NmySB39ZxmDZ7FKZOiNhcJBA8vqNj4eiW7K2YalKXKZ1g1gcGEn1jVZHXtZDTi2c9yu2 GFUDYKlsGkZg/lIeE37DvENcdTeunoOQ5cieWQunqM+THZ8fYnz9gyI3GuVlR/Wv5y/8 RLuWFVKwJCFH5fInU3/YCd3XDxUYJ9QvcPXchADYXZDYYIKFx18BXxROHgRuyrWmLWOJ Dk9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133529; x=1697738329; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2WNElS/gVnJhRodzwUmP0WXL6VdUMTQJu5AaQ9GZlUg=; b=clc4p77qZnHdM78j+Yi63fq/RHp9GLcpCas/KTy7M6Ezwuqy6dnpovmebrr5nZh1Yn XrIb1jvLaNtawZhtQWHnxzBuKkh5I7pI5uMr/bnM1KZ9ppS4Yk0ttd9cwSz0ZKP2rGoy GVj+liPFC3iBqf0FCzxKLXgK4uIq9aJdsx9Cef2otiAX9fZnZpn/BktNud8V8EMGlNoK 6NxqAyVbMQQoDHHkzYlr1NSyk10P+6nSjC7VwBTj3K0LAlHdUX/kMozdQeg1qgIbKP1s 9wyrtQQYMsT4u5AWnOZKCvCSQg0PymB5OkPbGwO2iXXsiZ0huj08Yj5OWIuCP5nlvEDE Ju+Q== X-Gm-Message-State: AOJu0Yzulhws463wXg5TsEcWDFrrHsgNtqwlTBWW5c+1nD6QZvta8xWV ihZyX8gemQwvC7m/kYPmKkA= X-Google-Smtp-Source: AGHT+IHcE/jBQFNxQ41NPCURuAvnpb/2vkuwQ1FGV1bsMXNlj5dqIlQYfKNQyIRn2B0k5iQBXy23pA== X-Received: by 2002:a17:907:7603:b0:9b2:b633:ada2 with SMTP id jx3-20020a170907760300b009b2b633ada2mr21913345ejc.36.1697133529446; Thu, 12 Oct 2023 10:58:49 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id b20-20020a170906491400b00988dbbd1f7esm11314362ejq.213.2023.10.12.10.58.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:49 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 06/13] thermal: tegra: Do not register cooling device Date: Thu, 12 Oct 2023 19:58:27 +0200 Message-ID: <20231012175836.3408077-7-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding The SOCTHERM's built-in throttling mechanism doesn't map well to the concept of a cooling device because it will automatically start to throttle when the programmed temperature threshold is crossed. Remove the cooling device implementation and instead unconditionally program the throttling for the CPU and GPU thermal zones. Signed-off-by: Thierry Reding --- Changes in v2: - adapt to new DT bindings drivers/thermal/tegra/soctherm.c | 287 +++++++++------------- drivers/thermal/tegra/soctherm.h | 1 + drivers/thermal/tegra/tegra124-soctherm.c | 4 + drivers/thermal/tegra/tegra132-soctherm.c | 4 + drivers/thermal/tegra/tegra210-soctherm.c | 4 + 5 files changed, 132 insertions(+), 168 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 11c23ace2c81..105ec20d509d 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -33,7 +33,6 @@ #include -#include "../thermal_core.h" #include "soctherm.h" #define SENSOR_CONFIG0 0 @@ -317,12 +316,16 @@ struct soctherm_throt_cfg { const char *name; unsigned int id; u8 priority; + int temperature; + int hysteresis; u8 cpu_throt_level; u32 cpu_throt_depth; u32 gpu_throt_level; struct soctherm_oc_cfg oc_cfg; - struct thermal_cooling_device *cdev; bool init; + + unsigned int num_zones; + struct device_node **zones; }; struct tegra_soctherm { @@ -497,9 +500,7 @@ static int thermtrip_program(struct tegra_soctherm *ts, * throttrip_program() - Configures the hardware to throttle the * pulse if a given sensor group reaches a given temperature * @ts: pointer to a struct tegra_soctherm - * @sg: pointer to the sensor group to set the thermtrip temperature for * @stc: pointer to the throttle need to be triggered - * @trip_temp: the temperature in millicelsius to trigger the thermal trip at * * Sets the thermal trip threshold and throttle event of the given sensor * group. If this threshold is crossed, the hardware will trigger the @@ -510,43 +511,68 @@ static int thermtrip_program(struct tegra_soctherm *ts, * * Return: 0 upon success, or %-EINVAL upon failure. */ -static int throttrip_program(struct tegra_soctherm *ts, - const struct tegra_tsensor_group *sg, - struct soctherm_throt_cfg *stc, - int trip_temp) +static int throttrip_program(struct tegra_soctherm *tegra, + struct soctherm_throt_cfg *stc) { - int temp, cpu_throt, gpu_throt; - unsigned int throt; - u32 r, reg_off; + int high, low, cpu_throt, gpu_throt; + unsigned int throt, i, j; - if (!sg || !stc || !stc->init) - return -EINVAL; + high = enforce_temp_range(tegra, stc->temperature); + high /= tegra->soc->thresh_grain; + low = enforce_temp_range(tegra, stc->temperature - stc->hysteresis); + low /= tegra->soc->thresh_grain; - temp = enforce_temp_range(ts, trip_temp) / ts->soc->thresh_grain; + for (i = 0; i < stc->num_zones; i++) { + struct tegra_thermctl_zone *zone = NULL; + unsigned int offset; + u32 r; - /* Hardcode LIGHT on LEVEL1 and HEAVY on LEVEL2 */ - throt = stc->id; - reg_off = THERMCTL_LVL_REG(sg->thermctl_lvl0_offset, throt + 1); + for (j = 0; j < tegra->soc->num_ttgs; j++) { + struct thermal_zone_device *tz = tegra->thermctl_tzs[j]; - if (throt == THROTTLE_LIGHT) { - cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_LIGHT; - gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_LIGHT; - } else { - cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_HEAVY; - gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_HEAVY; - if (throt != THROTTLE_HEAVY) - dev_warn(ts->dev, - "invalid throt id %d - assuming HEAVY", - throt); - } + if (tz->device.of_node == stc->zones[i]) { + zone = thermal_zone_device_priv(tz); + break; + } + } - r = readl(ts->regs + reg_off); - r = REG_SET_MASK(r, sg->thermctl_lvl0_up_thresh_mask, temp); - r = REG_SET_MASK(r, sg->thermctl_lvl0_dn_thresh_mask, temp); - r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt); - r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt); - r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1); - writel(r, ts->regs + reg_off); + if (!zone) + continue; + + if (!zone->sg->can_throttle) { + dev_warn(tegra->dev, "zone %s cannot be throttled\n", + zone->sg->name); + continue; + } + + /* Hardcode LIGHT on LEVEL1 and HEAVY on LEVEL2 */ + throt = stc->id; + offset = THERMCTL_LVL_REG(zone->sg->thermctl_lvl0_offset, throt + 1); + + if (throt == THROTTLE_LIGHT) { + cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_LIGHT; + gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_LIGHT; + } else { + cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_HEAVY; + gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_HEAVY; + if (throt != THROTTLE_HEAVY) + dev_warn(tegra->dev, + "invalid throt id %d - assuming HEAVY", + throt); + } + + r = readl(tegra->regs + offset); + r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_up_thresh_mask, high); + r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_dn_thresh_mask, low); + r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt); + r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt); + r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1); + writel(r, tegra->regs + offset); + + dev_info(tegra->dev, + "throttrip: will throttle when %s reaches %d mC\n", + zone->sg->name, stc->temperature); + } return 0; } @@ -606,25 +632,6 @@ static int tegra_thermctl_set_trip_temp(struct thermal_zone_device *tz, int trip return thermtrip_program(ts, sg, temp); else return 0; - - } else if (trip.type == THERMAL_TRIP_HOT) { - int i; - - for (i = 0; i < THROTTLE_SIZE; i++) { - struct thermal_cooling_device *cdev; - struct soctherm_throt_cfg *stc; - - if (!ts->throt_cfgs[i].init) - continue; - - cdev = ts->throt_cfgs[i].cdev; - if (get_thermal_instance(tz, cdev, trip_id)) - stc = find_throttle_cfg_by_name(ts, cdev->type); - else - continue; - - return throttrip_program(ts, sg, stc, temp); - } } return 0; @@ -685,29 +692,9 @@ static const struct thermal_zone_device_ops tegra_of_thermal_ops = { .set_trips = tegra_thermctl_set_trips, }; -static int get_hot_temp(struct thermal_zone_device *tz, int *trip_id, int *temp) -{ - int i, ret; - struct thermal_trip trip; - - for (i = 0; i < thermal_zone_get_num_trips(tz); i++) { - - ret = thermal_zone_get_trip(tz, i, &trip); - if (ret) - return -EINVAL; - - if (trip.type == THERMAL_TRIP_HOT) { - *trip_id = i; - return 0; - } - } - - return -EINVAL; -} - /** * tegra_soctherm_set_hwtrips() - set HW trip point from DT data - * @dev: struct device * of the SOC_THERM instance + * @ts: pointer to a struct tegra_soctherm * @sg: pointer to the sensor group to set the thermtrip temperature for * @tz: struct thermal_zone_device * * @@ -725,16 +712,12 @@ static int get_hot_temp(struct thermal_zone_device *tz, int *trip_id, int *temp) * THERMTRIP has been enabled successfully when a message similar to * this one appears on the serial console: * "thermtrip: will shut down when sensor group XXX reaches YYYYYY mC" - * THROTTLE has been enabled successfully when a message similar to - * this one appears on the serial console: - * ""throttrip: will throttle when sensor group XXX reaches YYYYYY mC" */ static int tegra_soctherm_set_hwtrips(struct tegra_soctherm *ts, const struct tegra_tsensor_group *sg, struct thermal_zone_device *tz) { - struct soctherm_throt_cfg *stc; - int i, trip, temperature, ret; + int temperature, ret; /* Get thermtrips. If missing, try to get critical trips. */ temperature = tsensor_group_thermtrip_get(ts, sg->id); @@ -752,43 +735,31 @@ static int tegra_soctherm_set_hwtrips(struct tegra_soctherm *ts, dev_info(ts->dev, "thermtrip: will shut down when %s reaches %d mC\n", sg->name, temperature); - ret = get_hot_temp(tz, &trip, &temperature); - if (ret) { - dev_info(ts->dev, "throttrip: %s: missing hot temperature\n", - sg->name); - return 0; - } - - for (i = 0; i < THROTTLE_OC1; i++) { - struct thermal_cooling_device *cdev; - - if (!ts->throt_cfgs[i].init) - continue; - - cdev = ts->throt_cfgs[i].cdev; - if (get_thermal_instance(tz, cdev, trip)) - stc = find_throttle_cfg_by_name(ts, cdev->type); - else - continue; - - ret = throttrip_program(ts, sg, stc, temperature); - if (ret) { - dev_err(ts->dev, "throttrip: %s: error during enable\n", - sg->name); - return ret; - } + return 0; +} - dev_info(ts->dev, - "throttrip: will throttle when %s reaches %d mC\n", - sg->name, temperature); - break; - } +/* + * soctherm_enable_hw_throttling() - enable hardware throttling trip points + * @tegra: pointer to a struct tegra_soctherm + * + * THROTTLE has been enabled successfully when a message similar to + * this one appears on the serial console: + * ""throttrip: will throttle when sensor group XXX reaches YYYYYY mC" + */ +static void soctherm_enable_hw_throttling(struct tegra_soctherm *tegra) +{ + struct soctherm_throt_cfg *stc; + int err; - if (i == THROTTLE_SIZE) - dev_info(ts->dev, "throttrip: %s: missing throttle cdev\n", - sg->name); + /* if configured, program the pulse skipper for CPU and GPU zones */ + stc = find_throttle_cfg_by_name(tegra, "heavy"); + if (!stc) + return; - return 0; + err = throttrip_program(tegra, stc); + if (err) + dev_err(tegra->dev, "throttrip: %s: failed to enable: %d\n", + stc->name, err); } static irqreturn_t soctherm_thermal_isr(int irq, void *dev_id) @@ -1494,40 +1465,6 @@ static int soctherm_clk_enable(struct tegra_soctherm *tegra, bool enable) return 0; } -static int throt_get_cdev_max_state(struct thermal_cooling_device *cdev, - unsigned long *max_state) -{ - *max_state = 1; - return 0; -} - -static int throt_get_cdev_cur_state(struct thermal_cooling_device *cdev, - unsigned long *cur_state) -{ - struct tegra_soctherm *ts = cdev->devdata; - u32 r; - - r = readl(ts->regs + THROT_STATUS); - if (REG_GET_MASK(r, THROT_STATUS_STATE_MASK)) - *cur_state = 1; - else - *cur_state = 0; - - return 0; -} - -static int throt_set_cdev_state(struct thermal_cooling_device *cdev, - unsigned long cur_state) -{ - return 0; -} - -static const struct thermal_cooling_device_ops throt_cooling_ops = { - .get_max_state = throt_get_cdev_max_state, - .get_cur_state = throt_get_cdev_cur_state, - .set_cur_state = throt_set_cdev_state, -}; - static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) { struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; @@ -1633,6 +1570,33 @@ static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, else goto err; + ret = of_property_read_u32(np, "temperature-millicelsius", + &stc->temperature); + if (ret < 0) + goto err; + + ret = of_property_read_u32(np, "hysteresis-millicelsius", + &stc->hysteresis); + if (ret < 0) + goto err; + + stc->num_zones = of_count_phandle_with_args(np, "nvidia,thermal-zones", + NULL); + if (stc->num_zones > 0) { + struct device_node *zone; + unsigned int i; + + stc->zones = devm_kcalloc(ts->dev, stc->num_zones, sizeof(zone), + GFP_KERNEL); + if (!stc->zones) + return -ENOMEM; + + for (i = 0; i < stc->num_zones; i++) { + zone = of_parse_phandle(np, "nvidia,thermal-zones", i); + stc->zones[i] = zone; + } + } + return 0; err: @@ -1642,14 +1606,12 @@ static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, } /** - * soctherm_init_hw_throt_cdev() - Parse the HW throttle configurations - * and register them as cooling devices. + * soctherm_init_hw_throttling() - parse the HW throttle configurations * @tegra: pointer to Tegra soctherm structure */ -static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) +static void soctherm_init_hw_throttling(struct tegra_soctherm *tegra) { struct device_node *np_stc, *np_stcc; - const char *name; int i; for (i = 0; i < THROTTLE_SIZE; i++) { @@ -1666,11 +1628,10 @@ static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) } for_each_child_of_node(np_stc, np_stcc) { + const char *name = np_stcc->name; struct soctherm_throt_cfg *stc; - struct thermal_cooling_device *tcd; int err; - name = np_stcc->name; stc = find_throttle_cfg_by_name(tegra, name); if (!stc) { dev_err(tegra->dev, "throttle-cfg: could not find %s\n", @@ -1692,19 +1653,6 @@ static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) if (stc->id >= THROTTLE_OC1) { soctherm_oc_cfg_parse(tegra, np_stcc, stc); stc->init = true; - } else { - - tcd = thermal_of_cooling_device_register(np_stcc, - (char *)name, tegra, - &throt_cooling_ops); - if (IS_ERR_OR_NULL(tcd)) { - dev_err(tegra->dev, - "throttle-cfg: %s: failed to register cooling device\n", - name); - continue; - } - stc->cdev = tcd; - stc->init = true; } } @@ -2148,7 +2096,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) soctherm_thermtrips_parse(tegra); - soctherm_init_hw_throt_cdev(tegra); + soctherm_init_hw_throttling(tegra); soctherm_init(tegra); @@ -2183,6 +2131,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) goto disable_clocks; } + soctherm_enable_hw_throttling(tegra); err = soctherm_interrupts_init(tegra); soctherm_debug_init(tegra); @@ -2238,6 +2187,8 @@ static int __maybe_unused soctherm_resume(struct device *dev) } } + soctherm_enable_hw_throttling(tegra); + return 0; } diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/soctherm.h index 70501e73d586..894bee5d96c5 100644 --- a/drivers/thermal/tegra/soctherm.h +++ b/drivers/thermal/tegra/soctherm.h @@ -83,6 +83,7 @@ struct tegra_tsensor_group { u16 thermctl_lvl0_offset; u32 thermctl_lvl0_up_thresh_mask; u32 thermctl_lvl0_dn_thresh_mask; + bool can_throttle; }; struct tegra_tsensor_configuration { diff --git a/drivers/thermal/tegra/tegra124-soctherm.c b/drivers/thermal/tegra/tegra124-soctherm.c index 20ad27f4d1a1..7b11fa8fb533 100644 --- a/drivers/thermal/tegra/tegra124-soctherm.c +++ b/drivers/thermal/tegra/tegra124-soctherm.c @@ -60,6 +60,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_cpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = { @@ -79,6 +80,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra124_tsensor_group_pll = { @@ -96,6 +98,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_pll = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group tegra124_tsensor_group_mem = { @@ -115,6 +118,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_mem = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group *tegra124_tsensor_groups[] = { diff --git a/drivers/thermal/tegra/tegra132-soctherm.c b/drivers/thermal/tegra/tegra132-soctherm.c index b76308fdad9e..304561fe9110 100644 --- a/drivers/thermal/tegra/tegra132-soctherm.c +++ b/drivers/thermal/tegra/tegra132-soctherm.c @@ -60,6 +60,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_cpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = { @@ -79,6 +80,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra132_tsensor_group_pll = { @@ -96,6 +98,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_pll = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group tegra132_tsensor_group_mem = { @@ -115,6 +118,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_mem = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group *tegra132_tsensor_groups[] = { diff --git a/drivers/thermal/tegra/tegra210-soctherm.c b/drivers/thermal/tegra/tegra210-soctherm.c index d0ff793f18c5..6277a8e12b8a 100644 --- a/drivers/thermal/tegra/tegra210-soctherm.c +++ b/drivers/thermal/tegra/tegra210-soctherm.c @@ -61,6 +61,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_cpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra210_tsensor_group_gpu = { @@ -80,6 +81,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_gpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra210_tsensor_group_pll = { @@ -97,6 +99,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_pll = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group tegra210_tsensor_group_mem = { @@ -116,6 +119,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_mem = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group *tegra210_tsensor_groups[] = { From patchwork Thu Oct 12 17:58:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419598 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6DB9CDB482 for ; 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[2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id rp19-20020a170906d97300b009b95b46bbd1sm11323217ejb.133.2023.10.12.10.58.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:50 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 07/13] thermal: tegra: Use unsigned int where appropriate Date: Thu, 12 Oct 2023 19:58:28 +0200 Message-ID: <20231012175836.3408077-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding Use unsigned integers more consistently, which helps to make it more explicit about what values can be expected. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 105ec20d509d..c7f8e36cbeab 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -591,8 +591,9 @@ find_throttle_cfg_by_name(struct tegra_soctherm *ts, const char *name) static int tsensor_group_thermtrip_get(struct tegra_soctherm *ts, int id) { - int i, temp = min_low_temp; struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; + int temp = min_low_temp; + unsigned int i; if (id >= TEGRA124_SOCTHERM_SENSOR_NUM) return temp; @@ -1469,33 +1470,34 @@ static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) { struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; const int max_num_prop = ts->soc->num_ttgs * 2; + unsigned int i, j, count; u32 *tlb; - int i, j, n, ret; + int ret; if (!tt) return -ENOMEM; - n = of_property_count_u32_elems(ts->dev->of_node, "nvidia,thermtrips"); - if (n <= 0) { + ret = of_property_count_u32_elems(ts->dev->of_node, "nvidia,thermtrips"); + if (ret <= 0) { dev_info(ts->dev, - "missing thermtrips, will use critical trips as shut down temp\n"); - return n; + "missing thermtrips, will use critical trips as shut down temperature\n"); + return ret; } - n = min(max_num_prop, n); + count = min_t(unsigned int, ret, ts->soc->num_ttgs * 2); tlb = devm_kcalloc(ts->dev, max_num_prop, sizeof(u32), GFP_KERNEL); if (!tlb) return -ENOMEM; + ret = of_property_read_u32_array(ts->dev->of_node, "nvidia,thermtrips", - tlb, n); + tlb, count); if (ret) { dev_err(ts->dev, "invalid num ele: thermtrips:%d\n", ret); return ret; } - i = 0; - for (j = 0; j < n; j = j + 2) { + for (i = 0, j = 0; j < count; j = j + 2) { if (tlb[j] >= TEGRA124_SOCTHERM_SENSOR_NUM) continue; @@ -1612,7 +1614,7 @@ static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, static void soctherm_init_hw_throttling(struct tegra_soctherm *tegra) { struct device_node *np_stc, *np_stcc; - int i; + unsigned int i; for (i = 0; i < THROTTLE_SIZE; i++) { tegra->throt_cfgs[i].name = throt_names[i]; @@ -1875,8 +1877,8 @@ static void soctherm_throttle_program(struct tegra_soctherm *ts, static void tegra_soctherm_throttle(struct tegra_soctherm *ts) { + unsigned int i; u32 v; - int i; /* configure LOW, MED and HIGH levels for CCROC NV_THERM */ if (ts->soc->use_ccroc) { @@ -1950,8 +1952,8 @@ static int soctherm_interrupts_init(struct tegra_soctherm *tegra) static void soctherm_init(struct tegra_soctherm *tegra) { const struct tegra_tsensor_group **ttgs = tegra->soc->ttgs; - int i; u32 pdiv, hotspot; + unsigned int i; /* Initialize raw sensors */ for (i = 0; i < tegra->soc->num_tsensors; ++i) From patchwork Thu Oct 12 17:58:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419599 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 804DBCDB486 for ; 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[2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id m14-20020a1709066d0e00b00991d54db2acsm11296068ejr.44.2023.10.12.10.58.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:50 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 08/13] thermal: tegra: Avoid over-allocation of temporary array Date: Thu, 12 Oct 2023 19:58:29 +0200 Message-ID: <20231012175836.3408077-9-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding The code will attempt to read "count" entries from DT, but the code allocates the maximum number that is possible, potentially over- allocating the array. Use the actual number of entries when allocating. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index c7f8e36cbeab..88ceeb8491cc 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -1469,7 +1469,6 @@ static int soctherm_clk_enable(struct tegra_soctherm *tegra, bool enable) static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) { struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; - const int max_num_prop = ts->soc->num_ttgs * 2; unsigned int i, j, count; u32 *tlb; int ret; @@ -1486,7 +1485,7 @@ static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) count = min_t(unsigned int, ret, ts->soc->num_ttgs * 2); - tlb = devm_kcalloc(ts->dev, max_num_prop, sizeof(u32), GFP_KERNEL); + tlb = devm_kcalloc(ts->dev, count, sizeof(u32), GFP_KERNEL); if (!tlb) return -ENOMEM; @@ -1506,6 +1505,8 @@ static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) i++; } + devm_kfree(ts->dev, tlb); + return 0; } From patchwork Thu Oct 12 17:58:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419600 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A27FCDB489 for ; Thu, 12 Oct 2023 17:59:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442146AbjJLR7F (ORCPT ); Thu, 12 Oct 2023 13:59:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442046AbjJLR64 (ORCPT ); Thu, 12 Oct 2023 13:58:56 -0400 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9611AB8; Thu, 12 Oct 2023 10:58:54 -0700 (PDT) Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-9ae7383b7ecso514250066b.0; Thu, 12 Oct 2023 10:58:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133533; x=1697738333; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=suA2GBuE0EXCDow+nw+BwHpE/bwHpzrny/kQXeENrx0=; b=D3a/tBiLlrA5xxFo3P+D8d3OojjsMS/glAHnXu7A9sczbboQaZHHVscdkntmlPCIWT 8PiKcS1XVEAr8Ox0sh5TWj3fzabztteEJQdhrbSEqHY0UtvFwfIV6+m+qV3NfxapNnfo j1Z11cK6n8i/Wz1g5jC5l541Tw4ToAxFaawPKMlgpNE2gIlGZPr1eWKQFqPQZDeRuBDd U0KeXc/lwY+LkP8tR8dr1t8EuYtnRU8HU8deMDwA3wRBcJ+DLJD80O9DxZlwZ20BegMM DqvW43vbXcEiN5YTEvsPkjf3z1yD/l6f7+e1BY0/UBNaGNOcc2A4LNrR1juo01itLvMY NrhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133533; x=1697738333; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=suA2GBuE0EXCDow+nw+BwHpE/bwHpzrny/kQXeENrx0=; b=NMaWDgZnDsjBA2KTtgM8x0S2AzdN3pyFDwOBdDrmCWge9zGz6HbBtQ7yF4H33tgPMs sR9Pb0YME5xBm3IoPFA6v+Phm6/N9pE7N5n7JGWxmZfa1EMpirkmWyETgl5HpkNxDkOn 6WrHW89/WOevHrKXTrs1MRGMd/cU+l1pnrEeC0uT3DJgb/k3bZid4NKK5emP7+B1Qfn+ gIEfyfJvaMSJkGbDqE9QbLQeChngKcYQxekUyMyWn38awGqvDx3Y81cJ/hyiEtjEioLn xLqrk2LlDBB9o4LZoAtEec8RH/8YBlMP9Jj3W/+gHex86Yaz/P9CPVbejUM18BtBFPLi oVeQ== X-Gm-Message-State: AOJu0Yyq/ednwPK5VdsGcHjYAu7WV5X0U0fJXeCCHuVh7QhO8f1yNQOe xa9SULTcjuHa06TrCSzAOIc= X-Google-Smtp-Source: AGHT+IGv+nXgp3Pb3lI5hrfvA7a/uR53U/STjJOQIoIERiRQ4CjFHuLTYXUMOIqGxlTXsyVJrF6zJw== X-Received: by 2002:a17:906:1005:b0:9ad:f60c:7287 with SMTP id 5-20020a170906100500b009adf60c7287mr20872676ejm.28.1697133532741; Thu, 12 Oct 2023 10:58:52 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id u2-20020a17090617c200b009ad8084e08asm11175901eje.0.2023.10.12.10.58.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:52 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 09/13] thermal: tegra: Remove gratuitous error assignment Date: Thu, 12 Oct 2023 19:58:30 +0200 Message-ID: <20231012175836.3408077-10-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding Interrupts are optional, so errors during their initialization are ignored. However, the code confusingly stores the error code and makes it looks like it is somehow relevant. Remove the gratuitous assignment to make it clearer that these errors are being purposefully ignored. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 88ceeb8491cc..77051d08e69f 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -2135,8 +2135,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) } soctherm_enable_hw_throttling(tegra); - err = soctherm_interrupts_init(tegra); - + soctherm_interrupts_init(tegra); soctherm_debug_init(tegra); return 0; From patchwork Thu Oct 12 17:58:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419601 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D979CDB48B for ; Thu, 12 Oct 2023 17:59:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442046AbjJLR7G (ORCPT ); Thu, 12 Oct 2023 13:59:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442095AbjJLR66 (ORCPT ); Thu, 12 Oct 2023 13:58:58 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E385DC; Thu, 12 Oct 2023 10:58:55 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-9b275afb6abso510955266b.1; Thu, 12 Oct 2023 10:58:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133534; x=1697738334; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PFkzZubIKvHWWywCOt/a5WVYYq1z0VOWDgSVq/0tCKQ=; b=HOcHNhzpb2NmGar5HN4GdRTKm17L/wKTwf+A1HqCCtDbP+BZ2rfVT9AeP+Xexudvvc toZQJmU7z3aDEE4ySW2uNDrzVXI/9s8KYQc3aehlK0+liPul0XBuWKIb3bksfi89hIvW /KqLXccxY3P0QoQCytdbFfmLIKrsbnhFrA0+nQ5SyRj0xRsEmL4VLVXLtpWkNP9zrA8e /popt95cjztHQTRc6yBbf0s80qTy2IVVcRhEzu44NMJIPz9b0BSE8dtN4Y6L8RdgHNE5 ACjuFT4wMAKXwwNpluuRVJo3wFV/n3+Rt7nJpht9ByET95HChLhzIEo8CvDrd5QabSoc 4aoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133534; x=1697738334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PFkzZubIKvHWWywCOt/a5WVYYq1z0VOWDgSVq/0tCKQ=; b=SBD0NInu9aTcp0cj5czeKyAEaIuMGlD7PMqCnuUfaJxRo0VsTLz8BMPe3c6bn/iiKk t9jUcAD3RFNeAgX0aL8xB2r75ivO8pSB6wZd1idK50vje/VEgyJ1DecJ0m/2nN67f+2K ZA/gCBN62yI4evj2OKpuzr/8sXqlcY47nYp4iayPPNrZE2QaXOQXJRK3S9SsNX+J93jM cpITLtu8ZoyjMsG0frIQDiyA2V1b0Fnl9jM/eiDL21hizLLLzQSRDSdHREIXL2LkT90v jzH0kAUWlNpEu+jJy7hSoRFODbnNsxxhw8lWqrD7ufFNes4lXT3QpzKj4yKB10xS7R1d gBcw== X-Gm-Message-State: AOJu0YzQoMB3W4IKX5q0VNWDpEU/NGNorZ8MyQ05X+x21T/Z2/ZTv5V9 6/EmQoDXVTwM/jWNqvRjQv/5cOUg3I8= X-Google-Smtp-Source: AGHT+IEhP9J0SWf1YHmceNjScXupZVhu4lkNIj+37J22fpuqGX9MwnE3bgI+e3ppoizrDWiSWqDO4Q== X-Received: by 2002:a17:907:36c9:b0:9a9:fa4a:5a4e with SMTP id bj9-20020a17090736c900b009a9fa4a5a4emr17202083ejc.13.1697133533694; Thu, 12 Oct 2023 10:58:53 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id n14-20020aa7c44e000000b005361fadef32sm10260121edr.23.2023.10.12.10.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:53 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 10/13] thermal: tegra: Minor stylistic cleanups Date: Thu, 12 Oct 2023 19:58:31 +0200 Message-ID: <20231012175836.3408077-11-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding Fix up some whitespace (padding, identation) issues and reword an unreadable comment. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 77051d08e69f..f749fb960ebe 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -1492,7 +1492,9 @@ static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) ret = of_property_read_u32_array(ts->dev->of_node, "nvidia,thermtrips", tlb, count); if (ret) { - dev_err(ts->dev, "invalid num ele: thermtrips:%d\n", ret); + dev_err(ts->dev, + "failed to read \"nvidia,thermtrips\" property: %d\n", + ret); return ret; } @@ -1812,7 +1814,7 @@ static void throttlectl_gpu_level_select(struct tegra_soctherm *ts, } static int soctherm_oc_cfg_program(struct tegra_soctherm *ts, - enum soctherm_throttle_id throt) + enum soctherm_throttle_id throt) { u32 r; struct soctherm_oc_cfg *oc = &ts->throt_cfgs[throt].oc_cfg; @@ -2104,8 +2106,9 @@ static int tegra_soctherm_probe(struct platform_device *pdev) soctherm_init(tegra); for (i = 0; i < soc->num_ttgs; ++i) { - struct tegra_thermctl_zone *zone = - devm_kzalloc(&pdev->dev, sizeof(*zone), GFP_KERNEL); + struct tegra_thermctl_zone *zone; + + zone = devm_kzalloc(&pdev->dev, sizeof(*zone), GFP_KERNEL); if (!zone) { err = -ENOMEM; goto disable_clocks; From patchwork Thu Oct 12 17:58:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419602 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE191CDB47E for ; Thu, 12 Oct 2023 17:59:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442095AbjJLR7G (ORCPT ); Thu, 12 Oct 2023 13:59:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442118AbjJLR67 (ORCPT ); Thu, 12 Oct 2023 13:58:59 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3CC4CE1; Thu, 12 Oct 2023 10:58:57 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-99c3c8adb27so201336966b.1; Thu, 12 Oct 2023 10:58:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133536; x=1697738336; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AKiw2SIAdmYLlpLe2esjmaSazy2c7GkFD1/5AuLgOtE=; b=ApDil+YP/32EPGs5rSPkRfnXBxTLBmbjwNDrRmixTA1YmBD5v1tM5+puMmVtXkVocv 6MEL1dTOk9iEMLW0ByaazWAovRFTJlKKnr2ZHhQcTFuULkh0VHvB6qdfa9s2cpGBv08h s66HpEN9V/OI+3NCFfPA7ttfK6iDT1MYVIKbAFYsbc/5B8neK77fDn8wmiIOJw5LcEFp SSgF6RkmQXBBRlYqU0DbYeDzhvrt3wRWZz/nhohTmGNlrK0kK2jwkfy+nGFlszcS+Kqq eEz0D40e8G82yK7zxlhrlSTmL7a92mcsvbxBWX7tn1oYd30hTpJRBY3U5hhUA4mRmJmx EveQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133536; x=1697738336; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AKiw2SIAdmYLlpLe2esjmaSazy2c7GkFD1/5AuLgOtE=; b=kxxT9DPqghQPBBXz3YLCESVugpouOdrAnKs0S00S5OGzaN6HcqusqqjGQSqbXF3jRu GXkKkXSXi7muhzCJ5IQT+y9hGjgKQKGb/MXFZTPpHgnqPFvMAkgO5OQEV7R3o2uCwwKf ysBZ+5/JNC3TF2wGmhKxJ1rno7Muiporyj1CoPt9DbkEyA955x3s8mQpQ+eoVM4lVbg1 J0N0Lp+Y37izbUNP1PcnRCQq3DDNraIz2sdDW/Rg6GVJZS3BFceeJtHtlEpUdyh3nTG2 Bdyy1BjhRIb/zDsJlGqSYMJLfQ55yNLjI5JPNfLp3cu7CZHjjIzohk5ACmWZNfpnIUAc SHiQ== X-Gm-Message-State: AOJu0Yx7OG1GcO9PHTGwTJdIlHVVIIk5gyFXriN2z7Aiy4eC3WqiSOys asnGtvnVfuL3viXrL5xG3A3GjdhxoVU= X-Google-Smtp-Source: AGHT+IF0e5xKq2P16Vtt9Ls2WN/hfRSVK1Ftx69WnQPeMeeFbqnaOMAdZH8IT9Qyc4gV6xoELd0boQ== X-Received: by 2002:a17:906:31cc:b0:9b2:b2f8:85dc with SMTP id f12-20020a17090631cc00b009b2b2f885dcmr20511001ejf.34.1697133535619; Thu, 12 Oct 2023 10:58:55 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id u25-20020a1709063b9900b0099bc2d1429csm11386902ejf.72.2023.10.12.10.58.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:55 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 11/13] ARM: tegra: Rework SOCTHERM on Tegra124 Date: Thu, 12 Oct 2023 19:58:33 +0200 Message-ID: <20231012175836.3408077-13-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding The "heavy throttle" cooling device that SOCTHERM uses isn't a cooling device in the traditional sense. It's an automatic mechanism that cannot be actively controlled. Do not expose it as a cooling device and instead of tying it to a specific trip point, hard-code the temperature at which the automatic throttling will begin. While at it, clean up the trip point names to reflect the names used by the thermal device tree bindings. Signed-off-by: Thierry Reding --- Changes in v2: - update for DT bindings changes arch/arm/boot/dts/nvidia/tegra124.dtsi | 68 ++++++++------------------ 1 file changed, 21 insertions(+), 47 deletions(-) diff --git a/arch/arm/boot/dts/nvidia/tegra124.dtsi b/arch/arm/boot/dts/nvidia/tegra124.dtsi index 8f1fff373461..6af944fe6769 100644 --- a/arch/arm/boot/dts/nvidia/tegra124.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124.dtsi @@ -928,12 +928,14 @@ soctherm: thermal-sensor@700e2000 { #thermal-sensor-cells = <1>; throttle-cfgs { - throttle_heavy: heavy { + heavy { nvidia,priority = <100>; nvidia,cpu-throt-percent = <85>; nvidia,gpu-throt-level = ; - - #cooling-cells = <2>; + nvidia,thermal-zones = <&{/thermal-zones/cpu-thermal}>, + <&{/thermal-zones/gpu-thermal}>; + temperature-millicelsius = <100000>; + hysteresis-millicelsius = <4000>; }; }; }; @@ -1238,112 +1240,84 @@ cpu-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; trips { - cpu-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - cpu_throttle_trip: throttle-trip { + + hot { temperature = <100000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&cpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; mem-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; trips { - mem-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - mem-throttle-trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; gpu-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; trips { - gpu-shutdown-trip { + critical { temperature = <101000>; hysteresis = <0>; type = "critical"; }; - gpu_throttle_trip: throttle-trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&gpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; pllx-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; trips { - pllx-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - pllx-throttle-trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; }; From patchwork Thu Oct 12 17:58:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419604 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DDC7CDB490 for ; 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[2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id j18-20020a508a92000000b0053deb97e8e6sm2010343edj.28.2023.10.12.10.58.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:57 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 12/13] ARM: tegra: Rework SOCTHERM on Tegra124 Date: Thu, 12 Oct 2023 19:58:35 +0200 Message-ID: <20231012175836.3408077-15-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding The "heavy throttle" cooling device that SOCTHERM uses isn't a cooling device in the traditional sense. It's an automatic mechanism that cannot be actively controlled. Do not expose it as a cooling device and instead of tying it to a specific trip point, hard-code the temperature at which the automatic throttling will begin. While at it, clean up the trip point names to reflect the names used by the thermal device tree bindings. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/nvidia/tegra124.dtsi | 65 +++++++------------------- 1 file changed, 18 insertions(+), 47 deletions(-) diff --git a/arch/arm/boot/dts/nvidia/tegra124.dtsi b/arch/arm/boot/dts/nvidia/tegra124.dtsi index 8f1fff373461..ea692eb09067 100644 --- a/arch/arm/boot/dts/nvidia/tegra124.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124.dtsi @@ -928,12 +928,11 @@ soctherm: thermal-sensor@700e2000 { #thermal-sensor-cells = <1>; throttle-cfgs { - throttle_heavy: heavy { + heavy { nvidia,priority = <100>; nvidia,cpu-throt-percent = <85>; nvidia,gpu-throt-level = ; - - #cooling-cells = <2>; + temperature = <100000>; }; }; }; @@ -1238,112 +1237,84 @@ cpu-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; trips { - cpu-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - cpu_throttle_trip: throttle-trip { + + hot { temperature = <100000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&cpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; mem-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; trips { - mem-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - mem-throttle-trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; gpu-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; trips { - gpu-shutdown-trip { + critical { temperature = <101000>; hysteresis = <0>; type = "critical"; }; - gpu_throttle_trip: throttle-trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&gpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; pllx-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; trips { - pllx-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - pllx-throttle-trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; }; From patchwork Thu Oct 12 17:58:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 13419606 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CC34C41513 for ; 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[2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id cf7-20020a170906b2c700b009b296ce13a3sm11628560ejb.18.2023.10.12.10.58.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:58 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 13/13] thermal: Enforce self-encapsulation Date: Thu, 12 Oct 2023 19:58:36 +0200 Message-ID: <20231012175836.3408077-16-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Thierry Reding With the last driver being fixed to not reach into the core anymore, make sure that no new drivers will be able to do so by generating a build error when they try to do so. Signed-off-by: Thierry Reding --- drivers/thermal/thermal_core.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/thermal_core.h b/drivers/thermal/thermal_core.h index 91d9d4f63609..9c599658b866 100644 --- a/drivers/thermal/thermal_core.h +++ b/drivers/thermal/thermal_core.h @@ -15,7 +15,7 @@ #include "thermal_netlink.h" #ifndef THERMAL_CORE_SUBSYS -#warning This header can only be included by the thermal core code +#error This header can only be included by the thermal core code #endif /* Default Thermal Governor */