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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2023 04:23:37.2111 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8bf07303-700f-4a91-536a-08dbcba42bd0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8183 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org From: Radhey Shyam Pandey Introduce bindings for TCM memory address space on AMD-xilinx Zynq UltraScale+ platform. It will help in defining TCM in device-tree and make it's access platform agnostic and data-driven. Tightly-coupled memories(TCMs) are low-latency memory that provides predictable instruction execution and predictable data load/store timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory banks on the ATCM and BTCM ports, for a total of 128 KB of memory. The TCM resources(reg, reg-names and power-domain) are documented for each TCM in the R5 node. The reg and reg-names are made as required properties as we don't want to hardcode TCM addresses for future platforms and for zu+ legacy implementation will ensure that the old dts w/o reg/reg-names works and stable ABI is maintained. It also extends the examples for TCM split and lockstep modes. Signed-off-by: Radhey Shyam Pandey Signed-off-by: Tanmay Shah Acked-by: Rob Herring --- .../remoteproc/xlnx,zynqmp-r5fss.yaml | 131 +++++++++++++++--- 1 file changed, 113 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml index 78aac69f1060..9ecd63ea1b38 100644 --- a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml +++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml @@ -20,6 +20,17 @@ properties: compatible: const: xlnx,zynqmp-r5fss + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: + description: | + Standard ranges definition providing address translations for + local R5F TCM address spaces to bus addresses. + xlnx,cluster-mode: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2] @@ -37,7 +48,7 @@ properties: 2: single cpu mode patternProperties: - "^r5f-[a-f0-9]+$": + "^r5f@[0-9a-f]+$": type: object description: | The RPU is located in the Low Power Domain of the Processor Subsystem. @@ -54,8 +65,19 @@ patternProperties: compatible: const: xlnx,zynqmp-r5f + reg: + items: + - description: ATCM internal memory region + - description: BTCM internal memory region + + reg-names: + items: + - const: atcm + - const: btcm + power-domains: - maxItems: 1 + minItems: 1 + maxItems: 3 mboxes: minItems: 1 @@ -102,34 +124,107 @@ patternProperties: required: - compatible - power-domains + - reg + - reg-names unevaluatedProperties: false required: - compatible + - "#address-cells" + - "#size-cells" + - ranges additionalProperties: false examples: - | - remoteproc { - compatible = "xlnx,zynqmp-r5fss"; - xlnx,cluster-mode = <1>; - - r5f-0 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware 0x7>; - memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; - mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; - mbox-names = "tx", "rx"; + #include + + //Split mode configuration + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@ffe00000 { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, + <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; + mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; + mbox-names = "tx", "rx"; + }; }; + }; - r5f-1 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware 0x8>; - memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; - mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; - mbox-names = "tx", "rx"; + - | + //Lockstep configuration + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@ffe00000 { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <1>; + + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x20000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x20000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x20000>, <0x0 0x20000 0x0 0x20000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, + <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; + mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; + mbox-names = "tx", "rx"; + }; }; }; ... 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Thu, 12 Oct 2023 21:23:37 -0700 Received: from xsjtanmays50.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Thu, 12 Oct 2023 23:23:36 -0500 From: Tanmay Shah To: , , , , , , , CC: , , , Subject: [PATCH v6 2/4] dts: zynqmp: add properties for TCM in remoteproc Date: Thu, 12 Oct 2023 21:22:27 -0700 Message-ID: <20231013042229.3954527-3-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231013042229.3954527-1-tanmay.shah@amd.com> References: <20231013042229.3954527-1-tanmay.shah@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A108:EE_|SN7PR12MB8130:EE_ X-MS-Office365-Filtering-Correlation-Id: 76cfa671-70eb-4493-3756-08dbcba42c4c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AN/WKbNlGJXqGF9rVaN8zGoQ1LTBJa+MF4VpvM+9GWRRAsxgtia6o4ecYV9QR6G/QX60F7xnb/6MjyFgj2qaBIv2ywOZ63yjGcLN8w2GGV2mA+GUZ5y7O5Rpni+ygKNArQVGPVMoU57WbhfkOE4OYkQ21Z+d77WrjZtnkCnKyiN7fGJWOGF0TmrWoY5Kx5K+85TCVArbXnbpsC6nlMApO8v8zPA2sYdsEvJRcrPqDr/QVturS3hUU2br9KG5dO8aAX7YwepwmprHlRmKsRzITIZx7XsWOpRHkFT+SlG4v8UuSDXPsONmHXGbNA+fECnvj8maBMtsaWVRH6zlF4k1uHuvPVV06LEYphbwdQ4jEqFMhiVbbYB3AlmAiD2f4uUQ4g286No4jfIpies4QvGq6I6J4qLAuImUZ7PISG3c2UXvVW0PAfcadSM8WrUEbuS6HxhjCqrEtRL7XcDNc7tSNDXiMlcNE+vX1ixZ/vAo4oXeLvVC7Vd+zFd5weL7EddEOnV/8AdW6uq4ERBmysXJrwQC8ab9Y0oD8j6uttaGiS9H+rHF3DQ+knS9Zjo1Lk/I/b4SbITds5vRivEBLjsAGO/Y/KFYU7JCAzu4QniveN//w1ePvksEvN/Y1OBFVYTrdTlURjRNr6fEo23j6LcIYfXFniGGcUotGkFjdyrfGiMV4vQlREcvrekN97t+8SCM5SQa+lmRAJDO3AeKOmMd857RovmlY+OHjQhRoEpkv/v7kI7WhNxNXK/rX+xO1gTDgcJQS1y57+ICy5Nol0d28w== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(346002)(396003)(376002)(39860400002)(230922051799003)(1800799009)(186009)(82310400011)(451199024)(64100799003)(46966006)(36840700001)(40470700004)(54906003)(110136005)(70206006)(70586007)(40480700001)(316002)(40460700003)(478600001)(6666004)(2906002)(86362001)(41300700001)(4326008)(8676002)(8936002)(5660300002)(44832011)(26005)(356005)(36860700001)(82740400003)(2616005)(81166007)(1076003)(83380400001)(47076005)(426003)(336012)(7049001)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2023 04:23:38.0387 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 76cfa671-70eb-4493-3756-08dbcba42c4c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A108.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8130 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Add properties as per new bindings in zynqmp remoteproc node to represent TCM address and size. This patch also adds alternative remoteproc node to represent remoteproc cluster in split mode. By default lockstep mode is enabled and users should disable it before using split mode dts. Both device-tree nodes can't be used simultaneously one of them must be disabled. For zcu102-1.0 and zcu102-1.1 board remoteproc split mode dts node is enabled and lockstep mode dts is disabled. Signed-off-by: Tanmay Shah --- Changes in v6: - Introduce new node entry for r5f cluster split mode dts and keep it disabled by default. - Keep remoteproc lockstep mode enabled by default to maintian back compatibility. - Enable split mode only for zcu102 board to demo split mode use .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 +++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 60 +++++++++++++++++-- 2 files changed, 63 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts index c8f71a1aec89..495ca94b45db 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts @@ -14,6 +14,14 @@ / { compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; }; +&rproc_split { + status = "okay"; +}; + +&rproc_lockstep { + status = "disabled"; +}; + &eeprom { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index b61fc99cd911..602e6aba7ac5 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -247,19 +247,69 @@ fpga_full: fpga-full { ranges; }; - remoteproc { + rproc_lockstep: remoteproc@ffe00000 { compatible = "xlnx,zynqmp-r5fss"; xlnx,cluster-mode = <1>; - r5f-0 { + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x20000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x20000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x20000>, <0x0 0x20000 0x0 0x20000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>; + }; + }; + + rproc_split: remoteproc-split@ffe00000 { + status = "disabled"; + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_0>; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; memory-region = <&rproc_0_fw_image>; }; - r5f-1 { + r5f@1 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_1>; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; memory-region = <&rproc_1_fw_image>; }; }; From patchwork Fri Oct 13 04:22:28 2023 Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2023 04:23:39.1833 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 155f68b3-f6bb-494b-b884-08dbcba42cf3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A107.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4965 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Use TCM pm domains extracted from device-tree to power on/off TCM using general pm domain framework. Signed-off-by: Tanmay Shah --- Changes in v6: - Remove spurious change - Handle errors in add_pm_domains function - Remove redundant code to handle errors from remove_pm_domains drivers/remoteproc/xlnx_r5_remoteproc.c | 262 ++++++++++++++++++++++-- 1 file changed, 243 insertions(+), 19 deletions(-) diff --git a/drivers/remoteproc/xlnx_r5_remoteproc.c b/drivers/remoteproc/xlnx_r5_remoteproc.c index 4395edea9a64..04e95d880184 100644 --- a/drivers/remoteproc/xlnx_r5_remoteproc.c +++ b/drivers/remoteproc/xlnx_r5_remoteproc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "remoteproc_internal.h" @@ -102,6 +103,12 @@ static const struct mem_bank_data zynqmp_tcm_banks_lockstep[] = { * @rproc: rproc handle * @pm_domain_id: RPU CPU power domain id * @ipi: pointer to mailbox information + * @num_pm_dev: number of tcm pm domain devices for this core + * @pm_dev1: pm domain virtual devices for power domain framework + * @pm_dev_link1: pm domain device links after registration + * @pm_dev2: used only in lockstep mode. second core's pm domain virtual devices + * @pm_dev_link2: used only in lockstep mode. second core's pm device links after + * registration */ struct zynqmp_r5_core { struct device *dev; @@ -111,6 +118,11 @@ struct zynqmp_r5_core { struct rproc *rproc; u32 pm_domain_id; struct mbox_info *ipi; + int num_pm_dev; + struct device **pm_dev1; + struct device_link **pm_dev_link1; + struct device **pm_dev2; + struct device_link **pm_dev_link2; }; /** @@ -575,12 +587,21 @@ static int add_tcm_carveout_split_mode(struct rproc *rproc) bank_size = r5_core->tcm_banks[i]->size; pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - ret = zynqmp_pm_request_node(pm_domain_id, - ZYNQMP_PM_CAPABILITY_ACCESS, 0, - ZYNQMP_PM_REQUEST_ACK_BLOCKING); - if (ret < 0) { - dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); - goto release_tcm_split; + /* + * If TCM information is available in device-tree then + * in that case, pm domain framework will power on/off TCM. + * In that case pm_domain_id is set to 0. If hardcode + * bindings from driver is used, then only this driver will + * use pm_domain_id. + */ + if (pm_domain_id) { + ret = zynqmp_pm_request_node(pm_domain_id, + ZYNQMP_PM_CAPABILITY_ACCESS, 0, + ZYNQMP_PM_REQUEST_ACK_BLOCKING); + if (ret < 0) { + dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); + goto release_tcm_split; + } } dev_dbg(dev, "TCM carveout split mode %s addr=%llx, da=0x%x, size=0x%lx", @@ -646,13 +667,16 @@ static int add_tcm_carveout_lockstep_mode(struct rproc *rproc) for (i = 0; i < num_banks; i++) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - /* Turn on each TCM bank individually */ - ret = zynqmp_pm_request_node(pm_domain_id, - ZYNQMP_PM_CAPABILITY_ACCESS, 0, - ZYNQMP_PM_REQUEST_ACK_BLOCKING); - if (ret < 0) { - dev_err(dev, "failed to turn on TCM 0x%x", pm_domain_id); - goto release_tcm_lockstep; + if (pm_domain_id) { + /* Turn on each TCM bank individually */ + ret = zynqmp_pm_request_node(pm_domain_id, + ZYNQMP_PM_CAPABILITY_ACCESS, 0, + ZYNQMP_PM_REQUEST_ACK_BLOCKING); + if (ret < 0) { + dev_err(dev, "failed to turn on TCM 0x%x", + pm_domain_id); + goto release_tcm_lockstep; + } } bank_size = r5_core->tcm_banks[i]->size; @@ -687,7 +711,8 @@ static int add_tcm_carveout_lockstep_mode(struct rproc *rproc) /* If failed, Turn off all TCM banks turned on before */ for (i--; i >= 0; i--) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - zynqmp_pm_release_node(pm_domain_id); + if (pm_domain_id) + zynqmp_pm_release_node(pm_domain_id); } return ret; } @@ -758,6 +783,192 @@ static int zynqmp_r5_parse_fw(struct rproc *rproc, const struct firmware *fw) return ret; } +static void zynqmp_r5_remove_pm_domains(struct rproc *rproc) +{ + struct zynqmp_r5_core *r5_core = rproc->priv; + struct device *dev = r5_core->dev; + struct zynqmp_r5_cluster *cluster; + int i; + + cluster = platform_get_drvdata(to_platform_device(dev->parent)); + + for (i = 1; i < r5_core->num_pm_dev; i++) { + device_link_del(r5_core->pm_dev_link1[i]); + dev_pm_domain_detach(r5_core->pm_dev1[i], false); + } + + kfree(r5_core->pm_dev1); + r5_core->pm_dev1 = NULL; + kfree(r5_core->pm_dev_link1); + r5_core->pm_dev_link1 = NULL; + + if (cluster->mode == SPLIT_MODE) { + r5_core->num_pm_dev = 0; + return; + } + + for (i = 1; i < r5_core->num_pm_dev; i++) { + device_link_del(r5_core->pm_dev_link2[i]); + dev_pm_domain_detach(r5_core->pm_dev2[i], false); + } + + kfree(r5_core->pm_dev2); + r5_core->pm_dev2 = NULL; + kfree(r5_core->pm_dev_link2); + r5_core->pm_dev_link2 = NULL; + r5_core->num_pm_dev = 0; +} + +static int zynqmp_r5_add_pm_domains(struct rproc *rproc) +{ + struct zynqmp_r5_core *r5_core = rproc->priv; + struct device *dev = r5_core->dev, *dev2; + struct zynqmp_r5_cluster *cluster; + struct platform_device *pdev; + struct device_node *np; + int i, j, num_pm_dev, ret; + + cluster = dev_get_drvdata(dev->parent); + + /* get number of power-domains */ + num_pm_dev = of_count_phandle_with_args(r5_core->np, "power-domains", + "#power-domain-cells"); + + if (num_pm_dev <= 0) + return -EINVAL; + + r5_core->pm_dev1 = kcalloc(num_pm_dev, + sizeof(struct device *), + GFP_KERNEL); + if (!r5_core->pm_dev1) + ret = -ENOMEM; + + r5_core->pm_dev_link1 = kcalloc(num_pm_dev, + sizeof(struct device_link *), + GFP_KERNEL); + if (!r5_core->pm_dev_link1) { + kfree(r5_core->pm_dev1); + r5_core->pm_dev1 = NULL; + return -ENOMEM; + } + + r5_core->num_pm_dev = num_pm_dev; + + /* + * start from 2nd entry in power-domains property list as + * for zynqmp we only add TCM power domains and not core's power domain. + */ + for (i = 1; i < r5_core->num_pm_dev; i++) { + r5_core->pm_dev1[i] = dev_pm_domain_attach_by_id(dev, i); + if (IS_ERR_OR_NULL(r5_core->pm_dev1[i])) { + dev_dbg(dev, "failed to attach pm domain %d, ret=%ld\n", i, + PTR_ERR(r5_core->pm_dev1[i])); + ret = -EINVAL; + goto fail_add_pm_domains; + } + r5_core->pm_dev_link1[i] = device_link_add(dev, r5_core->pm_dev1[i], + DL_FLAG_STATELESS | + DL_FLAG_RPM_ACTIVE | + DL_FLAG_PM_RUNTIME); + if (!r5_core->pm_dev_link1[i]) { + dev_pm_domain_detach(r5_core->pm_dev1[i], true); + r5_core->pm_dev1[i] = NULL; + ret = -EINVAL; + goto fail_add_pm_domains; + } + } + + if (cluster->mode == SPLIT_MODE) + return 0; + + r5_core->pm_dev2 = kcalloc(num_pm_dev, + sizeof(struct device *), + GFP_KERNEL); + if (!r5_core->pm_dev2) { + ret = -ENOMEM; + goto fail_add_pm_domains; + } + + r5_core->pm_dev_link2 = kcalloc(num_pm_dev, + sizeof(struct device_link *), + GFP_KERNEL); + if (!r5_core->pm_dev_link2) { + kfree(r5_core->pm_dev2); + r5_core->pm_dev2 = NULL; + ret = -ENOMEM; + goto fail_add_pm_domains; + } + + /* get second core's device to detach its power-domains */ + np = of_get_next_child(cluster->dev->of_node, of_node_get(dev->of_node)); + + pdev = of_find_device_by_node(np); + if (!pdev) { + dev_err(cluster->dev, "core1 platform device not available\n"); + kfree(r5_core->pm_dev2); + kfree(r5_core->pm_dev_link2); + r5_core->pm_dev2 = NULL; + r5_core->pm_dev_link2 = NULL; + ret = -EINVAL; + goto fail_add_pm_domains; + } + + dev2 = &pdev->dev; + + /* for zynqmp we only add TCM power domains and not core's power domain */ + for (j = 1; j < r5_core->num_pm_dev; j++) { + r5_core->pm_dev2[j] = dev_pm_domain_attach_by_id(dev2, j); + if (!r5_core->pm_dev2[j]) { + dev_dbg(dev, "can't attach to pm domain %d\n", j); + ret = -EINVAL; + goto fail_add_pm_domains_lockstep; + } else if (IS_ERR(r5_core->pm_dev2[j])) { + dev_dbg(dev, "can't attach to pm domain %d\n", j); + ret = PTR_ERR(r5_core->pm_dev2[j]); + goto fail_add_pm_domains_lockstep; + } + + r5_core->pm_dev_link2[j] = device_link_add(dev, r5_core->pm_dev2[j], + DL_FLAG_STATELESS | + DL_FLAG_RPM_ACTIVE | + DL_FLAG_PM_RUNTIME); + if (!r5_core->pm_dev_link2[j]) { + dev_pm_domain_detach(r5_core->pm_dev2[j], true); + r5_core->pm_dev2[j] = NULL; + ret = -ENODEV; + goto fail_add_pm_domains_lockstep; + } + } + +fail_add_pm_domains_lockstep: + while (j >= 1) { + if (r5_core->pm_dev_link2 && !IS_ERR_OR_NULL(r5_core->pm_dev_link2[j])) + device_link_del(r5_core->pm_dev_link2[j]); + if (r5_core->pm_dev2 && !IS_ERR_OR_NULL(r5_core->pm_dev2[j])) + dev_pm_domain_detach(r5_core->pm_dev2[j], true); + j--; + } + kfree(r5_core->pm_dev2); + r5_core->pm_dev2 = NULL; + kfree(r5_core->pm_dev_link2); + r5_core->pm_dev_link2 = NULL; + +fail_add_pm_domains: + while (i >= 1) { + if (r5_core->pm_dev_link1 && !IS_ERR_OR_NULL(r5_core->pm_dev_link1[i])) + device_link_del(r5_core->pm_dev_link1[i]); + if (r5_core->pm_dev1 && !IS_ERR_OR_NULL(r5_core->pm_dev1[i])) + dev_pm_domain_detach(r5_core->pm_dev1[i], true); + i--; + } + kfree(r5_core->pm_dev1); + r5_core->pm_dev1 = NULL; + kfree(r5_core->pm_dev_link1); + r5_core->pm_dev_link1 = NULL; + + return ret; +} + /** * zynqmp_r5_rproc_prepare() * adds carveouts for TCM bank and reserved memory regions @@ -770,19 +981,30 @@ static int zynqmp_r5_rproc_prepare(struct rproc *rproc) { int ret; + ret = zynqmp_r5_add_pm_domains(rproc); + if (ret) { + dev_err(&rproc->dev, "failed to add pm domains\n"); + return ret; + } + ret = add_tcm_banks(rproc); if (ret) { dev_err(&rproc->dev, "failed to get TCM banks, err %d\n", ret); - return ret; + goto fail_prepare; } ret = add_mem_regions_carveout(rproc); if (ret) { dev_err(&rproc->dev, "failed to get reserve mem regions %d\n", ret); - return ret; + goto fail_prepare; } return 0; + +fail_prepare: + zynqmp_r5_remove_pm_domains(rproc); + + return ret; } /** @@ -801,11 +1023,13 @@ static int zynqmp_r5_rproc_unprepare(struct rproc *rproc) r5_core = rproc->priv; + zynqmp_r5_remove_pm_domains(rproc); + for (i = 0; i < r5_core->tcm_bank_count; i++) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - if (zynqmp_pm_release_node(pm_domain_id)) - dev_warn(r5_core->dev, - "can't turn off TCM bank 0x%x", pm_domain_id); + if (pm_domain_id && zynqmp_pm_release_node(pm_domain_id)) + dev_dbg(r5_core->dev, + "can't turn off TCM bank 0x%x", pm_domain_id); } return 0; From patchwork Fri Oct 13 04:22:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shah, Tanmay" X-Patchwork-Id: 13420136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A9C4CDB482 for ; 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Thu, 12 Oct 2023 23:23:38 -0500 From: Tanmay Shah To: , , , , , , , CC: , , , Subject: [PATCH v6 4/4] remoteproc: zynqmp: parse TCM from device tree Date: Thu, 12 Oct 2023 21:22:29 -0700 Message-ID: <20231013042229.3954527-5-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231013042229.3954527-1-tanmay.shah@amd.com> References: <20231013042229.3954527-1-tanmay.shah@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBE:EE_|DM4PR12MB6255:EE_ X-MS-Office365-Filtering-Correlation-Id: fa903dc4-07ea-4047-8ae2-08dbcba42dce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: xdfPLn93pr0LFJAs7GCwNmNM8u9sc5FuAbvwGl8vuF0/+HG4wbQGBc++ZgnAiXbB+OWAkRQtWpQcG4e8Ob4b7s+4nMt9kOfHYd0Yi++UreKK1HA4LmPN9Kc/1GCN9jMGrz3xwFWQauGIYpUrDEtbj76jqqgRQHnAzR6h2R36xgzPAPi4mu1iw0ONnUvWs7XBWOZp35zpMTVv4lwT8yMZbJj2VA3ctbXj7/Aivy7MF1pwdQ6I5xzMHAog3js65juYB73z/nyNXCha83ml+0NvBr/DxwLSgAa8jxmWR60teSgcQOp923UnaH50UjAZF2vsQMODfQWhNo5qhfl0WfRAe+aBal9iT5tOl2mbcl4atkRVKtu6cCsB+7kdZrnUffL/7p3AAYN4IuLmKJtNnEn80v7A+h1oJAIDTKDnM0N4rDavW0xJUN8f/90Bc+5OvwaI5rBuVsn/cXA2NXT4GqYnhHLNI4FXTyac1P2D6juuo6VCz+JE3UuT6eVVg69gMLJaAu9DWEyVSvglh8sfb6OpJ2BaqF1HYQbT2qjdnGQ2FYzjZcOx/fS+WTivUyxrvq603aZJH9OkUhBBEU6BTii7nKw8729qhajjllg6JeGPEEbAqHV2DLJ+C2mqQJ/pZFGGq+Cv7bpAFhwA8VpAXvnd41PF0UXDDtg3fCOJX0AohGJfvWN4USkYl0bvjK14LK5izOHtcwNEBr55t0RQI353pehwVO0+y90Rctwvwqlf/ji5xAoSaUP6mE5YNydXl83trncKiVQSXt660uzi1Jo33Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(39860400002)(136003)(376002)(396003)(230922051799003)(1800799009)(186009)(82310400011)(451199024)(64100799003)(40470700004)(36840700001)(46966006)(6666004)(2906002)(40460700003)(478600001)(41300700001)(4326008)(8936002)(8676002)(5660300002)(66899024)(40480700001)(44832011)(70586007)(54906003)(70206006)(110136005)(316002)(36756003)(83380400001)(47076005)(26005)(82740400003)(336012)(426003)(36860700001)(2616005)(81166007)(7049001)(356005)(1076003)(86362001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2023 04:23:40.5549 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa903dc4-07ea-4047-8ae2-08dbcba42dce X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6255 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org ZynqMP TCM information is fixed in driver. Now ZynqMP TCM information is available in device-tree. Parse TCM information in driver as per new bindings. Signed-off-by: Tanmay Shah --- Changes in v6: - Missing . at the end of the commit message - remove redundant initialization of variables - remove fail_tcm label and relevant code to free memory acquired using devm_* API. As this will be freed when device free it - add extra check to see if "reg" property is supported or not drivers/remoteproc/xlnx_r5_remoteproc.c | 106 ++++++++++++++++++++++-- 1 file changed, 98 insertions(+), 8 deletions(-) diff --git a/drivers/remoteproc/xlnx_r5_remoteproc.c b/drivers/remoteproc/xlnx_r5_remoteproc.c index 04e95d880184..8c3575970c1d 100644 --- a/drivers/remoteproc/xlnx_r5_remoteproc.c +++ b/drivers/remoteproc/xlnx_r5_remoteproc.c @@ -75,8 +75,8 @@ struct mbox_info { }; /* - * Hardcoded TCM bank values. This will be removed once TCM bindings are - * accepted for system-dt specifications and upstreamed in linux kernel + * Hardcoded TCM bank values. This will stay in driver to maintain backward + * compatibility with device-tree that does not have TCM information. */ static const struct mem_bank_data zynqmp_tcm_banks_split[] = { {0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */ @@ -613,7 +613,8 @@ static int add_tcm_carveout_split_mode(struct rproc *rproc) bank_name); if (!rproc_mem) { ret = -ENOMEM; - zynqmp_pm_release_node(pm_domain_id); + if (pm_domain_id) + zynqmp_pm_release_node(pm_domain_id); goto release_tcm_split; } @@ -626,7 +627,8 @@ static int add_tcm_carveout_split_mode(struct rproc *rproc) /* If failed, Turn off all TCM banks turned on before */ for (i--; i >= 0; i--) { pm_domain_id = r5_core->tcm_banks[i]->pm_domain_id; - zynqmp_pm_release_node(pm_domain_id); + if (pm_domain_id) + zynqmp_pm_release_node(pm_domain_id); } return ret; } @@ -940,6 +942,8 @@ static int zynqmp_r5_add_pm_domains(struct rproc *rproc) } } + return 0; + fail_add_pm_domains_lockstep: while (j >= 1) { if (r5_core->pm_dev_link2 && !IS_ERR_OR_NULL(r5_core->pm_dev_link2[j])) @@ -1102,6 +1106,83 @@ static struct zynqmp_r5_core *zynqmp_r5_add_rproc_core(struct device *cdev) return ERR_PTR(ret); } +static int zynqmp_r5_get_tcm_node_from_dt(struct zynqmp_r5_cluster *cluster) +{ + struct zynqmp_r5_core *r5_core; + int i, j, tcm_bank_count, ret; + struct platform_device *cpdev; + struct mem_bank_data *tcm; + struct device_node *np; + struct resource *res; + u64 abs_addr, size; + struct device *dev; + + for (i = 0; i < cluster->core_count; i++) { + r5_core = cluster->r5_cores[i]; + dev = r5_core->dev; + np = dev_of_node(dev); + + /* we have address cell 2 and size cell as 2 */ + ret = of_property_count_elems_of_size(np, "reg", + 4 * sizeof(u32)); + if (ret <= 0) { + dev_err(dev, "can't get reg property err %d\n", ret); + return -EINVAL; + } + + tcm_bank_count = ret; + + r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count, + sizeof(struct mem_bank_data *), + GFP_KERNEL); + if (!r5_core->tcm_banks) + ret = -ENOMEM; + + r5_core->tcm_bank_count = tcm_bank_count; + for (j = 0; j < tcm_bank_count; j++) { + tcm = devm_kzalloc(dev, sizeof(struct mem_bank_data *), + GFP_KERNEL); + if (!tcm) + return -ENOMEM; + + r5_core->tcm_banks[j] = tcm; + + /* get tcm address without translation */ + ret = of_property_read_reg(np, j, &abs_addr, &size); + if (ret) { + dev_err(dev, "failed to get reg property\n"); + return ret; + } + + /* + * remote processor can address only 32 bits + * so convert 64-bits into 32-bits. This will discard + * any unwanted upper 32-bits. + */ + tcm->da = (u32)abs_addr; + tcm->size = (u32)size; + + cpdev = to_platform_device(dev); + res = platform_get_resource(cpdev, IORESOURCE_MEM, j); + if (!res) { + dev_err(dev, "failed to get tcm resource\n"); + return -EINVAL; + } + + tcm->addr = (u32)res->start; + tcm->bank_name = (char *)res->name; + res = devm_request_mem_region(dev, tcm->addr, tcm->size, + tcm->bank_name); + if (!res) { + dev_err(dev, "failed to request tcm resource\n"); + return -EINVAL; + } + } + } + + return 0; +} + /** * zynqmp_r5_get_tcm_node() * Ideally this function should parse tcm node and store information @@ -1180,10 +1261,19 @@ static int zynqmp_r5_core_init(struct zynqmp_r5_cluster *cluster, struct zynqmp_r5_core *r5_core; int ret, i; - ret = zynqmp_r5_get_tcm_node(cluster); - if (ret < 0) { - dev_err(dev, "can't get tcm node, err %d\n", ret); - return ret; + r5_core = cluster->r5_cores[0]; + if (of_find_property(r5_core->np, "reg", NULL)) { + ret = zynqmp_r5_get_tcm_node_from_dt(cluster); + if (ret) { + dev_err(dev, "can't get tcm node from dt, err %d\n", ret); + return ret; + } + } else { + ret = zynqmp_r5_get_tcm_node(cluster); + if (ret < 0) { + dev_err(dev, "can't get tcm node, err %d\n", ret); + return ret; + } } for (i = 0; i < cluster->core_count; i++) {