From patchwork Mon Oct 23 10:22:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13432727 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFA15CDB474 for ; Mon, 23 Oct 2023 10:22:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229781AbjJWKW4 (ORCPT ); Mon, 23 Oct 2023 06:22:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229671AbjJWKWz (ORCPT ); Mon, 23 Oct 2023 06:22:55 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E1E2D71 for ; Mon, 23 Oct 2023 03:22:52 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-40907b82ab9so1494605e9.1 for ; Mon, 23 Oct 2023 03:22:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1698056571; x=1698661371; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pww7da1n7UWS02L2LkSYEEM6OsT/YObeILUz4Nv4Nyo=; b=Zg1PMzYSY/svIeo1uSb0GBD5CVAGdmQ3IvbbI7HUGWnQbWtwscgLGpPJ/zgrdWv+sV tfPBRQBTFTBHpfQcUWgGQcaLydfbPwhNrkTqF8KG9ZstcnmD+Uuwu1r0Za6dp5Ez4Q1v oWkmRNvMNu4+LxeHmXxvPrKZlWa9UYK9ausu8lAcEfumSaR9LuzOYiYdbJSCzyafo7uR MdHs6yF3z7JKhk0WxyN9SvLFx6tkXozwjyC3dSD1jp1yN8d4JhR2OXN0nUuze+y+aQdG bozQ/Q7ltCmwda4+b0nryhPC7GHli4+BURsbJy10uKe2Xgd06j9h+TZndOhnKR9IMcns vLpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698056571; x=1698661371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pww7da1n7UWS02L2LkSYEEM6OsT/YObeILUz4Nv4Nyo=; b=wIt4kus/XlHg1yqmKfkVFvBnVKjApwsKYRmS2sVZvc3ANJwvh3b7wnaSkNfNUgUfIw 5E3AM75ioOSk+GV6So7VBUGBU1ax9dc1G/yWntO00EpLlMlpp8yzql1kBFD6nQNcHFSE qLn535QzjEH137TEZZ7gvfd+ig+xLwGHYh53L1sXPwCcNZOsl5lAAzpFXaUDLXXrl9aF ZXlEWEEXzOFTKJmnLfLd1WdxKu2mgVJUluUI0eGjbpRwzcrh0Q18suCEW7t9VdhqrHrw acggv+W2Un/hpQoOT1NpaNWEgHoCCXviSw6Dey5HwEgC6+snhXlj6moK1NLlMNNU/wv2 yRnw== X-Gm-Message-State: AOJu0YyCZMI6P+rEoIbGqD1Y42NN5VOU+DvNWFfZ1JVL8ycxknIA56zV odTtHJ07m8XAl75qetQYsuIFmQ== X-Google-Smtp-Source: AGHT+IHG+ByNpckXdtbAjkLS73leG1MuuYY26azOQjkLbervqzdsRg3e+b+9MLQ7/FEaNzlIse/tiw== X-Received: by 2002:a05:600c:4fc6:b0:405:19dd:ad82 with SMTP id o6-20020a05600c4fc600b0040519ddad82mr8563116wmq.16.1698056570768; Mon, 23 Oct 2023 03:22:50 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:50 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 1/7] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: document RZ/G3S Date: Mon, 23 Oct 2023 13:22:17 +0300 Message-Id: <20231023102223.1309614-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Document RZ/G3S (R9108G045) interrupt controller. This has few extra functionalities compared with RZ/G2UL but the already existing driver could still be used. Signed-off-by: Claudiu Beznea Acked-by: Conor Dooley --- .../bindings/interrupt-controller/renesas,rzg2l-irqc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml index 2ef3081eaaf3..d3b5aec0a3f7 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml @@ -26,6 +26,7 @@ properties: - renesas,r9a07g043u-irqc # RZ/G2UL - renesas,r9a07g044-irqc # RZ/G2{L,LC} - renesas,r9a07g054-irqc # RZ/V2L + - renesas,r9a08g045-irqc # RZ/G3S - const: renesas,rzg2l-irqc '#interrupt-cells': @@ -167,7 +168,9 @@ allOf: properties: compatible: contains: - const: renesas,r9a07g043u-irqc + enum: + - renesas,r9a07g043u-irqc + - renesas,r9a08g045-irqc then: properties: interrupts: From patchwork Mon Oct 23 10:22:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13432729 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F329FCDB474 for ; Mon, 23 Oct 2023 10:23:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229829AbjJWKW5 (ORCPT ); Mon, 23 Oct 2023 06:22:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229572AbjJWKW4 (ORCPT ); Mon, 23 Oct 2023 06:22:56 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3ED29D5D for ; Mon, 23 Oct 2023 03:22:54 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-5079f6efd64so4235378e87.2 for ; Mon, 23 Oct 2023 03:22:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1698056572; x=1698661372; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CbHBU/qjptH7973ShNtrvZ+jIeyRnDw/f4+sWGsFAeg=; b=AI3ov+zzvFAXzySkRgCZkteWyvTit8xY84xqFQJ1eFGYd4IKtPCufAKWZrNf14HP4X a0cf5oth+qwvLm02pEacyyNCSZHxGd2Va6FZ/Xn8zvNc+uccX6UG81+5FO2bMz3ha8Wi pxKIjD+3zB0WzW7MmvJMCZuclL7Pp6ta2vQCty7L35CM73K+5kzfIK35UDlHuG5a17Oo jAbFb3UUwYoeBqG/9dmavZkXtPAlDNHTD/tlOR/ufG0VNRGrYPYny55B+CG6LNsDXNBW fVcHwv//Uj+rPdizK+0RX8kd3kvf0iKWHPaudXKahrdFoeYwOBzpshq37Hg7b9obTzEu 2EJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698056572; x=1698661372; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CbHBU/qjptH7973ShNtrvZ+jIeyRnDw/f4+sWGsFAeg=; b=aXo5kp8Tc4hMdNDcUOKeTlXwsnB1jMEPg+On+1P/8sCUWJbZifTdp+qvzeRK2D1mLK kNSjndG4jocudcQVGYfZCCZ9Fs1piV/X4oBEfIAXEFb2jaeOKiYUHpleZPv9sh+G3LEl Ly060bOf8xmEUyzlqvAi+MQc7Lw4RX7KndHmDGsBkzJ+nOcwA4ftm6adcsXzc4OyQhGx Er9aZ6LiNc3D4a/CdFKQQ6NYcx+5IxSU3/nIgKdShRPk1o2UWuSivw3HcelMzJmDeHPk MBMoDKo269LrbCZutViS4kw+RycabGPxSj7TUYVSU5T209FOw1mGvNYSAvKQ4dL0b4dK GAoA== X-Gm-Message-State: AOJu0YypWBokP+SaMDUdnXP30VlweDBWzqMMX/CbkMmga+9bRZ1X+fgP aZ+k4QsEezyQVt3NKw7+vc87BA== X-Google-Smtp-Source: AGHT+IG+A8PxhX3r2zNXyOFC/Pv2bjvaEKWAWClyOzEZkebxv/h7AmSVTYIlQq521dqF7Ya8MRjrzQ== X-Received: by 2002:a19:650f:0:b0:507:984b:f174 with SMTP id z15-20020a19650f000000b00507984bf174mr4919458lfb.48.1698056572469; Mon, 23 Oct 2023 03:22:52 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:52 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 2/7] clk: renesas: r9a08g045: add IA55 pclk and its reset Date: Mon, 23 Oct 2023 13:22:18 +0300 Message-Id: <20231023102223.1309614-3-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Add IA55 pclk and its reset. Signed-off-by: Claudiu Beznea --- drivers/clk/renesas/r9a08g045-cpg.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c index 4394cb241d99..ea3beca8b4e0 100644 --- a/drivers/clk/renesas/r9a08g045-cpg.c +++ b/drivers/clk/renesas/r9a08g045-cpg.c @@ -188,6 +188,7 @@ static const struct cpg_core_clk r9a08g045_core_clks[] __initconst = { static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = { DEF_MOD("gic_gicclk", R9A08G045_GIC600_GICCLK, R9A08G045_CLK_P1, 0x514, 0), + DEF_MOD("ia55_pclk", R9A08G045_IA55_PCLK, R9A08G045_CLK_P2, 0x518, 0), DEF_MOD("ia55_clk", R9A08G045_IA55_CLK, R9A08G045_CLK_P1, 0x518, 1), DEF_MOD("dmac_aclk", R9A08G045_DMAC_ACLK, R9A08G045_CLK_P3, 0x52c, 0), DEF_MOD("sdhi0_imclk", R9A08G045_SDHI0_IMCLK, CLK_SD0_DIV4, 0x554, 0), @@ -209,6 +210,7 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = { static const struct rzg2l_reset r9a08g045_resets[] = { DEF_RST(R9A08G045_GIC600_GICRESET_N, 0x814, 0), DEF_RST(R9A08G045_GIC600_DBG_GICRESET_N, 0x814, 1), + DEF_RST(R9A08G045_IA55_RESETN, 0x818, 0), DEF_RST(R9A08G045_SDHI0_IXRST, 0x854, 0), DEF_RST(R9A08G045_SDHI1_IXRST, 0x854, 1), DEF_RST(R9A08G045_SDHI2_IXRST, 0x854, 2), @@ -220,6 +222,7 @@ static const struct rzg2l_reset r9a08g045_resets[] = { static const unsigned int r9a08g045_crit_mod_clks[] __initconst = { MOD_CLK_BASE + R9A08G045_GIC600_GICCLK, + MOD_CLK_BASE + R9A08G045_IA55_PCLK, MOD_CLK_BASE + R9A08G045_IA55_CLK, MOD_CLK_BASE + R9A08G045_DMAC_ACLK, }; From patchwork Mon Oct 23 10:22:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13432728 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24519C25B44 for ; Mon, 23 Oct 2023 10:23:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230351AbjJWKXA (ORCPT ); Mon, 23 Oct 2023 06:23:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229870AbjJWKW7 (ORCPT ); Mon, 23 Oct 2023 06:22:59 -0400 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9352D65 for ; Mon, 23 Oct 2023 03:22:55 -0700 (PDT) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4084de32db5so27102625e9.0 for ; Mon, 23 Oct 2023 03:22:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1698056574; x=1698661374; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3Z3b5R3aVTqODhp8NQxqeuw9pHs0voRMGZXxgXHi6Uc=; b=ZRHh/8fTc+bG5lyErmfv3eNjCjr5VDO8Xod1FwiHOqr8/YDJYHg8+dvRmfSY2CSrud UzJ4ElchPZ87xGsoOZfr31KL1QOKvcFejmj/cydrg0hrKMNgVz8qepwb4x7M1W+oZ5sI ynqzVVTiUeP2hqeBKfO8DlY/K9r3MZtZyDP3R721G6E+Ub433CMOioLI5pDPOvd3vCvw QCJg1bJ/OLBG5vqgZbuwFbkWuD5/vcH4FbGf8SmhwhdYf0RMGa916RJVy9WPbIQVvmF1 1pp8bvtZieM3HGma12E5EiBOeNFQmJEt9F3uPCG7H1AArM+3g8huU7+gOtLiBv/ADhPC pL7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698056574; x=1698661374; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3Z3b5R3aVTqODhp8NQxqeuw9pHs0voRMGZXxgXHi6Uc=; b=DTgd0g2Oo9BQ2M1VUbisW5G3hcGU9JflzPVQEGtMRLP1p3ME2Ii1v29XXkjbp/Fg6a Tsi4Iz22oSJAhvYhCNv2DW06Lu4ftK20VrHskjzDmbgutEGjICIizDma0913arDFjSN2 EF/QmxiEpaO90DYDVQr8YZj0YZmkU2Gzmzwge7lyGOMvvUkg5WgtkmkpDKVIiRexfedR 4zLFfW4h3SPW2ma9lVx9XFtOv06Z6NItBninJtSeH+SzYM9OSESGqxxyFocR+3dwnoe6 fEAPIU+LpzcKVe9LRRxrBJM0f3kTjT/dSa62HHleNXyuroOAGaEDkGHx/y0IYgaPxlyG xy5A== X-Gm-Message-State: AOJu0YyGDa6Kx+pgwvvgugLKWERlk76P88e67E72gq70CBfrLj/mAk42 An/Ga9Hgo7v1i+c9F8xsrfioUA== X-Google-Smtp-Source: AGHT+IFPNP9wFXpWAeNUc8oSbtz4KZ3/HL1DkO3btuCTk2wBwJPnDj961HvE0OE5JIunNgsa235u5w== X-Received: by 2002:a05:600c:a47:b0:408:3e7a:82ea with SMTP id c7-20020a05600c0a4700b004083e7a82eamr7010065wmq.1.1698056574124; Mon, 23 Oct 2023 03:22:54 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:53 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 3/7] irqchip/renesas-rzg2l: add macros to retrieve TITSR index and associated selector Date: Mon, 23 Oct 2023 13:22:19 +0300 Message-Id: <20231023102223.1309614-4-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Add macros to retrieve TITSR register index and associated selector. Signed-off-by: Claudiu Beznea --- drivers/irqchip/irq-renesas-rzg2l.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c index fe8d516f3614..9ce0d6d67486 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -28,8 +28,7 @@ #define ISCR 0x10 #define IITSR 0x14 #define TSCR 0x20 -#define TITSR0 0x24 -#define TITSR1 0x28 +#define TITSR(n) (0x24 + (n) * 4) #define TITSR0_MAX_INT 16 #define TITSEL_WIDTH 0x2 #define TSSR(n) (0x30 + ((n) * 4)) @@ -45,6 +44,8 @@ #define TITSR_TITSEL_EDGE_FALLING 1 #define TITSR_TITSEL_LEVEL_HIGH 2 #define TITSR_TITSEL_LEVEL_LOW 3 +#define TITSR_HWIRQ_TO_INDEX(hwirq) ((hwirq) >> TITSR0_MAX_INT) +#define TITSR_HWIRQ_TO_SEL(hwirq) ((hwirq) & 0xF) /* 0xF = TITSR0_MAX_INT - 1*/ #define IITSR_IITSEL(n, sense) ((sense) << ((n) * 2)) #define IITSR_IITSEL_LEVEL_LOW 0 @@ -185,12 +186,10 @@ static int rzg2l_irq_set_type(struct irq_data *d, unsigned int type) static int rzg2l_tint_set_edge(struct irq_data *d, unsigned int type) { + unsigned int hwirq = irqd_to_hwirq(d) - IRQC_TINT_START; struct rzg2l_irqc_priv *priv = irq_data_to_priv(d); - unsigned int hwirq = irqd_to_hwirq(d); - u32 titseln = hwirq - IRQC_TINT_START; - u32 offset; + u32 index, sel, reg; u8 sense; - u32 reg; switch (type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_EDGE_RISING: @@ -205,17 +204,14 @@ static int rzg2l_tint_set_edge(struct irq_data *d, unsigned int type) return -EINVAL; } - offset = TITSR0; - if (titseln >= TITSR0_MAX_INT) { - titseln -= TITSR0_MAX_INT; - offset = TITSR1; - } + index = TITSR_HWIRQ_TO_INDEX(hwirq); + sel = TITSR_HWIRQ_TO_SEL(hwirq); raw_spin_lock(&priv->lock); - reg = readl_relaxed(priv->base + offset); - reg &= ~(IRQ_MASK << (titseln * TITSEL_WIDTH)); - reg |= sense << (titseln * TITSEL_WIDTH); - writel_relaxed(reg, priv->base + offset); + reg = readl_relaxed(priv->base + TITSR(index)); + reg &= ~(IRQ_MASK << (sel * TITSEL_WIDTH)); + reg |= sense << (sel * TITSEL_WIDTH); + writel_relaxed(reg, priv->base + TITSR(index)); raw_spin_unlock(&priv->lock); return 0; From patchwork Mon Oct 23 10:22:20 2023 Content-Type: text/plain; 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([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:55 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 4/7] irqchip/renesas-rzg2l: implement restriction when writing ISCR register Date: Mon, 23 Oct 2023 13:22:20 +0300 Message-Id: <20231023102223.1309614-5-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea In hardware manual of RZ/G2L (r01uh0914ej0130-rzg2l-rzg2lc.pdf) is available the following statement with regards to clearing interrupts though ISCR register: [Write operation] When "Falling-edge detection", "Rising-edge detection" or "Falling/Rising-edge detection" is set in ISCR.: - In case ISTAT is 1 0: IRQn interrupt detection status is cleared. 1: Invalid to write. - In case ISTAT is 0 Invalid to write. When “Low-level detection” is set in IITSR.: Invalid to write. Thus, take into account interrupt type when clearing interrupts though ISCR register. Signed-off-by: Claudiu Beznea --- drivers/irqchip/irq-renesas-rzg2l.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c index 9ce0d6d67486..1ed9cb7178fa 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -73,11 +73,17 @@ static void rzg2l_irq_eoi(struct irq_data *d) unsigned int hw_irq = irqd_to_hwirq(d) - IRQC_IRQ_START; struct rzg2l_irqc_priv *priv = irq_data_to_priv(d); u32 bit = BIT(hw_irq); - u32 reg; + u32 iitsr, iscr; - reg = readl_relaxed(priv->base + ISCR); - if (reg & bit) - writel_relaxed(reg & ~bit, priv->base + ISCR); + iscr = readl_relaxed(priv->base + ISCR); + iitsr = readl_relaxed(priv->base + IITSR); + + /* + * ISCR could be cleared only if type is falling-edge, rising-edge or + * falling/rising-edge. + */ + if ((iscr & bit) && (iitsr & IITSR_IITSEL_MASK(hw_irq))) + writel_relaxed(iscr & ~bit, priv->base + ISCR); } static void rzg2l_tint_eoi(struct irq_data *d) From patchwork Mon Oct 23 10:22:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13432731 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B30BC001E0 for ; Mon, 23 Oct 2023 10:23:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232261AbjJWKXG (ORCPT ); Mon, 23 Oct 2023 06:23:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbjJWKXB (ORCPT ); Mon, 23 Oct 2023 06:23:01 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84691D65 for ; Mon, 23 Oct 2023 03:22:59 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id 38308e7fff4ca-2c50906f941so47032351fa.2 for ; Mon, 23 Oct 2023 03:22:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1698056578; x=1698661378; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DGt7Al+kGOhABFI1AhgrdMNJArcSe/mnGzlQw6oBpxk=; b=NJvDDllK2yzaDs0FrM/ZEQD6LofmpNHfAG+9aWyGkAqWIIxI1r5cUOO7fgvJRMelfM brH9Hdy7InoU83DTuiVvyRd4qJ/jwWXYB40GdxpNzr//M+qkbeUnTnOCHxGILOh5btRe hqI5Ov8fcKWmBpHrvBAA4ZHyxJgPHAhxUfVmvvo5EvV0gGe4MFTzQb4zPV4HgjdYQKz+ m5sdfeY5dB9CsQgxwVe3ZKotUGgVDqKWY5sp8jtHh2l92wMq/LyvwMiE4RGEPaXIeTdF r37maysnm1pjfTQ3ZEp08HRouVZ2axAXm22KLeA+1tcfxRP4NKfIMCZ3mj7KCd/pAXPk rUwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698056578; x=1698661378; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DGt7Al+kGOhABFI1AhgrdMNJArcSe/mnGzlQw6oBpxk=; b=rOGtI87OfSqMdaPa2NR2INDFxs+XrS6cV45xyXZviElxz2Z/fGSaUsP06kJFVbSgDU PB5HXaqn9Ci9SAJlqFkAoJQzpnbSq14XcosWJk/X/gnThYTVp+aj5AyVeFZx/N7FvwlL WMXMcm0HUrBIQsd4N8lam0wjAf/bxtzLKycPYVmk5KeDp/dBhdV+itv8hi6URHUHqgCS s+uUGfwq/DVxgdOqpqdLFq8eLuIhQIV/SVIDn0ucXdoNAHjZFJv/o4gnEpR/ls5WYZWs ojlSLlQuOxbYtpAvOP9gxSIhSCl7zfN5TKbq7O5ITFuaWMq/RqFLl9Krksa2uJWdwvLx UktQ== X-Gm-Message-State: AOJu0YwHuHea8YgDrN6XtWxvuQ66Dbh83ILosq/Dcq6BM9xdZnHNfczZ UxBVGzKCVWVgLiG1j5sUe/exZw== X-Google-Smtp-Source: AGHT+IG1A2rjeG7FTf+YUXCRDv4d4+GXzTBYBVrZoCV3GNqvprajomL3vgjcmNNoSlBt50iG/V+nhw== X-Received: by 2002:a19:8c1c:0:b0:503:2877:67e3 with SMTP id o28-20020a198c1c000000b00503287767e3mr5712726lfd.6.1698056577645; Mon, 23 Oct 2023 03:22:57 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:57 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 5/7] irqchip/renesas-rzg2l: cache registers on suspend/resume Date: Mon, 23 Oct 2023 13:22:21 +0300 Message-Id: <20231023102223.1309614-6-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Cache registers content when going to suspend and restore them in resume as these may be lost when switching to deep sleep states. With this driver data has been marked as static to be able to play with it in struct syscon_ops::{suspend, resume}. Because IA55 input is from pin controller and IA55 resumes before pin controller we don't restore interrupt enable bits here but let the pinctrl to do it on IA55 behalf after pins are in proper state to avoid invalid interrupts. Signed-off-by: Claudiu Beznea --- drivers/irqchip/irq-renesas-rzg2l.c | 67 +++++++++++++++++++++++------ 1 file changed, 54 insertions(+), 13 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c index 1ed9cb7178fa..e5e158bf028d 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -18,6 +18,7 @@ #include #include #include +#include #define IRQC_IRQ_START 1 #define IRQC_IRQ_COUNT 8 @@ -39,6 +40,7 @@ #define TSSR_OFFSET(n) ((n) % 4) #define TSSR_INDEX(n) ((n) / 4) +#define TSSR_MAX_INDEX 8 #define TITSR_TITSEL_EDGE_RISING 0 #define TITSR_TITSEL_EDGE_FALLING 1 @@ -57,11 +59,22 @@ #define TINT_EXTRACT_HWIRQ(x) FIELD_GET(GENMASK(15, 0), (x)) #define TINT_EXTRACT_GPIOINT(x) FIELD_GET(GENMASK(31, 16), (x)) -struct rzg2l_irqc_priv { +/** + * struct rzg2l_irqc_reg_cache - register cache + * @iitsr: IITSR register + * @titsr: TITSR registers + */ +struct rzg2l_irqc_reg_cache { + u32 iitsr; + u32 titsr[2]; +}; + +static struct rzg2l_irqc_priv { void __iomem *base; struct irq_fwspec fwspec[IRQC_NUM_IRQ]; raw_spinlock_t lock; -}; + struct rzg2l_irqc_reg_cache cache; +} priv; static struct rzg2l_irqc_priv *irq_data_to_priv(struct irq_data *data) { @@ -238,6 +251,37 @@ static int rzg2l_irqc_set_type(struct irq_data *d, unsigned int type) return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH); } +static int rzg2l_irqc_irq_suspend(void) +{ + struct rzg2l_irqc_reg_cache *cache = &priv.cache; + + cache->iitsr = readl_relaxed(priv.base + IITSR); + for (u8 i = 0; i < 2; i++) + cache->titsr[i] = readl_relaxed(priv.base + TITSR(i)); + + return 0; +} + +static void rzg2l_irqc_irq_resume(void) +{ + struct rzg2l_irqc_reg_cache *cache = &priv.cache; + u8 i; + + /* + * Restore only interrupt type. TSSRx will be restored at the + * request of pin controller to avoid spurious interrupts due + * to invalid PIN states. + */ + for (i = 0; i < 2; i++) + writel_relaxed(cache->titsr[i], priv.base + TITSR(i)); + writel_relaxed(cache->iitsr, priv.base + IITSR); +} + +static struct syscore_ops rzg2l_irqc_syscore_ops = { + .suspend = rzg2l_irqc_irq_suspend, + .resume = rzg2l_irqc_irq_resume, +}; + static const struct irq_chip irqc_chip = { .name = "rzg2l-irqc", .irq_eoi = rzg2l_irqc_eoi, @@ -323,7 +367,6 @@ static int rzg2l_irqc_init(struct device_node *node, struct device_node *parent) struct irq_domain *irq_domain, *parent_domain; struct platform_device *pdev; struct reset_control *resetn; - struct rzg2l_irqc_priv *priv; int ret; pdev = of_find_device_by_node(node); @@ -336,15 +379,11 @@ static int rzg2l_irqc_init(struct device_node *node, struct device_node *parent) return -ENODEV; } - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; + priv.base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL); + if (IS_ERR(priv.base)) + return PTR_ERR(priv.base); - priv->base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); - - ret = rzg2l_irqc_parse_interrupts(priv, node); + ret = rzg2l_irqc_parse_interrupts(&priv, node); if (ret) { dev_err(&pdev->dev, "cannot parse interrupts: %d\n", ret); return ret; @@ -367,17 +406,19 @@ static int rzg2l_irqc_init(struct device_node *node, struct device_node *parent) goto pm_disable; } - raw_spin_lock_init(&priv->lock); + raw_spin_lock_init(&priv.lock); irq_domain = irq_domain_add_hierarchy(parent_domain, 0, IRQC_NUM_IRQ, node, &rzg2l_irqc_domain_ops, - priv); + &priv); if (!irq_domain) { dev_err(&pdev->dev, "failed to add irq domain\n"); ret = -ENOMEM; goto pm_put; } + register_syscore_ops(&rzg2l_irqc_syscore_ops); + return 0; pm_put: From patchwork Mon Oct 23 10:22:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13432732 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AA4AC004C0 for ; Mon, 23 Oct 2023 10:23:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232844AbjJWKXN (ORCPT ); Mon, 23 Oct 2023 06:23:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229781AbjJWKXF (ORCPT ); Mon, 23 Oct 2023 06:23:05 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0405AD79 for ; Mon, 23 Oct 2023 03:23:00 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4084e49a5e5so26919755e9.3 for ; Mon, 23 Oct 2023 03:23:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1698056579; x=1698661379; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X82FS37MpATKittBab30iZpigNPQeNpIZ7vC4jhKrjE=; b=oIfulWeSARbFBk5Tn2nGzAEftSL4CgvfON24Xo+SOvu/LySpcOe+jLZ6ccebBcYzG9 zeEFoIVlVK+fr27H+vdzzdlnU2cEvT4BIm6glYWSBfjoH6ja7oHPryMB0TNRucXhXpEZ N5SqdOcLieansqETjXiOLitCOPaUog/MIzeF078S1i3v6XqNuthw7BXI0EZQGxKH6cjF 7VopqMbhfKFkSFBVnDvYnBT5fx00ClgdCsnfSUIjv0/G5631Dj5h5EOzuZPOWOljIhIx MTzG8BbY/F3FyXItqvUDzg8ZQsMD09Iw4wamPYaCtX4XjUY/juadb4b+W/miCsRpvet2 9CYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698056579; x=1698661379; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X82FS37MpATKittBab30iZpigNPQeNpIZ7vC4jhKrjE=; b=qUlj+VhReH9aNbamLXvH3gv2PwXTa4aGDc4WjA9qWXa+5KlxvHSC2kIaNzUV/DVh6x AqWzLgk/LrUTXRSKmnX6upkjr1OnM0ektg04VTr+NRz/WDw4AEP+oBGNxkD3BETlU6Kh PUd1HX+DfqCXdTrzUOllNcV4iCM+/lt218/329uXenHh0nluOoebeuh28rkWZpRB3qvx ZA8rfnCfHr+NM3Opo5DTKS4IQ6ajFGylu13AM6hIEAQF1HqxQjyk5Gi7rjnK8H4ZWHT2 9VorLACVEehViXHaDJNjXYqkyXSItDC0hI3ACNIzCU18CcnWk09202l9TEFXDplD7tpR Navg== X-Gm-Message-State: AOJu0YzjGDnFb3IHzjoY31g1P3hDrCyKp/gUjQRiMRTvZCJ4LUN7DMtU z710XBzLE05eJ+Xdrt3mHI/3mQ== X-Google-Smtp-Source: AGHT+IFljXMqxHrslhD3f5aaczqeFQBtBIQnWV+U2sbvpYvMW9byaeQIqLPtr2IOqZNiNuJ+/np7GA== X-Received: by 2002:a05:600c:4f86:b0:408:f9ce:56c5 with SMTP id n6-20020a05600c4f8600b00408f9ce56c5mr3226751wmq.24.1698056579471; Mon, 23 Oct 2023 03:22:59 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:22:59 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 6/7] irqchip/renesas-rzg2l: use tabs instead of spaces Date: Mon, 23 Oct 2023 13:22:22 +0300 Message-Id: <20231023102223.1309614-7-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Use tabs instead of spaces in definition of TINT_EXTRACT_HWIRQ() and TINT_EXTRACT_GPIOINT() macros. Signed-off-by: Claudiu Beznea --- drivers/irqchip/irq-renesas-rzg2l.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c index e5e158bf028d..ce50745bba87 100644 --- a/drivers/irqchip/irq-renesas-rzg2l.c +++ b/drivers/irqchip/irq-renesas-rzg2l.c @@ -56,8 +56,8 @@ #define IITSR_IITSEL_EDGE_BOTH 3 #define IITSR_IITSEL_MASK(n) IITSR_IITSEL((n), 3) -#define TINT_EXTRACT_HWIRQ(x) FIELD_GET(GENMASK(15, 0), (x)) -#define TINT_EXTRACT_GPIOINT(x) FIELD_GET(GENMASK(31, 16), (x)) +#define TINT_EXTRACT_HWIRQ(x) FIELD_GET(GENMASK(15, 0), (x)) +#define TINT_EXTRACT_GPIOINT(x) FIELD_GET(GENMASK(31, 16), (x)) /** * struct rzg2l_irqc_reg_cache - register cache From patchwork Mon Oct 23 10:22:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13432733 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22D9DC001E0 for ; Mon, 23 Oct 2023 10:23:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229667AbjJWKXe (ORCPT ); Mon, 23 Oct 2023 06:23:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232696AbjJWKXW (ORCPT ); Mon, 23 Oct 2023 06:23:22 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E00510DC for ; Mon, 23 Oct 2023 03:23:04 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-40859dee28cso14318805e9.0 for ; Mon, 23 Oct 2023 03:23:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1698056581; x=1698661381; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8k0EshLjUbr1rifjRs+LM2thRC9AnbfURENQfGj3YpQ=; b=AOfZKPQSAysvBShUn6OhBwZz0U2uqB8/WTZquhn1yeVwbkDOhCZcwky8zXukYKGHd1 KwO/Ax1aM4E/WWjGePaaMXoHJbCm9k5t5MOGLzRaRuXcenxLOEvLbzlfF9m6J7VHndIZ unIF19g0XCtbWFO6u86qoiNGD4ibo2hUigGaqfivKjHBo5/V2kBDe2z5Q9WP+xlj411p xXxHzf245VB9nOTcd5xfrTgN9FuDcsdvKEvHMGgNs3RnK/EbLzg5gslsBZYcHPVWrxSe IdJj+iMvy1URciafBG1M/jXM14RCaPj5nYtkjjJZyzyCn/Ex5RUV8+waEEvHp1mCJBg9 m01w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698056581; x=1698661381; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8k0EshLjUbr1rifjRs+LM2thRC9AnbfURENQfGj3YpQ=; b=Aq1EHIenCGHWQQyhEbbP07i0a5WSjT874/Fui/FODj0tXqO3aiFUSVAd8RpGwBVmP1 BVMOa9nU7FnErh8lrz/vDTW7TDPX2Bf2e7JnsxdoIGKKmsJFG6d0lQwZAuS8/1qJxisg XhXI/mqxo1y9bZm3TXzCajX/hFec3MDjSwCEjZRSN9hGQ/ug0iZfv2vh5Ztpt8l8ZSgw qAtbBU5FS871zEqJbSxRX/hQWTwAvdWbJOUaCyL26Kc+oSxkdpUCZxQTYPSM9JFRRF5y 2Wg8/7qGq0SKEhZ7JB3XZD+VUMsmMbtlO1Oz//UA5DhO+ywY5OOO6kMWptEsqS6K2GV8 BOpg== X-Gm-Message-State: AOJu0Yz2FYn4lgPB5Hxqu3duhAo2wWrfOv0EB3lz0o1fQIGE1RHk05Rq naTxHKeTjXYy3oGv6k9KPWUtKg== X-Google-Smtp-Source: AGHT+IG3jAIdQfmC2Z+L5C+d69j5tDElEciqTF1dG/PBhVBTrAoiiDhk1pI0XMhW2i7pOJkPSg/a1Q== X-Received: by 2002:a05:600c:354b:b0:3fe:1b4e:c484 with SMTP id i11-20020a05600c354b00b003fe1b4ec484mr6753113wmq.5.1698056581462; Mon, 23 Oct 2023 03:23:01 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.185]) by smtp.gmail.com with ESMTPSA id 1-20020a05600c228100b0040596352951sm13593275wmf.5.2023.10.23.03.22.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 03:23:01 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 7/7] arm64: dts: renesas: r9108g045: add irqc Date: Mon, 23 Oct 2023 13:22:23 +0300 Message-Id: <20231023102223.1309614-8-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> References: <20231023102223.1309614-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Claudiu Beznea Add irqc node and set it as interrupt parent for pin controller. Signed-off-by: Claudiu Beznea --- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index 6c7b29b69d0e..010bca626855 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -96,6 +96,7 @@ pinctrl: pinctrl@11030000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + interrupt-parent = <&irqc>; gpio-ranges = <&pinctrl 0 0 152>; clocks = <&cpg CPG_MOD R9A08G045_GPIO_HCLK>; power-domains = <&cpg>; @@ -104,6 +105,73 @@ pinctrl: pinctrl@11030000 { <&cpg R9A08G045_GPIO_SPARE_RESETN>; }; + irqc: interrupt-controller@11050000 { + compatible = "renesas,r9a08g045-irqc", "renesas,rzg2l-irqc"; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0x11050000 0 0x10000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "nmi", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31", + "bus-err"; + clocks = <&cpg CPG_MOD R9A08G045_IA55_CLK>, + <&cpg CPG_MOD R9A08G045_IA55_PCLK>; + clock-names = "clk", "pclk"; + power-domains = <&cpg>; + resets = <&cpg R9A08G045_IA55_RESETN>; + }; + sdhi0: mmc@11c00000 { compatible = "renesas,sdhi-r9a08g045", "renesas,rcar-gen3-sdhi"; reg = <0x0 0x11c00000 0 0x10000>;