From patchwork Tue Oct 24 07:57:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mi, Dapeng" X-Patchwork-Id: 13433988 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD363C07545 for ; Tue, 24 Oct 2023 07:51:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233137AbjJXHvB (ORCPT ); Tue, 24 Oct 2023 03:51:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233760AbjJXHu6 (ORCPT ); Tue, 24 Oct 2023 03:50:58 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA350118; Tue, 24 Oct 2023 00:50:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698133855; x=1729669855; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=y4GdVfvr4r3TS2jPrXzPuftPnG1qKJX1nHclPM7uF4Y=; b=C+a8I5hz/snaRZa6cNTUVVPd8RqNlA21RTBnyZ4r5JoxGk6D9FQ+H1pC 9QBV1KzH99JJlG4Gvv3JDr4dluluyBiBrX3+P6aP1zEIQBFKEYRj1bDiW 78HQMluccYeEuXdDtvObNp4oFyMIr2VGnUAUtbubNRs1KWgoMiBebB3VO p3JPhSCg7WgTTygVF8ibt+4DUNLIvqCDJxS9v+MGLF+7FhTOnTUPHGGNz Sp6pea13iKpaDMWQ+xjt34PQWot6sMh2CWmiWD3mLZoVpqArCDgjyS7KJ QE+PDxHUpetyeEcYOpBv53mZlv+16OErFU6eX8gvLcqpZlLxpa1Gqu1wI w==; X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="367235184" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="367235184" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Oct 2023 00:50:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="1089766233" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="1089766233" Received: from dmi-pnp-i7.sh.intel.com ([10.239.159.155]) by fmsmga005.fm.intel.com with ESMTP; 24 Oct 2023 00:50:52 -0700 From: Dapeng Mi To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhenyu Wang , Zhang Xiong , Jim Mattson , Mingwei Zhang , Like Xu , Dapeng Mi , Dapeng Mi Subject: [kvm-unit-tests Patch 1/5] x86: pmu: Remove duplicate code in pmu_init() Date: Tue, 24 Oct 2023 15:57:44 +0800 Message-Id: <20231024075748.1675382-2-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> References: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Xiong Zhang There are totally same code in pmu_init() helper, remove the duplicate code. Signed-off-by: Xiong Zhang Signed-off-by: Dapeng Mi --- lib/x86/pmu.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/lib/x86/pmu.c b/lib/x86/pmu.c index 0f2afd650bc9..d06e94553024 100644 --- a/lib/x86/pmu.c +++ b/lib/x86/pmu.c @@ -16,11 +16,6 @@ void pmu_init(void) pmu.fixed_counter_width = (cpuid_10.d >> 5) & 0xff; } - if (pmu.version > 1) { - pmu.nr_fixed_counters = cpuid_10.d & 0x1f; - pmu.fixed_counter_width = (cpuid_10.d >> 5) & 0xff; - } - pmu.nr_gp_counters = (cpuid_10.a >> 8) & 0xff; pmu.gp_counter_width = (cpuid_10.a >> 16) & 0xff; pmu.gp_counter_mask_length = (cpuid_10.a >> 24) & 0xff; From patchwork Tue Oct 24 07:57:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mi, Dapeng" X-Patchwork-Id: 13433989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63962C07545 for ; Tue, 24 Oct 2023 07:51:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233748AbjJXHvK (ORCPT ); Tue, 24 Oct 2023 03:51:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233780AbjJXHvE (ORCPT ); Tue, 24 Oct 2023 03:51:04 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9208210C1; Tue, 24 Oct 2023 00:51:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698133861; x=1729669861; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u6MzaXZPQ2+ms1NvX7VYQhNTuFQzAl/oK9iR7mXcQ0U=; b=a8VMyX1mIV1AQ4t1re4RhdyDbX+1wty1mjNGGFQ0LrJp1njK6tpilLvh Mnv1Hv7xGbSsHf2b1rrRpO69xDJFMmB4u3ZQ42oH9p2XA/kJw4/32oZDR x9cv8QapxGu1fSJAJNgRfpd6RODsy/jkvfFAersWEtBD2UY8LMr24gzaS j4OswjeImYaY9MScfYrDtMXaodClL1FXGby/z4mXn7Cw8iZgA4NQqASQX Y3yHaeMk3dt5aYr5ohLBxOOEni32KxK1p2P7u/HX05+zQ8eNhRvQO5lZE sb/tABgLSnVNHtzHJyjs1A8BcZz0daFiLUPHzLt5/zm5e8v2m4ITJGE1K A==; X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="367235196" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="367235196" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Oct 2023 00:51:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="1089766271" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="1089766271" Received: from dmi-pnp-i7.sh.intel.com ([10.239.159.155]) by fmsmga005.fm.intel.com with ESMTP; 24 Oct 2023 00:50:58 -0700 From: Dapeng Mi To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhenyu Wang , Zhang Xiong , Jim Mattson , Mingwei Zhang , Like Xu , Dapeng Mi , Dapeng Mi Subject: [kvm-unit-tests Patch 2/5] x86: pmu: Change the minimum value of llc_misses event to 0 Date: Tue, 24 Oct 2023 15:57:45 +0800 Message-Id: <20231024075748.1675382-3-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> References: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Along with the CPU HW's upgrade and optimization, the count of LLC misses event for running loop() helper could be 0 just like seen on Sapphire Rapids. So modify the lower limit of possible count range for LLC misses events to 0 to avoid LLC misses event test failure on Sapphire Rapids. Signed-off-by: Dapeng Mi --- x86/pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/x86/pmu.c b/x86/pmu.c index 0def28695c70..7443fdab5c8a 100644 --- a/x86/pmu.c +++ b/x86/pmu.c @@ -35,7 +35,7 @@ struct pmu_event { {"instructions", 0x00c0, 10*N, 10.2*N}, {"ref cycles", 0x013c, 1*N, 30*N}, {"llc references", 0x4f2e, 1, 2*N}, - {"llc misses", 0x412e, 1, 1*N}, + {"llc misses", 0x412e, 0, 1*N}, {"branches", 0x00c4, 1*N, 1.1*N}, {"branch misses", 0x00c5, 0, 0.1*N}, }, amd_gp_events[] = { From patchwork Tue Oct 24 07:57:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mi, Dapeng" X-Patchwork-Id: 13433990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C5BBC00A8F for ; Tue, 24 Oct 2023 07:51:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232592AbjJXHvS (ORCPT ); Tue, 24 Oct 2023 03:51:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233802AbjJXHvK (ORCPT ); Tue, 24 Oct 2023 03:51:10 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1ACB210C0; Tue, 24 Oct 2023 00:51:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698133866; x=1729669866; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+AbwY0EJ42oSmqGLiVvQ29v7o8KNMXXfoBc4PPnmCiI=; b=kISNShtqH1NKYVqoeMA/X3Nys0ayQ5vRgzaKmt+ISwAL4KyMaHguRu/s pIcciA8HuQekBNSTwwFeixR0BA1yTXix9x219snIskl5E8NmsQ76ezyWc fRkGggtQP+Xp0Ihd2ObUZKzfiQj2Jv1fBs1iZq40O3JqHGTTYH+fe453H GZZWCJtnSKodehBrlcKgUapz2xP4ZaOT/0UjbSzHVANN0lyL34l2soTnX teNDfP65ePPrZJFVh0mzDrSe/Q2+VFYRHE/4+sAzgpM2NeIjYgXRUYFtG JYN22qVssrtM6izjsA6VkhSZI9QbN/YZ0qu6dHWoqbkVN+HE7vjA8nC9v g==; X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="367235211" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="367235211" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Oct 2023 00:51:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="1089766298" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="1089766298" Received: from dmi-pnp-i7.sh.intel.com ([10.239.159.155]) by fmsmga005.fm.intel.com with ESMTP; 24 Oct 2023 00:51:02 -0700 From: Dapeng Mi To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhenyu Wang , Zhang Xiong , Jim Mattson , Mingwei Zhang , Like Xu , Dapeng Mi , Dapeng Mi Subject: [kvm-unit-tests Patch 3/5] x86: pmu: Enlarge cnt array length to 64 in check_counters_many() Date: Tue, 24 Oct 2023 15:57:46 +0800 Message-Id: <20231024075748.1675382-4-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> References: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Considering there are already 8 GP counters and 4 fixed counters on latest Intel CPUs, like Sapphire Rapids. The original cnt array length 10 is definitely not enough to cover all supported PMU counters on these new CPUs and it would cause PMU counter validation failures. It's probably more and more GP and fixed counters are introduced in the future and then directly extends the cnt array length to 64. Signed-off-by: Dapeng Mi --- x86/pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/x86/pmu.c b/x86/pmu.c index 7443fdab5c8a..1bebf493d4a4 100644 --- a/x86/pmu.c +++ b/x86/pmu.c @@ -254,7 +254,7 @@ static void check_fixed_counters(void) static void check_counters_many(void) { - pmu_counter_t cnt[10]; + pmu_counter_t cnt[64]; int i, n; for (i = 0, n = 0; n < pmu.nr_gp_counters; i++) { From patchwork Tue Oct 24 07:57:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mi, Dapeng" X-Patchwork-Id: 13433991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92B0EC07545 for ; Tue, 24 Oct 2023 07:51:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233897AbjJXHva (ORCPT ); Tue, 24 Oct 2023 03:51:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233839AbjJXHvN (ORCPT ); Tue, 24 Oct 2023 03:51:13 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC87910C8; Tue, 24 Oct 2023 00:51:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698133869; x=1729669869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UbICHGnYTIwYlJEuHD00SpbTkeQ8YKitQTi1EDFv9go=; b=RaKhpeOYB4NmxmK6dDYdj4mUlLZqGm1QAPL6AIp1vCx+eZNgEERiuNmV 5nQ32fKTl7aGf4Gg5NXNvUTNTLaR6OyqoCN7GNUhPtRGdBEADb+EYsY74 CQMWE8UR+mtWaIoY3ldsYvPYZ/JBC6NvHoYZiKMk5RkTuPV1VqjvRUU57 tJ1JiCGkGL4UrbpsGZCA9UfEvy06PyrslWlDWHkmaX5pedry9h8kCb0oM Qi1YFdBmEGTUM+aelWElE1YOXk1YdOK2D8v+sCV9YddeXbioivIlJ9jxK 4Q6EvFWMbLkVoaL56Mr06CuZAzD7QRu4OzDlTcpPwgNJ+uJ0ZF8/csK0D A==; X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="367235220" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="367235220" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Oct 2023 00:51:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="1089766319" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="1089766319" Received: from dmi-pnp-i7.sh.intel.com ([10.239.159.155]) by fmsmga005.fm.intel.com with ESMTP; 24 Oct 2023 00:51:06 -0700 From: Dapeng Mi To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhenyu Wang , Zhang Xiong , Jim Mattson , Mingwei Zhang , Like Xu , Dapeng Mi , Dapeng Mi Subject: [kvm-unit-tests Patch 4/5] x86: pmu: Support validation for Intel PMU fixed counter 3 Date: Tue, 24 Oct 2023 15:57:47 +0800 Message-Id: <20231024075748.1675382-5-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> References: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Intel CPUs, like Sapphire Rapids, introduces a new fixed counter (fixed counter 3) to counter/sample topdown.slots event, but current code still doesn't cover this new fixed counter. So add code to validate this new fixed counter. Signed-off-by: Dapeng Mi --- x86/pmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/x86/pmu.c b/x86/pmu.c index 1bebf493d4a4..41165e168d8e 100644 --- a/x86/pmu.c +++ b/x86/pmu.c @@ -46,7 +46,8 @@ struct pmu_event { }, fixed_events[] = { {"fixed 1", MSR_CORE_PERF_FIXED_CTR0, 10*N, 10.2*N}, {"fixed 2", MSR_CORE_PERF_FIXED_CTR0 + 1, 1*N, 30*N}, - {"fixed 3", MSR_CORE_PERF_FIXED_CTR0 + 2, 0.1*N, 30*N} + {"fixed 3", MSR_CORE_PERF_FIXED_CTR0 + 2, 0.1*N, 30*N}, + {"fixed 4", MSR_CORE_PERF_FIXED_CTR0 + 3, 1*N, 100*N} }; char *buf; From patchwork Tue Oct 24 07:57:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mi, Dapeng" X-Patchwork-Id: 13433992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40134C07545 for ; Tue, 24 Oct 2023 07:52:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233935AbjJXHwA (ORCPT ); Tue, 24 Oct 2023 03:52:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233906AbjJXHvp (ORCPT ); Tue, 24 Oct 2023 03:51:45 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 940BC19B2; Tue, 24 Oct 2023 00:51:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698133892; x=1729669892; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BxG6wVyvyosYY4Ew029SXkTfwIymBHDUnYzPxlYLnc0=; b=N8rwUd8Vfz10b3+yfXbpyIklM80BHmv79H79LfbKILrctxGFFb/eZZcY iYB8DzKzwrtkUORxiCYNLkl4geEdz7WmHhqqiT7pYJHBgYso28oVsxeDD dzC0Id5JSclHJqf1gx/MfPyGvGTscJ8y8GublJ3PhKZncKDtFqaxr3+HV 7a/TbvMQWoanzonou9d4Z9YdIPlYkfhj/bp9ogqYkQaLEt57eyfxVeLOi AkS0WEL+00MChAKpMrofpPtNFMnB9V2eOWmS3uzOtir3ssluSsxrcXjTJ KaxteSJb/NKZuytvZaorfy6eVrU9CUK35jl8tu8PinurugJOpiTMDLwak g==; X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="367235231" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="367235231" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Oct 2023 00:51:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="1089766330" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="1089766330" Received: from dmi-pnp-i7.sh.intel.com ([10.239.159.155]) by fmsmga005.fm.intel.com with ESMTP; 24 Oct 2023 00:51:10 -0700 From: Dapeng Mi To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Zhenyu Wang , Zhang Xiong , Jim Mattson , Mingwei Zhang , Like Xu , Dapeng Mi , Dapeng Mi Subject: [kvm-unit-tests Patch 5/5] x86: pmu: Add asserts to warn inconsistent fixed events and counters Date: Tue, 24 Oct 2023 15:57:48 +0800 Message-Id: <20231024075748.1675382-6-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> References: <20231024075748.1675382-1-dapeng1.mi@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Current PMU code deosn't check whether PMU fixed counter number is larger than pre-defined fixed events. If so, it would cause memory access out of range. So add assert to warn this invalid case. Signed-off-by: Dapeng Mi --- x86/pmu.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/x86/pmu.c b/x86/pmu.c index 41165e168d8e..a1d615fbab3d 100644 --- a/x86/pmu.c +++ b/x86/pmu.c @@ -112,8 +112,12 @@ static struct pmu_event* get_counter_event(pmu_counter_t *cnt) for (i = 0; i < gp_events_size; i++) if (gp_events[i].unit_sel == (cnt->config & 0xffff)) return &gp_events[i]; - } else - return &fixed_events[cnt->ctr - MSR_CORE_PERF_FIXED_CTR0]; + } else { + int idx = cnt->ctr - MSR_CORE_PERF_FIXED_CTR0; + + assert(idx < ARRAY_SIZE(fixed_events)); + return &fixed_events[idx]; + } return (void*)0; } @@ -246,6 +250,7 @@ static void check_fixed_counters(void) }; int i; + assert(pmu.nr_fixed_counters <= ARRAY_SIZE(fixed_events)); for (i = 0; i < pmu.nr_fixed_counters; i++) { cnt.ctr = fixed_events[i].unit_sel; measure_one(&cnt); @@ -267,6 +272,7 @@ static void check_counters_many(void) gp_events[i % gp_events_size].unit_sel; n++; } + assert(pmu.nr_fixed_counters <= ARRAY_SIZE(fixed_events)); for (i = 0; i < pmu.nr_fixed_counters; i++) { cnt[n].ctr = fixed_events[i].unit_sel; cnt[n].config = EVNTSEL_OS | EVNTSEL_USR;