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Fri, 27 Oct 2023 11:09:04 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 01/24] arm64/sysreg: add system register POR_EL{0,1} Date: Fri, 27 Oct 2023 19:08:27 +0100 Message-Id: <20231027180850.1068089-2-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 7D12D40027 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: ikd36p1ape4irdokpdhfwy3g6xc8na7q X-HE-Tag: 1698430147-134946 X-HE-Meta: U2FsdGVkX1/FePG3Q3OZOmEa4KQLFRYFfhpIcIdh1F+h0vDp3OGzZHcLKIGmYB1lYuW9uWs/8HDW/H22Z6g5MPVSuE4yGjWdcUMGGvxe28tqp0bPaGlF7Bs1Br+CfgvZVdLGR2d4JCvVGHWSlYrsFfhQYdp4VCRIbWmnDvHet3ROIF11oWIO34q9r8+ikXD5cbzo/8cG+TtVIGjoyrFt5oZ3wZ7+E5jACO+nDZsaebw7qSviZ7ZOG9Tbmy/ZUbB8Df4dYxPXL18RefxNRZnxZS6OyxSpn7lQOzJVHe2zcWFAk4DqsDGsEXnzu/3bcep7d4hu6mw36WUe7WyYiH5u9eQyMfYQ22qR+6IX3eu6yzQ2Kl/+bKZhOow4+uXcPnOklAXZaH65/CO4FnrPfF+fUSarXHy+4QB1o563LXaZZnIL66tQb/3UyVi6TavfDEgyxBoJLQvHMXrqFdkett4hIlQtNlDeGFZewBcFacDfFgAVXDzMe/xDYBedDji9q36jKwh7E0sYs8qvv9JkJVd3Ji1TFLLr8V62hAcHpXBKajNcj8VMfkFhsFKnxWHsELX8I7u5aQ49JSJDDZ3i5U7X7oRDpXRCfjwchGN21YYEg4W7Davpddu1665PbGs7N92urvS/BPyf2mIxIJEV6En4oKfJ3uLBmeGRcHm1UEfrpvSNj/VLcp1EzURtFprzFZdk+zUBOVjAawHfGdIUJXEfJjqS9wC3c2/6LV8U4gJJKSZi0lqf9oIEMTSklny8iM6t1sRQQHInT6NpyvJq86wNVaoyjIITVmES9u8BQOHFmAROVAThV5aH6jLUK4hHbHfb/8HivAnXJwYkFSL2tGZCfr7GQjNnADLbPZILez+bvHw+J550bvI418ovgjIHyJDe5ImsA/5TX2025UgsAx3GjieH5hqfKaM3Is3HKjF5YkXiSeBGNNBpZR1nHnQJl6EpdCnUnqTA5UX3Ct2gJmu yH2tbwaF G66ycSis8QIMg6VtJbfCObGLr229m4iCYfjcUrsuePMOKrbJaPEaJAexDh3+iXz/M+cQZ9Pb+nocn0NPbaCUlBk8SmXQ2Ghpao4ouwOtiUL0Xf70LEWKQiTI0QZW9Fge57t4wSuu/QfB0Aw4dpDPhf7Enyz/02prXeIffBlNZQdbxwEz8TtzQNY4L6KEa4mZzdStPpLE/f7uwlZIXNIgfd5E4PP9JreH00F1+cqhSHOVWMAtNg1UXMdUP8lDkuk49w0EL7vkPjNtH5kk= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add POR_EL{0,1} according to DDI0601 2023-03. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown --- arch/arm64/include/asm/sysreg.h | 13 +++++++++++++ arch/arm64/tools/sysreg | 12 ++++++++++++ 2 files changed, 25 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 38296579a4fd..cc2d61fd45c3 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -994,6 +994,19 @@ #define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4)) +/* + * Permission Overlay Extension (POE) permission encodings. + */ +#define POE_NONE UL(0x0) +#define POE_R UL(0x1) +#define POE_X UL(0x2) +#define POE_RX UL(0x3) +#define POE_W UL(0x4) +#define POE_RW UL(0x5) +#define POE_XW UL(0x6) +#define POE_RXW UL(0x7) +#define POE_MASK UL(0xf) + #define ARM64_FEATURE_FIELD_BITS 4 /* Defined for compatibility only, do not add new users. */ diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 76ce150e7347..dd91d0639bab 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2504,6 +2504,18 @@ Sysreg PIR_EL2 3 4 10 2 3 Fields PIRx_ELx EndSysreg +Sysreg POR_EL0 3 3 10 2 4 +Fields PIRx_ELx +EndSysreg + +Sysreg POR_EL1 3 0 10 2 4 +Fields PIRx_ELx +EndSysreg + +Sysreg POR_EL12 3 5 10 2 4 +Fields PIRx_ELx +EndSysreg + Sysreg LORSA_EL1 3 0 10 4 0 Res0 63:52 Field 51:16 SA From patchwork Fri Oct 27 18:08:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438773 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4EFDC25B48 for ; Fri, 27 Oct 2023 18:09:12 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 353806B03D9; Fri, 27 Oct 2023 14:09:12 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 240C06B03DA; Fri, 27 Oct 2023 14:09:12 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 06BF06B03DB; Fri, 27 Oct 2023 14:09:11 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id E66566B03D9 for ; Fri, 27 Oct 2023 14:09:11 -0400 (EDT) Received: from smtpin09.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id C7B74160E64 for ; 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imf25.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf25.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1698430150; a=rsa-sha256; cv=none; b=Dv35Sb5wle2s5off9tJA94ox5OGFRU1pLwsa2EvBNiyqYND7NBdkZBiHvrFG73YkxIuS5l W3vqIrBuymGhlp/AUbrYolvIPYYHbIwDc+DXevtVxeyKOEum8Xy70LGarFPbCb8HkaAmKK ivto1PveSLhYixWk/Boz5Ea8f690V2k= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C2E3C153B; Fri, 27 Oct 2023 11:09:50 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 015BC3F64C; Fri, 27 Oct 2023 11:09:06 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 02/24] arm64/sysreg: update CPACR_EL1 register Date: Fri, 27 Oct 2023 19:08:28 +0100 Message-Id: <20231027180850.1068089-3-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 295DAA0004 X-Stat-Signature: bto13ppn4wh1j8fk6us4rtmpmhb51gnz X-HE-Tag: 1698430149-830003 X-HE-Meta: U2FsdGVkX18YEZBXe/BQL74BErJ9qKtvpva5RlARBN2G1t0cZJdqsS52zL6v4HPiPKCTVWUmdi+IJGcbJJcIWPNcISlZaKIwu0BoOr4qgAjbwF+pkJF6nSnLQgks3lxJxuHA6ENqXrA2boHNFPRFXpSlw2xubmekmZDr1Ezy/sbbdwz/vQIuKcdUYATfAEqFBcFQIFew6jwmTNJRD4DmyA0u6YXLlQjRhSdoJgOMsmdkDdPbcFm8K8wOIrqla6hh73yqckP9PNkDhuL6dsOyhekDG1+wd0nzfEMVHaX9omJ8INx3KeBzyerJjCoqctDmo9BABD/ZeDMbbUzuHOCa8H6bmn+AaLhlvacCjQw8fFBUlQsTvQKJqugCv9EOdoDtzKgF8pjnrje1xxMI4AdA/3KDvZRofaZGYf+QnICU07fq+d7aotX/yslGrarkobyA1VqY5oyS5gTARRyJEEebUfXQKc7V/PrI+k+x8rxDm4ITyAH8RFAevx9CBvr5FyfBzWgs/dczG65XYOGi2kQTqZ2AknwANUzTLdIG+y9Qqg17FqANEpcAP2XtNz4wAhI5fCU+TjXb38gpM10eHQ8wlKYRL7z9HcQNgzscTvBfmpGrCQQ7UI25iFDFL8rRohdWzNSTDd9HUHwW4C+PY6T/Ge1UX64AU46gztZ2D/c0XdZX9OcVtCUQPSax593F+RoeCdyp8bE0phR7G0+OYfJ8fNaA8/lbhsJvIpFS7ot1Hy9n7fsw1T1o1KbW2yWsWVPeKvQ7kh2B3WbmGviYlnVW290uf5yE1//PwHvIkJT3Dah/G3d+hnPPDHuEZBUoNu32bwnmbaW7FihdAkyf+euhysCKXLzwJ3+rPOAiUxeBYDd/UI2eas7j9iCK80BR7lmjq3UZ/AGCS2Yg04SVTnIqUJGV3fm3DLqSxJDbNQTKWJZYyWSK2lNYQAzy9uCxGCSH+5rPBdIOyOuICMr9hms jTJlDv4z kowxyRMtRr4HBPmlD+bOmNdksOkNy5FIj6Dw39TBSm+0xa5ut3/OQXrV6Sf5I4Gbh2J2iTrLzCvNUw9Jnej1xJXGVcbajWN9wF2Q8IPRmr2kfj8X5eyoirHBDbV8CTTav92lFLrkS4iZ/UQ1O334qrxbw7oCMEJ04X22khT1f7VFfCxYeciSYQqNIFA/0ryPeTY7xvOM5abrz+XAlhu9+AU0feSRrdwiEJ4M/NajRoHirFB68lJsbdS0DLh49GSxBWP5hxu5qzxGIHPfUafwfEBQAeIDkfD97+gJk X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add E0POE bit that traps accesses to POR_EL0 from EL0. Updated according to DDI0601 2023-03. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown --- arch/arm64/tools/sysreg | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index dd91d0639bab..6952987f8363 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -1741,7 +1741,8 @@ Field 0 M EndSysreg SysregFields CPACR_ELx -Res0 63:29 +Res0 63:30 +Field 29 E0POE Field 28 TTA Res0 27:26 Field 25:24 SMEN From patchwork Fri Oct 27 18:08:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15087C25B6F for ; Fri, 27 Oct 2023 18:09:15 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 9E4896B03DA; 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t=1698430152; a=rsa-sha256; cv=none; b=nyprjGVDUOm8Z/rDYVHDor7+xJ1eG0cuy/NKlAditm21kqvhJY8vn5i9pk8VJ71pkU/TVr kSYB3lqAGDEZcxWwMu8Ml0ptw3GcSPffsFSNEPPhKpEGBEB8cpSMwbbBaqN390wrpM7tAR 2DhET7xv3vx31eV2CLL2B6nifdSC3Lw= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 37C331570; Fri, 27 Oct 2023 11:09:53 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 69FAF3F64C; Fri, 27 Oct 2023 11:09:09 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 03/24] arm64: cpufeature: add Permission Overlay Extension cpucap Date: Fri, 27 Oct 2023 19:08:29 +0100 Message-Id: <20231027180850.1068089-4-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 94128180029 X-Stat-Signature: xtkqoeoc65rsy8g63apxnao8c5roddz7 X-HE-Tag: 1698430152-437988 X-HE-Meta: U2FsdGVkX1/7e4bsGaFFfVxV35aEnhvWafTDAC8iOttC2wu5sK78tgVTD6qwkXi/LRqAXKcL0/Ui2zp6EcY1uZptO7xYcjYVxO6P9iOBGAbz/48bkpDwxEDWImkBbzW8hXEY/0l0sUuETmxKeMmBkEwSpIfdwXrVwlYpoe7FO92FKBK3pHVT5ry7BiKFkVbC0kI2TJz1wOVXfMKlCnku28uqsu7zyvginwPFyaXZNrZrXtGEy+DzMrcRMec+EB/5yTVai+t5Drz9rKUByxwtYGsHMAJX0KZw1cNK1hlbXgSq9YAvCNPR9sDqIdge3UVSACupGPb/3TvvINtHQwdzWzBvUYXSWT0dX/zi2nG8BDKl43+Via5mnzbDcH+IAET1RTbzDuow8gcKeDiNWbU8mg/JRAn8+ph4p528rvcGPR29+yvTuFJ3OIA3kYF00/lfTjojJpVGa853UH+WtOWjPey6LCFZlFaoFFNMbYbNEMFENEQz8xUx/7DDF55LtNHhUsmrx1kg7SjuNsnNeGFyLL4CYvNm1QpxHK3en/hzm91remaKePnzs2ptbFPT3ZI6951ZGlu2D3HNHXNSGaCyBnEoR+OZpeGH1R/9K3ZNPE7pFMbkJelAzr81hsZHudkleG3xAg1RydpI1+NKRWkXRfitvQgJ99rPqtYNodb7+vFj9zWr4xMftyH2Wb6T/M3/orgMBe7d2vx2vde3bGziD2w7RIO7VSvfRyX/Nw5uUlA//MqdLjsAjzysQx3RoeUu26vZTGcee4qJER29FyVumra3CcbxI9Y4TlKp16UD86SCwIc+A0Mdkwi3yPn/RyFBUQcwGVn63Iym190Nlcxmwn7JVXwbfvKdSzATQU5cOV7UULrHU8fB3u8OFT6B3h4RjSeZ+QaRFDn5xzVJpGdOV57xUMbyWuXitLOJ4Yp/gZLUFRI/b/md5E/wjmnu/aj4El0gyUTIGhSeduV2DM0 0l/BXqAS +UrbaIDWt7YVMvAMQDcfz1D+p93YARrHDNIp4E3NVMAMyS+8XKwz9izLKcjkkUvW+lQ8wyxDAjwo/fFPMv56Qv+cxRFkJA3pursBSk/pRY0ZO6jpMoj3+6NNbSF7PrNezp5MY9fc9HH3FHYF2bqQJpB1Up/eKcOab7Kf+eG/5aOnnrEjji2lGdMbQrP6pLpVHrPRCnVPMrFFjVQaNcuFpmDCs5A== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE as the boot CPU will enable POE if it has it, so secondary CPUs must also have this feature. Add a new config option: ARM64_POE Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 16 ++++++++++++++++ arch/arm64/kernel/cpufeature.c | 9 +++++++++ arch/arm64/tools/cpucaps | 1 + 3 files changed, 26 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index b10515c0200b..1f1a12e28c3f 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2060,6 +2060,22 @@ config ARM64_EPAN if the cpu does not implement the feature. endmenu # "ARMv8.7 architectural features" +menu "ARMv8.9 architectural features" +config ARM64_POE + prompt "Permission Overlay Extension" + def_bool y + help + The Permission Overlay Extension is used to implement Memory + Protection Keys. Memory Protection Keys provides a mechanism for + enforcing page-based protections, but without requiring modification + of the page tables when an application changes protection domains. + + For details, see Documentation/core-api/protection-keys.rst + + If unsure, say y. + +endmenu # "ARMv8.9 architectural features" + config ARM64_SVE bool "ARM Scalable Vector Extension support" default y diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 444a73c2e638..f1c1f348a31d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2719,6 +2719,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, EVT, IMP) }, +#ifdef CONFIG_ARM64_POE + { + .desc = "Stage-1 Permission Overlay Extension (S1POE)", + .capability = ARM64_HAS_S1POE, + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) + }, +#endif {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index c3f06fdef609..b8348e40f6d9 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -43,6 +43,7 @@ HAS_NO_FPSIMD HAS_NO_HW_PREFETCH HAS_PAN HAS_S1PIE +HAS_S1POE HAS_RAS_EXTN HAS_RNG HAS_SB From patchwork Fri Oct 27 18:08:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C3EBC25B47 for ; Fri, 27 Oct 2023 18:09:17 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id DB4396B03DB; Fri, 27 Oct 2023 14:09:16 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id D3BFA6B03DC; Fri, 27 Oct 2023 14:09:16 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id BDDC76B03DD; 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Fri, 27 Oct 2023 11:09:11 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 04/24] arm64: disable trapping of POR_EL0 to EL2 Date: Fri, 27 Oct 2023 19:08:30 +0100 Message-Id: <20231027180850.1068089-5-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Stat-Signature: gzy4pzjogqizmmx4gdsr5igpbizmaun3 X-Rspamd-Server: rspam10 X-Rspamd-Queue-Id: CE62BC001D X-Rspam-User: X-HE-Tag: 1698430154-839436 X-HE-Meta: U2FsdGVkX1+P8Zxr+o8zCPcHqhnng5I246ZFMw56rOh59NKQzpjo9E5HTxY0TwRcuoRlbLDpjdJ7bzZAUIIrFRKBZz1NrFx1Bj0Y0IL4/LmWhDP5DxuE5roga7b8wxj6xOIOe3So3DKHWD2A1/n4Y+wwjNgqbv3/iSlskDktXRoOUZ19TteiYrRS3EtITTIYwOaEvzELdsxbpzFpESTBFVXY1W2i/UBgRZZLZQoISkPUJYHqjDKo54btRa/xLt/KrkkXFi73bT2zw2ustQELgJXiPqARsATx7tXmdPr7W9E/3gxKLB+XYf7WMCmIV0OvriMjM+kn9d//7CIZourJOeal/LGn0gOIj8YSkTSVwYAttSZDZP00IXxax6hsx0CcAhvi93N/3M70fwVz8WmnKWIVj6rfrGR3chWFbQ/f6WzODH9XZKtF5e+BjtxjmLjLwkh1uvSHO2lcsRyBZZvd45KGT5a+3DCjh+eRi2Z/KbymzCPQQ+2lsyuW4zEt/idAFpmIsPd70arv3/m6M5VaW8dU5r5kELIS2xFulGmTImVv2yc6JLQfuf2E3N8FxXaiEOWkGOcuAn/UGkvNtAE6IMn4UHoDEyw0d8d9xASvWGUB5fCgBM82tsBbTKIbqcNW1BX+WUuFc+RH6af1+CX7hSvXRgvfYsmpAeD6qnP910Ljr783tMRxcinaxwwp2muY3G8Uqe+HuJ685ecZo3fSgbUBnjpkO1PYQuT6HsC2qOZ42j+iP+L5IiDBh8p37dMTIBz+p+vWXHMc7KVJOfAzI4eyVY7Z06C6p57LSl7sAeD5DXcgWWLItQKiQAXqhvF8o/hhBudnHLchEOf0knU2JfHphSAvt+Jkq5Y76z7RCDwCiOqKGewqBbixXYcM9uCcsVlOuaoyQPyDK5H0WeY0IkzJvig+gCDP+JWQgArPLzJhxEzeHcCanvJSPnPuKIy7AWi1ogcEDp1//zo/6l0 CJCPVIG9 PEJ4UeZ5EsD5P9oApD/x194txRilKsTuBype9k1LadSs78PveHiw5+GXv68Yw5OxFaXlO8HleL9k7yRoBjdwms9Dmlgsod79mgn6h3XhkI6UscZmWXTHTJ9RYcNt64ThyvoygVwIaTjuhaBH/BRhDsL3DI3aDJ3GMJpRsMrwzjDDgeLDtD7mVQNAHFERf3NlsAtdSzbktVI5v6J6aYuEirrtRTQ8A5JZXUWiVpxW08WOEqBgV3XaHsi/bWv0ZWUAWU1GFaLLVAjYExP4= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/el2_setup.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index b7afaa026842..df5614be4b70 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -184,12 +184,20 @@ .Lset_pie_fgt_\@: mrs_s x1, SYS_ID_AA64MMFR3_EL1 ubfx x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4 - cbz x1, .Lset_fgt_\@ + cbz x1, .Lset_poe_fgt_\@ /* Disable trapping of PIR_EL1 / PIRE0_EL1 */ orr x0, x0, #HFGxTR_EL2_nPIR_EL1 orr x0, x0, #HFGxTR_EL2_nPIRE0_EL1 +.Lset_poe_fgt_\@: + mrs_s x1, SYS_ID_AA64MMFR3_EL1 + ubfx x1, x1, #ID_AA64MMFR3_EL1_S1POE_SHIFT, #4 + cbz x1, .Lset_fgt_\@ + + /* Disable trapping of POR_EL0 */ + orr x0, x0, #HFGxTR_EL2_nPOR_EL0 + .Lset_fgt_\@: msr_s SYS_HFGRTR_EL2, x0 msr_s SYS_HFGWTR_EL2, x0 From patchwork Fri Oct 27 18:08:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBEB1C25B6F for ; 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bh=bvKLcx4hGTswbkqy0wzc53Fs4hwT/BZ1For+XMgMmEQ=; b=wpksmO50kf5povT0plAFsQ9JXR6ytJcntKdfB4zJ7qEgUOGAU/iEn780aDg9kpHfHAx10j 3XR2XV7BxCa5AQ9wWjKo9CbNu7dpIRpFZoMPIw7MBtqgOjI4MQrCpTSslda7rWWSfzsXr3 P1zq8dBni8istZJj4wFzvErNCzpuVw4= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 153751424; Fri, 27 Oct 2023 11:09:58 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 47BF93F64C; Fri, 27 Oct 2023 11:09:14 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 05/24] arm64: context switch POR_EL0 register Date: Fri, 27 Oct 2023 19:08:31 +0100 Message-Id: <20231027180850.1068089-6-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: 4C9904000D X-Stat-Signature: eywtjcytzyokxgpc1tfn3u7jrpobh7g5 X-Rspam-User: X-HE-Tag: 1698430157-756436 X-HE-Meta: U2FsdGVkX19ZIKBhtnrMKsEi696gKrsbhsZ+DZXjGeCtSjWPM3Wm5R7253o+oUBKtWu8u+9PnwHnSl555bAYhL/nKvvQy84h0NeijZQpb9PU4lof52/bEdsRKPF/M3IM3XnUuPxv8k/QP1RBSjNkAVbw7+AFpJOhdHAHrsYMYcGWyC7HRj01Ao8osXVc77AmOn1iIisHX4831d6kbpyVwxgA8P41gnOXxMmSlnoEedpSAdCbSkxrImb7PkapqtABiuJj27hRGAzmPvTYD6v/xqS1Fggt279FAl2YqIn11T+whdHahmdRPRDbTLio7JK+66j6OM9Y/4bcEnPwlfftOsNYd+lR5OIX8GgfFRrfKS51O0jb6MNgwHVdQMbX0eQ40w6umg1cHQCat7TRYvFCjOQSdmgHV23e6ZMnw2IziR48zDA2QU9UM+Q6hayx8QsNWYY1Guyhhm/EOfeTTwsnfjWLLH7nsD+jXOKoegq6XSoZD4TeVWFGUdooKmYwlGWN9anz1xZcnE14BS1+Dn9W9dZjH+HLu0LRlYR/OgUMsImXufX527tS7OJCsDVewSWQwgPCXT4KVgU8kcMMoI/BmdwUkUf6+zRdMt2W5nuRzwTWRCSGn9ZmfC16M2j9zcCcsciQvMzytHouslxcy9BBonEqWSPipmz7N5FbLfuEE7saWntgVECXmKqNfSHgqx5+kqFUOWVUpzIyDyqP7utNuPUEMJ2wx41sahVKoVTFYVUYCiyXyl2YZDJi8zsmEhTLVy8qJ9O8e7YInuJYcY61OYfJ7F8gdc3A7zEzbfohNJ0TFjYXJcqlYOAv3Q+braomowpcKmTkZe3g6Mw/xSEx1nuXW2H8CwMHK3zpHWAn7pqQmu/C/BTBCni+iecIMvjWblr+3/MYt4rITuKJ0F7Q2vsyOaUOBSmSH3DDXtctaTlUjMA/bQd2EwnQAHYPTT7eXBi5I2201Yf13jDxj9H LZus3L38 9SkCn3M/U7GwMFQmp+IbxLoIM9l3xuiZ1qxWGB8ZiIAF3/OmYGHBCXBBob1VoEl5NONOuq8g3knHZu/lA3QN02haq9dNrIUf9UQTLq56t8gDzkJJa8jtcQ5iWrlKk7vOupMGSelZ/LUlH8u+oFRs+NOb3beWpnBWIFGD5kH0bAV6i4nEREUTwAGkUOfOvwSBUevyzUUDgAk+V4kuAlnt8eiM37AjL8EGPNGhAp0fbVWnHQUJVmZsBlemV3SCe36JFssyYIehDo0DqY/4= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: POR_EL0 is a register that can be modified by userspace directly, so it must be context switched. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/cpufeature.h | 6 ++++++ arch/arm64/include/asm/processor.h | 1 + arch/arm64/include/asm/sysreg.h | 3 +++ arch/arm64/kernel/process.c | 19 +++++++++++++++++++ 4 files changed, 29 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 5bba39376055..019af90a3cf4 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -831,6 +831,12 @@ static inline bool system_supports_tlb_range(void) cpus_have_const_cap(ARM64_HAS_TLB_RANGE); } +static inline bool system_supports_poe(void) +{ + return IS_ENABLED(CONFIG_ARM64_POE) && + alternative_has_cap_unlikely(ARM64_HAS_S1POE); +} + int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt); bool try_emulate_mrs(struct pt_regs *regs, u32 isn); diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index e5bc54522e71..b3ad719c2d0c 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -179,6 +179,7 @@ struct thread_struct { u64 sctlr_user; u64 svcr; u64 tpidr2_el0; + u64 por_el0; }; static inline unsigned int thread_get_vl(struct thread_struct *thread, diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index cc2d61fd45c3..32270823a40b 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1007,6 +1007,9 @@ #define POE_RXW UL(0x7) #define POE_MASK UL(0xf) +/* Initial value for Permission Overlay Extension for EL0 */ +#define POR_EL0_INIT POE_RXW + #define ARM64_FEATURE_FIELD_BITS 4 /* Defined for compatibility only, do not add new users. */ diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 0fcc4eb1a7ab..9caed797fc47 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -271,12 +271,19 @@ static void flush_tagged_addr_state(void) clear_thread_flag(TIF_TAGGED_ADDR); } +static void flush_poe(void) +{ + if (system_supports_poe()) + write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); +} + void flush_thread(void) { fpsimd_flush_thread(); tls_thread_flush(); flush_ptrace_hw_breakpoint(current); flush_tagged_addr_state(); + flush_poe(); } void arch_release_task_struct(struct task_struct *tsk) @@ -498,6 +505,17 @@ static void erratum_1418040_new_exec(void) preempt_enable(); } +static void permission_overlay_switch(struct task_struct *next) +{ + if (system_supports_poe()) { + current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); + if (current->thread.por_el0 != next->thread.por_el0) { + write_sysreg_s(next->thread.por_el0, SYS_POR_EL0); + isb(); + } + } +} + /* * __switch_to() checks current->thread.sctlr_user as an optimisation. Therefore * this function must be called with preemption disabled and the update to @@ -533,6 +551,7 @@ struct task_struct *__switch_to(struct task_struct *prev, ssbs_thread_switch(next); erratum_1418040_thread_switch(next); ptrauth_thread_switch_user(next); + permission_overlay_switch(next); /* * Complete any pending TLB or cache maintenance on this CPU in case From patchwork Fri Oct 27 18:08:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15D3BC25B72 for ; Fri, 27 Oct 2023 18:09:22 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id A32646B03DD; Fri, 27 Oct 2023 14:09:21 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 9BB9C6B03DE; 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Fri, 27 Oct 2023 11:10:00 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B073B3F64C; Fri, 27 Oct 2023 11:09:16 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 06/24] KVM: arm64: Save/restore POE registers Date: Fri, 27 Oct 2023 19:08:32 +0100 Message-Id: <20231027180850.1068089-7-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 8F77A40002 X-Rspam-User: X-Stat-Signature: 1hgugb5c5mporfkgdz4uiynk15jekmiu X-Rspamd-Server: rspam01 X-HE-Tag: 1698430159-239122 X-HE-Meta: U2FsdGVkX19hlLKS5R7aFuFHrOB6eQMdLXj9HKoGbujqNXrCbQ7GTGGZDAoDrp2feA6riZgUS+aObVLV3D9XX7L0VzSXND+QKnzPzQsMfqe/1cztsUHCyEtEpTDgpAT77bDxfAZx/EATVz/D3M44JNxEgMT7N17MXL+V5CjGSyeChDUUzX3/Ney1Ssq1jcXaLHRh6bz0y5BQQJVmXxhJv0eQGDp1FYqG8dNkjUbfha4QsxJ7Gi0xKoCcR9l8/cFXe27nH0ko/YjhUWfPZlFqs61eF1FBB8D2MMvprekxMp5YvVWJPctry/AawwkN5QNy/EuD7+f2KsAhUqODWiwSy7yBSU1v5y63DWGcyTcYlxu+/P5jjte+Jg8Cuz4lmkZ6JjAwMz+jRBdGBHl1m+OK7o8duVsF56m2EzSyu82a49BDAXEpwqvKN70KbCakk5kiYE8aANx8Vg4DWQLQAtL3yz2MizbqU1bcDfpAw5jiMFamyMzO8PTlhmGFXJhiLOwHt4CGByzxojQiC/L0MCCwttq1Co4Gc/cQFkMhkmcD+WAgv2V/If4LWMP7S6rn3nQHwMWJT5hGIeVCpQmoDiQKXP6BfX8ew8WuemiHNTYUvpR/pQIMRD/3nBV+8CsDFu7p6Ve9EZ+xzpzQfSbPa+MzAE2AidWy0pZsikKBC2v9HcFcrAnknbEc90rIYjr+45KkHtMXVbFqWB9FwxFCLuZZbY3rLIv1rh0dFwMNrU16E1uE2ob9UYNHnzk/3RbyJKPfKZTobWbfbB1knWvyZ2Boz1hvw0OoNEsnv/0JyHaRzrEoPFLV2eV/ggdcyXkQVYrVnhDeoE9FE1K972O6fAwgaslH/qsYjFQkaH5wAVrf0UXT7yb3TSvVFejLNxLpBRbc+gi4N+6fJCM1QuctF9je7DP6p4f3Q1TiPdtCodQc/l5IFVQU1Yo4SFyMYY8fiAczhYf9Gt3U/YVNwZApdEB lhoS/VDo 5+U9QP0fg+tY+ISktZTyHYdf0QvhKRfX85wa3PPIGp2nRKfN9NTnWJT9PcazzFXcPRNnqRaQqduVli/q/5fKVwb12vwze67cmqZvRYHjhfL9QblRVh/62WQIYpIVZewdorkA8yqn99lyLR5Y+wv6oU/oyKIiGqC1PITkyVUeg8qlTOWYsNi+GJua4joVM+dorFoUVFdK/fo78pM2Bg/WfweadxGSx8P0YtSYU X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Define the new system registers that POE introduces and context switch them. Signed-off-by: Joey Gouly Cc: Marc Zyngier Cc: Oliver Upton Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/kvm_arm.h | 4 ++-- arch/arm64/include/asm/kvm_host.h | 4 ++++ arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 10 ++++++++++ arch/arm64/kvm/sys_regs.c | 2 ++ 4 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 5882b2415596..4022e69e17fd 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -344,14 +344,14 @@ */ #define __HFGRTR_EL2_RES0 (GENMASK(63, 56) | GENMASK(53, 51)) #define __HFGRTR_EL2_MASK GENMASK(49, 0) -#define __HFGRTR_EL2_nMASK (GENMASK(55, 54) | BIT(50)) +#define __HFGRTR_EL2_nMASK (GENMASK(60, 59) | GENMASK(55, 54) | BIT(50)) #define __HFGWTR_EL2_RES0 (GENMASK(63, 56) | GENMASK(53, 51) | \ BIT(46) | BIT(42) | BIT(40) | BIT(28) | \ GENMASK(26, 25) | BIT(21) | BIT(18) | \ GENMASK(15, 14) | GENMASK(10, 9) | BIT(2)) #define __HFGWTR_EL2_MASK GENMASK(49, 0) -#define __HFGWTR_EL2_nMASK (GENMASK(55, 54) | BIT(50)) +#define __HFGWTR_EL2_nMASK (GENMASK(60, 59) | GENMASK(55, 54) | BIT(50)) #define __HFGITR_EL2_RES0 GENMASK(63, 57) #define __HFGITR_EL2_MASK GENMASK(54, 0) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index af06ccb7ee34..205653bc5c2c 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -365,6 +365,10 @@ enum vcpu_sysreg { PIR_EL1, /* Permission Indirection Register 1 (EL1) */ PIRE0_EL1, /* Permission Indirection Register 0 (EL1) */ + /* Permission Overlay Extension registers */ + POR_EL1, /* Permission Overlay Register 1 (EL1) */ + POR_EL0, /* Permission Overlay Register 0 (EL0) */ + /* 32bit specific registers. */ DACR32_EL2, /* Domain Access Control Register */ IFSR32_EL2, /* Instruction Fault Status Register */ diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h index bb6b571ec627..22f07ee43e7e 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -19,6 +19,9 @@ static inline void __sysreg_save_common_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, MDSCR_EL1) = read_sysreg(mdscr_el1); + + if (system_supports_poe()) + ctxt_sys_reg(ctxt, POR_EL0) = read_sysreg_s(SYS_POR_EL0); } static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt) @@ -59,6 +62,8 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, PIR_EL1) = read_sysreg_el1(SYS_PIR); ctxt_sys_reg(ctxt, PIRE0_EL1) = read_sysreg_el1(SYS_PIRE0); } + if (system_supports_poe()) + ctxt_sys_reg(ctxt, POR_EL1) = read_sysreg_el1(SYS_POR); ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg_par(); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); @@ -89,6 +94,9 @@ static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt) static inline void __sysreg_restore_common_state(struct kvm_cpu_context *ctxt) { write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1), mdscr_el1); + + if (system_supports_poe()) + write_sysreg_s(ctxt_sys_reg(ctxt, POR_EL0), SYS_POR_EL0); } static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt) @@ -135,6 +143,8 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg_el1(ctxt_sys_reg(ctxt, PIR_EL1), SYS_PIR); write_sysreg_el1(ctxt_sys_reg(ctxt, PIRE0_EL1), SYS_PIRE0); } + if (system_supports_poe()) + write_sysreg_el1(ctxt_sys_reg(ctxt, POR_EL1), SYS_POR); write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1); write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1); diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index e92ec810d449..7d66cc7e104c 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2124,6 +2124,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 }, { SYS_DESC(SYS_PIRE0_EL1), access_vm_reg, reset_unknown, PIRE0_EL1 }, { SYS_DESC(SYS_PIR_EL1), access_vm_reg, reset_unknown, PIR_EL1 }, + { SYS_DESC(SYS_POR_EL1), NULL, reset_unknown, POR_EL1 }, { SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 }, { SYS_DESC(SYS_LORSA_EL1), trap_loregion }, @@ -2203,6 +2204,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { PMU_SYS_REG(PMOVSSET_EL0), .access = access_pmovs, .reg = PMOVSSET_EL0 }, + { SYS_DESC(SYS_POR_EL0), NULL, reset_unknown, POR_EL0 }, { SYS_DESC(SYS_TPIDR_EL0), NULL, reset_unknown, TPIDR_EL0 }, { SYS_DESC(SYS_TPIDRRO_EL0), NULL, reset_unknown, TPIDRRO_EL0 }, { SYS_DESC(SYS_TPIDR2_EL0), undef_access }, From patchwork Fri Oct 27 18:08:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C83C3C25B70 for ; Fri, 27 Oct 2023 18:09:24 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 612A86B03DE; Fri, 27 Oct 2023 14:09:24 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 59AA56B03DF; Fri, 27 Oct 2023 14:09:24 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 414B16B03E0; Fri, 27 Oct 2023 14:09:24 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 332376B03DE for ; Fri, 27 Oct 2023 14:09:24 -0400 (EDT) Received: from smtpin07.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id EF58E1408C9 for ; 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Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- Documentation/arch/arm64/elf_hwcaps.rst | 3 +++ arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 14 ++++++++++++++ arch/arm64/kernel/cpuinfo.c | 1 + 5 files changed, 20 insertions(+) diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst index 76ff9d7398fd..85f6e9babc7f 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -308,6 +308,9 @@ HWCAP2_MOPS HWCAP2_HBC Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001. +HWCAP2_POE + Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001. + 4. Unused AT_HWCAP bits ----------------------- diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 521267478d18..196f21b7d11b 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -139,6 +139,7 @@ #define KERNEL_HWCAP_SME_F16F16 __khwcap2_feature(SME_F16F16) #define KERNEL_HWCAP_MOPS __khwcap2_feature(MOPS) #define KERNEL_HWCAP_HBC __khwcap2_feature(HBC) +#define KERNEL_HWCAP_POE __khwcap2_feature(POE) /* * This yields a mask that user programs can use to figure out what diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h index 53026f45a509..8809ff35d6e4 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -104,5 +104,6 @@ #define HWCAP2_SME_F16F16 (1UL << 42) #define HWCAP2_MOPS (1UL << 43) #define HWCAP2_HBC (1UL << 44) +#define HWCAP2_POE (1UL << 46) #endif /* _UAPI__ASM_HWCAP_H */ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index f1c1f348a31d..c79f43dfb2be 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -400,6 +400,8 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr2[] = { }; static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = { + ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_POE), + FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1POE_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1PIE_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_TCRX_SHIFT, 4, 0), ARM64_FTR_END, @@ -2220,6 +2222,14 @@ static void cpu_enable_mops(const struct arm64_cpu_capabilities *__unused) sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_MSCEn); } +#ifdef CONFIG_ARM64_POE +static void cpu_enable_poe(const struct arm64_cpu_capabilities *__unused) +{ + sysreg_clear_set(REG_TCR2_EL1, 0, TCR2_EL1x_E0POE); + sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_E0POE); +} +#endif + /* Internal helper functions to match cpu capability type */ static bool cpucap_late_cpu_optional(const struct arm64_cpu_capabilities *cap) @@ -2725,6 +2735,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .capability = ARM64_HAS_S1POE, .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, .matches = has_cpuid_feature, + .cpu_enable = cpu_enable_poe, ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) }, #endif @@ -2874,6 +2885,9 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { HWCAP_CAP(ID_AA64SMFR0_EL1, BI32I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_BI32I32), HWCAP_CAP(ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32), #endif /* CONFIG_ARM64_SME */ +#ifdef CONFIG_ARM64_POE + HWCAP_CAP(ID_AA64MMFR3_EL1, S1POE, IMP, CAP_HWCAP, KERNEL_HWCAP_POE), +#endif {}, }; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index 98fda8500535..5b44e8ab9ab8 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -127,6 +127,7 @@ static const char *const hwcap_str[] = { [KERNEL_HWCAP_SME_F16F16] = "smef16f16", [KERNEL_HWCAP_MOPS] = "mops", [KERNEL_HWCAP_HBC] = "hbc", + [KERNEL_HWCAP_POE] = "poe", }; #ifdef CONFIG_COMPAT From patchwork Fri Oct 27 18:08:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAB84C27C46 for ; Fri, 27 Oct 2023 18:09:26 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 639186B03DF; Fri, 27 Oct 2023 14:09:26 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 5C3526B03E0; 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dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5B9BF1570; Fri, 27 Oct 2023 11:10:05 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8DB763F64C; Fri, 27 Oct 2023 11:09:21 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 08/24] arm64: add POIndex defines Date: Fri, 27 Oct 2023 19:08:34 +0100 Message-Id: <20231027180850.1068089-9-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 668FFA0004 X-Rspam-User: X-Stat-Signature: eajypep68uxoez9r9ou5gt3xrmna7mmk X-Rspamd-Server: rspam03 X-HE-Tag: 1698430164-851894 X-HE-Meta: U2FsdGVkX1+76VJLkpCRT/w4QiTQC5ba+kbi87I9Uk5ArGPY06d+oMk3PfLtBxu0dH/vK7kInsiOwBSBkUToQceZjsIsZzVPNG3WPbt3xU6hSckIZDytBp1oUzWIolge8sMkLbI6RVlA//p+ru48qFE8lllPH5flU6Cld6jWdwFAwlgE9Mn2k+GulbFetDIsJzmI4CDZ1Sl9zwpO6Ml6GWDwtZKmWnVqMDU//UgkDzkAafTrJ0QqO2pfRmQQD1IBAi9i7G/Xnhur4v5i6UC0QmRzX7ItqzLBTa3/nWZvCT89ahIJXgre4kZiSuieuCWrdmhlnzJ1kZEQexsbuGwaSgXfSVskiLS4vUqG4vU2bTR1UcmJIqUO17Ka4l2Hw+jEkl4g/KBkx6fPvZyw5VCmSB8eF/J7U8M9D8RlZgb5qoAF38ag5Y+PGkyj04IndpcsPEXZmuGobkhth1FN6PBJInIlqJ1CUncgICMs0t6KXPc7UTgCiM12/ILKHvtGAPomaNW6ZFCRFf3jD4ImgqjL6LtVk2zsQb2dobxCUXDLfrjZzEGqUflmDXPYI0bZ6wj6pkiMVQkLo/2jaGorzkLoCiU/tJH5qoWQaB9mwPfdHTmFiVPAsj884PqNGN4cxgZm6KwP9s9jijBLQPrZ0R17/pbnbo4sqiBqL5CVT6Kxzit1gX2tn8J1HmZBO6sP4bLT1Mu1sAwouj16slf1YRwf1LsSfuXMX1g4QOhb/n4hy5p+Uvek0mKQJleVQ3ooQGfVLasjwk/zl/9COSgGBs44XCmDGpdOW+U0Y7fKt8TzAnPibAbQNeimY0Y8Kyvs68jP7gxRZbemGOvLPXaUiuTOr06zTffEm/dltHoJ5/eFgdJNJyGc/SDmyQJ/T8gLBfQbv4noVt+uEH+c52aDAqaYnjEgKJDXwQzrgU3OdkpLJoPu3fzHSaFOw1HaXk9QKglkYOgH3kifQpizFYLIaBL yu8HYMPA K5HN7rWVxsKJTarnLfGirkAwcu5Zy39LBtCoz45nv2ZjZpPrhklKF7tDgWXgiCrnspkoWt+L/YLuoUcSPIQUTFM8Si0FC/GsyINYezhsR4P2pSnxi3+VifO7oCLqVnkDnCxBkFpuwQcumF9/FzUoxJN4A2eGU+bNBUtK6wPx4Ew7dooUSmjvpUmOg1b8aCx0PlzWxvkKzbzWWd6DwMd3stQ7Bhw== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The 3-bit POIndex is stored in the PTE at bits 60..62. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/pgtable-hwdef.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index e4944d517c99..fe270fa39110 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -178,6 +178,16 @@ #define PTE_PI_IDX_2 53 /* PXN */ #define PTE_PI_IDX_3 54 /* UXN */ +/* + * POIndex[2:0] encoding (Permission Overlay Extension) + */ +#define PTE_PO_IDX_0 (_AT(pteval_t, 1) << 60) +#define PTE_PO_IDX_1 (_AT(pteval_t, 1) << 61) +#define PTE_PO_IDX_2 (_AT(pteval_t, 1) << 62) + +#define PTE_PO_IDX_MASK GENMASK_ULL(62, 60) + + /* * Memory Attribute override for Stage-2 (MemAttr[3:0]) */ From patchwork Fri Oct 27 18:08:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89A89C25B70 for ; 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bh=cJ9gPzu1m5lwl/4WggaljQo9jvMDW89g9YiI3aatqiA=; b=r8ASxmRqfb30lzb8q4PpBCMk3i9PjWEdm9YianzCgfZ1vetM9crzMNiFZc2suBVMPNGUPE 1xIH3odH7Aj03YR0C5v6GJsu2tjqV8z4NW1PEl1ZpjOzf9bA7M6RuBhGzRSvN4qXJ97v+0 PwrsQQaWnUoa+X2yzLXVtWk8YGfn2Qw= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C48A81424; Fri, 27 Oct 2023 11:10:07 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0278A3F64C; Fri, 27 Oct 2023 11:09:23 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 09/24] arm64: define VM_PKEY_BIT* for arm64 Date: Fri, 27 Oct 2023 19:08:35 +0100 Message-Id: <20231027180850.1068089-10-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: 0C4754000D X-Stat-Signature: ijpx1f63dhpgbum9gozjb99cd7jcg5bx X-HE-Tag: 1698430166-90724 X-HE-Meta: U2FsdGVkX18Ga0h5sIM4VLLGi/4RZrYIjss3VEJLBcFVgYI8/QxNaN1W+W+AtMx1B4xc+tj8QVM5RCqfbFo0mg4w8vyxdMuBYR3S0xiUY+0W9dmea59NIhQBOcOpRKm4sm7P9DzRWz1S/bYnSjtMm/Z7O60TubyMI+BUEUOZzAoa7XDqycW45HqOL4IRRMuIsKRdjZHHwvUlMBxbKXRC0n4kDbwX8IKJpbDCMg5OmBcNMHUwGYSbZXu9r293OK/26KnLs5J2JVY0ZV6xuAsKqCsWiYv19bSuCQsmagXCNmWuexcFoRVBEPJGlr3Yh9my9SfJ+cHuo5F1bYd+HvuccqZjJVze1dJGGE0oMYBE9BW102sOc3x5cF1oparVX+IM4moBhL7Z0OxFW8f7bS26Z8tkIQZoPg3HY436PtG9ZP0ORWkq6equrJpBb67IgWgKsNtJiQnBs+8vY3IXlliOXK6AQtUPx+IUFL8Bg+mdaShs5FU+z4D1LqQGJaJNADtisO3OVQM4lWD5xpP7zJjUHdTMQaZt1zNmcwaMpJlL8dcIbFZaqzPyUJVBX4uREXmQtxz8wjUtNRpQ5UxT2PtEnQwQYxPAf8pJZ2WYcTqZoEg+dw+Ch+aA2vg4hRJuvEVgoA+yeqhlIrnQYwQVFFVOFqgAmkX2d9ZclFMFPTUmlw72MLVHkYNvfNQJXGALJNDJ9wKlgKFua6AfuXLJJAwVGJhjgQhIJmSG285CUlIIfUuiXAbq5ygYtX5yCa3C/fBWMPq77cmEz7aAa+u1xvELrpZtBE1rn852DGhkZqlrK4GnjK+swWVjk+zoS9rC9eR2VXhNIq4yt74N1Dy9d9Qng6trhmAIavtGzWBCjTL+qNPMxNDCKXOmGvin6jVLMZpktopL77qFqJ1vo01hVCyUfJq36I4HGkchOG99mdQYMc71JP2QZJx8Ls+sVjnRjcbPIm7yz9FTS4CPp7bbtDI KrbdCdGC K2sIauvj6PVV7zL4Uk1/RRj7SxuzVVyV0Lw+lScO46bknHoSq/Ie9BSR3WMFXgzHhmDlVXr4t77dVw652SGVya7cTrf1GKu6u+/mvb0C6EjQaF5gwry5gsUa7Rw8/p94T5IauA6LoWVyOHmdKzPk/pSAZpDT888BBYBTHSdXQslYNnthr42qSr1iPJ+y+YnpTzgJKyrC3VIjAzKqv1jz+VstTv1B08Cae4y7KuSTO+kLyb+uKzD7yDsyuNUONseKMalQGjTPncs2+uDI= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Define the VM_PKEY_BIT* values for arm64, and convert them into the arm64 specific pgprot values. Move the current values for x86 and PPC into arch/*. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/mman.h | 8 +++++++- arch/arm64/include/asm/page.h | 10 ++++++++++ arch/arm64/mm/mmap.c | 9 +++++++++ arch/powerpc/include/asm/page.h | 11 +++++++++++ arch/x86/include/asm/page.h | 10 ++++++++++ fs/proc/task_mmu.c | 2 ++ include/linux/mm.h | 13 ------------- 7 files changed, 49 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/mman.h b/arch/arm64/include/asm/mman.h index 5966ee4a6154..ecb2d18dc4d7 100644 --- a/arch/arm64/include/asm/mman.h +++ b/arch/arm64/include/asm/mman.h @@ -7,7 +7,7 @@ #include static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot, - unsigned long pkey __always_unused) + unsigned long pkey) { unsigned long ret = 0; @@ -17,6 +17,12 @@ static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot, if (system_supports_mte() && (prot & PROT_MTE)) ret |= VM_MTE; +#if defined(CONFIG_ARCH_HAS_PKEYS) + ret |= pkey & 0x1 ? VM_PKEY_BIT0 : 0; + ret |= pkey & 0x2 ? VM_PKEY_BIT1 : 0; + ret |= pkey & 0x4 ? VM_PKEY_BIT2 : 0; +#endif + return ret; } #define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey) diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h index 2312e6ee595f..aabfda2516d2 100644 --- a/arch/arm64/include/asm/page.h +++ b/arch/arm64/include/asm/page.h @@ -49,6 +49,16 @@ int pfn_is_map_memory(unsigned long pfn); #define VM_DATA_DEFAULT_FLAGS (VM_DATA_FLAGS_TSK_EXEC | VM_MTE_ALLOWED) +#if defined(CONFIG_ARCH_HAS_PKEYS) +/* A protection key is a 3-bit value */ +# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_2 +# define VM_PKEY_BIT0 VM_HIGH_ARCH_2 +# define VM_PKEY_BIT1 VM_HIGH_ARCH_3 +# define VM_PKEY_BIT2 VM_HIGH_ARCH_4 +# define VM_PKEY_BIT3 0 +# define VM_PKEY_BIT4 0 +#endif + #include #endif diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c index 8f5b7ce857ed..df4ece982375 100644 --- a/arch/arm64/mm/mmap.c +++ b/arch/arm64/mm/mmap.c @@ -98,6 +98,15 @@ pgprot_t vm_get_page_prot(unsigned long vm_flags) if (vm_flags & VM_MTE) prot |= PTE_ATTRINDX(MT_NORMAL_TAGGED); +#ifdef CONFIG_ARCH_HAS_PKEYS + if (vm_flags & VM_PKEY_BIT0) + prot |= PTE_PO_IDX_0; + if (vm_flags & VM_PKEY_BIT1) + prot |= PTE_PO_IDX_1; + if (vm_flags & VM_PKEY_BIT2) + prot |= PTE_PO_IDX_2; +#endif + return __pgprot(prot); } EXPORT_SYMBOL(vm_get_page_prot); diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h index e5fcc79b5bfb..a5e75ec333ad 100644 --- a/arch/powerpc/include/asm/page.h +++ b/arch/powerpc/include/asm/page.h @@ -330,6 +330,17 @@ static inline unsigned long kaslr_offset(void) } #include + +#if defined(CONFIG_ARCH_HAS_PKEYS) +# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_0 +/* A protection key is a 5-bit value */ +# define VM_PKEY_BIT0 VM_HIGH_ARCH_0 +# define VM_PKEY_BIT1 VM_HIGH_ARCH_1 +# define VM_PKEY_BIT2 VM_HIGH_ARCH_2 +# define VM_PKEY_BIT3 VM_HIGH_ARCH_3 +# define VM_PKEY_BIT4 VM_HIGH_ARCH_4 +#endif /* CONFIG_ARCH_HAS_PKEYS */ + #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_PAGE_H */ diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h index d18e5c332cb9..b770db1a21e7 100644 --- a/arch/x86/include/asm/page.h +++ b/arch/x86/include/asm/page.h @@ -87,5 +87,15 @@ static __always_inline u64 __is_canonical_address(u64 vaddr, u8 vaddr_bits) #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA +#if defined(CONFIG_ARCH_HAS_PKEYS) +# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_0 +/* A protection key is a 4-bit value */ +# define VM_PKEY_BIT0 VM_HIGH_ARCH_0 +# define VM_PKEY_BIT1 VM_HIGH_ARCH_1 +# define VM_PKEY_BIT2 VM_HIGH_ARCH_2 +# define VM_PKEY_BIT3 VM_HIGH_ARCH_3 +# define VM_PKEY_BIT4 0 +#endif /* CONFIG_ARCH_HAS_PKEYS */ + #endif /* __KERNEL__ */ #endif /* _ASM_X86_PAGE_H */ diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c index 3dd5be96691b..fcd94a39bb30 100644 --- a/fs/proc/task_mmu.c +++ b/fs/proc/task_mmu.c @@ -689,7 +689,9 @@ static void show_smap_vma_flags(struct seq_file *m, struct vm_area_struct *vma) [ilog2(VM_PKEY_BIT0)] = "", [ilog2(VM_PKEY_BIT1)] = "", [ilog2(VM_PKEY_BIT2)] = "", +#if VM_PKEY_BIT3 [ilog2(VM_PKEY_BIT3)] = "", +#endif #if VM_PKEY_BIT4 [ilog2(VM_PKEY_BIT4)] = "", #endif diff --git a/include/linux/mm.h b/include/linux/mm.h index bf5d0b1b16f4..84ee022bf43e 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -328,19 +328,6 @@ extern unsigned int kobjsize(const void *objp); #define VM_HIGH_ARCH_5 BIT(VM_HIGH_ARCH_BIT_5) #endif /* CONFIG_ARCH_USES_HIGH_VMA_FLAGS */ -#ifdef CONFIG_ARCH_HAS_PKEYS -# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_0 -# define VM_PKEY_BIT0 VM_HIGH_ARCH_0 /* A protection key is a 4-bit value */ -# define VM_PKEY_BIT1 VM_HIGH_ARCH_1 /* on x86 and 5-bit value on ppc64 */ -# define VM_PKEY_BIT2 VM_HIGH_ARCH_2 -# define VM_PKEY_BIT3 VM_HIGH_ARCH_3 -#ifdef CONFIG_PPC -# define VM_PKEY_BIT4 VM_HIGH_ARCH_4 -#else -# define VM_PKEY_BIT4 0 -#endif -#endif /* CONFIG_ARCH_HAS_PKEYS */ - #ifdef CONFIG_X86_USER_SHADOW_STACK /* * VM_SHADOW_STACK should not be set with VM_SHARED because of lack of From patchwork Fri Oct 27 18:08:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1F26C25B47 for ; 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Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/pgtable.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 7f7d9b1df4e5..6c57ebe8e349 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -820,7 +820,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) */ const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | PTE_PROT_NONE | PTE_VALID | PTE_WRITE | PTE_GP | - PTE_ATTRINDX_MASK; + PTE_ATTRINDX_MASK | PTE_PO_IDX_MASK; + /* preserve the hardware dirty information */ if (pte_hw_dirty(pte)) pte = set_pte_bit(pte, __pgprot(PTE_DIRTY)); From patchwork Fri Oct 27 18:08:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D6D1C25B70 for ; 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s=arc-20220608; d=hostedemail.com; t=1698430171; a=rsa-sha256; cv=none; b=oU3HWD+CogIhUhXIphAcYnFh4XTShue97MODcjK4au1FDe2p8ZMxi9IgIuKY00954SeZJf amm+tr9F8hU3gH5jw9OSWrzcxQdtlUnex/i+HEjEN6oY0z6hv8RmLWkiHSrVnbKzO1wOei hyaB0tHmzRwCnxE3YPEagP28dc0pJt8= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A1C3B153B; Fri, 27 Oct 2023 11:10:12 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D3E853F64C; Fri, 27 Oct 2023 11:09:28 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 11/24] arm64: enable ARCH_HAS_PKEYS on arm64 Date: Fri, 27 Oct 2023 19:08:37 +0100 Message-Id: <20231027180850.1068089-12-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: A42E01A001D X-Stat-Signature: iss1e7j3wsue7g7ruy1699ccb7hb5fno X-Rspam-User: X-HE-Tag: 1698430171-442315 X-HE-Meta: U2FsdGVkX18Etq1PgE0M2ZO5ZUDc/si3Lp+huWss8UHL6nkH1COShap4CN/4pT7LskYTIsQ9bcKngo9MbKNCSZpoYzAS4AAvRcGsdVAbTML2wImYh466sBvI/MbnBPuzu3jzd7UXX/8icWIVAZlYgY3FEWPnNCpAG9qos4DCCN3GyZtny97ws7KfO5HW/uZAWhkkCiyD2yX/lqbPj5yCBvklNRnadJq+vGo87jDcSGdyjqjqzfwqZuNV7DUuzkAe0xsTHUqr40MJQOsG3s8WDskURBisaslI3Vb5ssaEfRF+pyrVHorg+vLdvid/F/PqK3uxzLHs1JqXFBZArdqZaabHU2f6VDQi8ecRkiHJMI6GvUMHgUpHiWvwWLXnaUkZJo5VvzRikhb6DqV/wpFpqThwSOBgF/H8IznkUGMy8WbV6tcr0fLXDwevG5xWJ9FnnADyD2EX0IxX2aUe4OZ+dXVEfcPNxRJHLLU8utV49fWCRB+zLpIAute1YLHkZYapA87Y70kXzj9lzmDBlO3zOes0RSp9xvtVRla061IFxQrqNwZdURBLgAdgy/VrmqizhpW7b3Y6Nh2hD1+VGy+NV1TD5ukXTSQ652SBaVCy4eXoZDOWNV8YCcFpguK1JUnMpu4pnDhXyo2M6nakjh5f41aBUWGdQrS+HDITFvDycosS3eJ6VqW1906xai2kgWuEzTxeG4cOx7MiX/eh6fljvGR4tmHuIbt9lxzafoE+wNQtar4Zn8AHUAU+VVXl2lr2tHNtrAVRB8zWWV7QCLxozo/xpS9LLMSNGHRIvkii1VlHfuwfjv585UuUpUEvWJgiSnlT0iOuaUZDyYwKybcn5mOLdD+LKD2+7SzCyFI+H3Zh+IIMEdR2pQylJp1sXiSbt40dKmB9V/tKF8isKmKxKIN6pRwFps8Codg0RZr/JMdsfCMnfBQnHDrhmrYznSdtHwRuSeMPSmBPBBmn2X7 E27aB/FP 0YQSa2qaeEpKaUBoxKT4JUUtmg6u1DAneqCEgErhL+zAcUz/msUuxkj+HSt2rsrugTjGZDdEGGh/lBGzjborYljlfu6G8nHjBx6iV3PpQr+u9q3DvrRtX31gp/o9UxwNFg5I8HtlZXNP3adMEsKpa53vG4rPxxdRoxNZtm+z5RN26mqGgwxuDSnzJz2L6Bl3uhLsfhEtox4W0MURxvMP5h8e4KK7ZFEvbjJiWXdRj7PsRYRJZU/JEj7sdGsIFrrf2z1Qtm/uMMOc/h6Q= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Enable the ARCH_HAS_PKEYS config, but provide dummy functions for the entire interface. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 2 ++ arch/arm64/include/asm/pkeys.h | 54 ++++++++++++++++++++++++++++++++++ arch/arm64/mm/mmu.c | 7 +++++ 3 files changed, 63 insertions(+) create mode 100644 arch/arm64/include/asm/pkeys.h diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 1f1a12e28c3f..68cfcbd95c8e 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2064,6 +2064,8 @@ menu "ARMv8.9 architectural features" config ARM64_POE prompt "Permission Overlay Extension" def_bool y + select ARCH_USES_HIGH_VMA_FLAGS + select ARCH_HAS_PKEYS help The Permission Overlay Extension is used to implement Memory Protection Keys. Memory Protection Keys provides a mechanism for diff --git a/arch/arm64/include/asm/pkeys.h b/arch/arm64/include/asm/pkeys.h new file mode 100644 index 000000000000..5761fb48fd53 --- /dev/null +++ b/arch/arm64/include/asm/pkeys.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Arm Ltd. + * + * Based on arch/x86/include/asm/pkeys.h +*/ + +#ifndef _ASM_ARM64_PKEYS_H +#define _ASM_ARM64_PKEYS_H + +#define ARCH_VM_PKEY_FLAGS (VM_PKEY_BIT0 | VM_PKEY_BIT1 | VM_PKEY_BIT2) + +#define arch_max_pkey() 0 + +int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, + unsigned long init_val); + +static inline bool arch_pkeys_enabled(void) +{ + return false; +} + +static inline int vma_pkey(struct vm_area_struct *vma) +{ + return -1; +} + +static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma, + int prot, int pkey) +{ + return -1; +} + +static inline int execute_only_pkey(struct mm_struct *mm) +{ + return -1; +} + +static inline bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey) +{ + return false; +} + +static inline int mm_pkey_alloc(struct mm_struct *mm) +{ + return -1; +} + +static inline int mm_pkey_free(struct mm_struct *mm, int pkey) +{ + return -EINVAL; +} + +#endif /* _ASM_ARM64_PKEYS_H */ diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 47781bec6171..11765791b880 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1487,3 +1487,10 @@ void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte { set_pte_at(vma->vm_mm, addr, ptep, pte); } + +#ifdef CONFIG_ARCH_HAS_PKEYS +int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val) +{ + return -ENOSPC; +} +#endif From patchwork Fri Oct 27 18:08:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E118BC25B72 for ; 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imf10.hostedemail.com; dkim=none; spf=pass (imf10.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com; dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 173A4143D; Fri, 27 Oct 2023 11:10:15 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 48ED73F64C; Fri, 27 Oct 2023 11:09:31 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 12/24] arm64: handle PKEY/POE faults Date: Fri, 27 Oct 2023 19:08:38 +0100 Message-Id: <20231027180850.1068089-13-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 3FBAAC001C X-Rspam-User: X-Stat-Signature: zqug9g6eh1dm15mm9uu6opts5tmbsc67 X-Rspamd-Server: rspam03 X-HE-Tag: 1698430174-203109 X-HE-Meta: U2FsdGVkX1/IWXXyP8bqmo9j1GDy5ew04rrdZrndVhwdCJePmPOLSlgEOsXE0Z+sEBixH3QjUM8rDVfMKvtx57QP2ZyTpTGce/1Gv4MQy3D21tLP7r6FyzLdPwAlis3maiSWW9SYT9QDWKSUgeeFcEi1LqGYZjoesBYhxxzGg1BH5N1zEtVydaG6KQRg75FgGhgIUCULFyfRC8IXnkAOjYBCnNBkAxfAOK2gWu2BgUlVFUPefwfE4bA9WVVsXV7EPtnD3vzbD/tfhSkI7RlVlWBDxQ0O730hErxo3x0mjSO8ZijXrwKRGdifgmhMSLasUzhLm7u0DbLh0QgVqrgp7MqbITGVdgw7arCQH4JvdbF9e+N1vmFDGdoxY65LT6WlLXk5ifrEVZkb2r+XNsTQDc9xnrbEasSLGKeqvcD7upa6mASMjNFrhedeoDvGMDDIqKewDHoD3Cjsf1L3+7ml6SMpfZoGSZMZJtZ1hS9PKtrxlx+7MolwDQiSKy2dsBtdl7VNmtw6PaPC7NgGrvAsIx1GxaGw7MUL3pmoFC1XG3WtSzdT2FaPo3hhDQo1MtX2Cagmm67N2j/L1MVQATvaD767aC6/dFxsjwEp9052uojJUh04DPZz5QyjTJLIHz9SJwXIHfZt3JDA1iqJ9vRffx/pohqKnTKXYDbfHOcnNthWPXsA1HXW7ZGzzdGLPrrp+dG3sn+x67o1z/A/v+5OSdC6pJQVJ7I/34h5EoZ1Tckje5sPKnJK/ZBEKqMz04c4odrHxh39v8GOaPhSSNEe4XJQGJ9TweRa6ZkvGeRFhkjqPuxRWEsNLakeLHmQaM50kLWKQ5KeSVGvBWyIkmVKcfhHoik9ebWxLYklXVxJrYy8HuNo2eWwTJXK1/DCoJFrBO+VYsRtDS9vmkNQ1sqHFIQ2TjAMCmexaDokbAOO7do6aYQHRwZ4nvJCA2XFRoRWLu9Oe7e9Tl8ljTOqMoU /6Aqffjd D33DzxUFEBq0J/ZpPgwbQ6rSqdTk+RKYJCxIQM3+tOQjfHIM3Ji6HL4SBLUUw9OrA543PVWbP425rB/aBIo+ezXrSkEbRDlzyx+P6NHVBbIyq/AB92oJ721DHqIf3CDHhEaqlpnnXOqQNU07koX6P6IOHTLQLBeGR29frTwrDwvKhnFFUUTtdozwzblwSFHacnv5fY9QSwUqijWdYvFVIHLCcIbLA3bGgUHjQ X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: If a memory fault occurs that is due to an overlay/pkey fault, report that to userspace with a SEGV_PKUERR. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/traps.h | 1 + arch/arm64/kernel/traps.c | 12 ++++++++-- arch/arm64/mm/fault.c | 44 +++++++++++++++++++++++++++++++--- 3 files changed, 52 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/traps.h b/arch/arm64/include/asm/traps.h index d66dfb3a72dd..dae51eccfc19 100644 --- a/arch/arm64/include/asm/traps.h +++ b/arch/arm64/include/asm/traps.h @@ -26,6 +26,7 @@ try_emulate_armv8_deprecated(struct pt_regs *regs, u32 insn) void force_signal_inject(int signal, int code, unsigned long address, unsigned long err); void arm64_notify_segfault(unsigned long addr); void arm64_force_sig_fault(int signo, int code, unsigned long far, const char *str); +void arm64_force_sig_fault_pkey(int signo, int code, unsigned long far, const char *str, int pkey); void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, const char *str); void arm64_force_sig_ptrace_errno_trap(int errno, unsigned long far, const char *str); diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 8b70759cdbb9..b68682c284a2 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -263,16 +263,24 @@ static void arm64_show_signal(int signo, const char *str) __show_regs(regs); } -void arm64_force_sig_fault(int signo, int code, unsigned long far, - const char *str) +void arm64_force_sig_fault_pkey(int signo, int code, unsigned long far, + const char *str, int pkey) { arm64_show_signal(signo, str); if (signo == SIGKILL) force_sig(SIGKILL); + else if (code == SEGV_PKUERR) + force_sig_pkuerr((void __user *)far, pkey); else force_sig_fault(signo, code, (void __user *)far); } +void arm64_force_sig_fault(int signo, int code, unsigned long far, + const char *str) +{ + arm64_force_sig_fault_pkey(signo, code, far, str, 0); +} + void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, const char *str) { diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 2e5d1e238af9..655dd80f0ec0 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -497,6 +498,23 @@ static void do_bad_area(unsigned long far, unsigned long esr, #define VM_FAULT_BADMAP ((__force vm_fault_t)0x010000) #define VM_FAULT_BADACCESS ((__force vm_fault_t)0x020000) +static bool fault_from_pkey(unsigned long esr, struct vm_area_struct *vma, + unsigned int mm_flags) +{ + unsigned long iss2 = ESR_ELx_ISS2(esr); + + if (!arch_pkeys_enabled()) + return false; + + if (iss2 & ESR_ELx_Overlay) + return true; + + return !arch_vma_access_permitted(vma, + mm_flags & FAULT_FLAG_WRITE, + mm_flags & FAULT_FLAG_INSTRUCTION, + mm_flags & FAULT_FLAG_REMOTE); +} + static vm_fault_t __do_page_fault(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned int mm_flags, unsigned long vm_flags, @@ -688,9 +706,29 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr, * Something tried to access memory that isn't in our memory * map. */ - arm64_force_sig_fault(SIGSEGV, - fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, - far, inf->name); + int fault_kind; + /* + * The pkey value that we return to userspace can be different + * from the pkey that caused the fault. + * + * 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4); + * 2. T1 : set AMR to deny access to pkey=4, touches, page + * 3. T1 : faults... + * 4. T2: mprotect_key(foo, PAGE_SIZE, pkey=5); + * 5. T1 : enters fault handler, takes mmap_lock, etc... + * 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really + * faulted on a pte with its pkey=4. + */ + int pkey = vma_pkey(vma); + + if (fault_from_pkey(esr, vma, mm_flags)) + fault_kind = SEGV_PKUERR; + else + fault_kind = fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR; + + arm64_force_sig_fault_pkey(SIGSEGV, + fault_kind, + far, inf->name, pkey); } return 0; From patchwork Fri Oct 27 18:08:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28A60C25B6F for ; Fri, 27 Oct 2023 18:09:39 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B42A86B03E2; Fri, 27 Oct 2023 14:09:38 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id ACAAD6B03E3; Fri, 27 Oct 2023 14:09:38 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 9471D6B03E4; Fri, 27 Oct 2023 14:09:38 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 7F30A6B03E2 for ; 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dmarc=pass (policy=none) header.from=arm.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1698430176; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fP0hZBQLW0r5LPMNDw9vkQWBkTgVKFZIvfc9QkLlChM=; b=HF0xu4BSAMVj8YcBoBN0JvV34NClQ8HYO7aruR8ghxPkJa5CBv8jQYWRFueirLopIyFWIF RbZKbWeMaPDnlCq5K22k6E9uC/AJHuBWsFLenOGiLprJIG1zo8YaZ1kbuz9eoYRCHh3Buz ZBjYdT64mo3FPMRBA+lAPpWLQDmof2M= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 809C51424; Fri, 27 Oct 2023 11:10:17 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B264B3F64C; Fri, 27 Oct 2023 11:09:33 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 13/24] arm64: stop using generic mm_hooks.h Date: Fri, 27 Oct 2023 19:08:39 +0100 Message-Id: <20231027180850.1068089-14-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: B2A1210000E X-Stat-Signature: kgiepfboc8m5aijou7saawrf8oaonp3h X-HE-Tag: 1698430176-36420 X-HE-Meta: U2FsdGVkX1/S9i0dhoBt+jgxj3mgpizoWFSMcHj2thnN6aqGoiM5HjxVikSxEjlz5TBWnUy1EY7mmlw2ypHL+lRPYZgsbY+qd6bDrUKC8BfZamA6wMu/PC8BV5fIwpEtrGUhAsVzySyyvzZolgAq6uPlQ4JsolApgzk7uT/a+3Oh7N6/p+llp0GfnyokF1PBGEjui1bXfdTLCQ9+weRpoZvb+a9zWLrfmSssyF+rc0kU8ebEywS1o6U96ppxeYSD6imAWaxoIWTmDOzHxiyXj1QmDfz7lxx8qL1vNlqm903hJGgYdsRVCB895HH/rbFie8e1ebDKYJwHoJnOi8OwuapntlSq9q+lAKRkuXuz1sWBkiZtKlDFwlF/OA38Iz7PkN2qnOcLgAzKZt6eXnzPLYPJ91HW3I80rTMrKU1OaPVnbmfVZhFoahUtUVqTo5AcOIXhunEa1t6A9Bs2G+GuGaBE40qAs+l9+8TRLWvcO1NulPbgqcRbBzDhuEUiM4McXhpDayqbuIVW/veTV4GmWWIFFLXjYvuWP7zD/m8fW9+hcX+Sf4zAyhfJP+J/e+vx2LUsCkXis55ZJl6kOaIh43NES4RiakXLHB9l1i+wEQAguW6T+zV8/1tUZh+MQ0NSrLZVAr/NIqO7d3GTylshZn/9HqEdaZZ+fbyLS1+jGXusI9A1XF1Xxhyf3RQtqOXM/Jcswatszqp3NLPnas23aCMwya7B7swLALSX246kLngIJ9Dnp4MVfv1WtR/nNcHHSx9egP+LyFEhe3OH5ba/a+3ynUdQ/NsqPc5f6eW8zK5zsfCtfbG9BkkUrftXbVbR7MCuvg27RE1lJBTq9mEx7jvbpmh9ZVKif95VhTkdjg1fDFnMHIdeUul6DEXhAAzE+SKtilnpgm5c1iCiB1aUfO52zExWMnTsY7245VSgwT+2CH8wp0S1RGIIQN64/U8/1VO+GxcyDvYzj4insAt qO29B+6R lVzFo+esAA/7SFL+6ApmltdTkTuSDVpHdjTjiS/47xX1z01F2y5ecclgDcdrgpSYBqITKpmvVdHEFo4C+NRvCS/H2HbUMdtHTSXhFEYyWGmvGVUX0jSFG+MBiO8binaJOAu+bGYZSg8AhE6mGq8yRlQPqKwipEhuo6VfJ7c3aCWW9fN2yrJ76bysESrIiMlKRCSZNJB5XnoSpo/aQDXRwDAJ/kAXCobLKvKreABWvrYVXTIKqluyp8zHLBevy8xzpbOC+k13abcXbtHU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: These functions will be extended to support pkeys. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/mmu_context.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index a6fb325424e7..c0eeed54225e 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -209,6 +208,20 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) return 0; } +static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) +{ + return 0; +} + +static inline void arch_exit_mmap(struct mm_struct *mm) +{ +} + +static inline void arch_unmap(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ +} + #ifdef CONFIG_ARM64_SW_TTBR0_PAN static inline void update_saved_ttbr0(struct task_struct *tsk, struct mm_struct *mm) @@ -298,6 +311,12 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm) return -1UL >> 8; } +static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, + bool write, bool execute, bool foreign) +{ + return true; +} + #include #endif /* !__ASSEMBLY__ */ From patchwork Fri Oct 27 18:08:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3E31C25B47 for ; Fri, 27 Oct 2023 18:09:41 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 48CAA6B03E3; Fri, 27 Oct 2023 14:09:41 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 415476B03E4; Fri, 27 Oct 2023 14:09:41 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 267326B03E5; Fri, 27 Oct 2023 14:09:41 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id 0F8826B03E3 for ; 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Fri, 27 Oct 2023 11:09:36 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 14/24] arm64: implement PKEYS support Date: Fri, 27 Oct 2023 19:08:40 +0100 Message-Id: <20231027180850.1068089-15-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 193F914001E X-Rspam-User: X-Rspamd-Server: rspam02 X-Stat-Signature: p1dewtnudhrmp91aisk3358siow3segu X-HE-Tag: 1698430178-901557 X-HE-Meta: U2FsdGVkX1/Cf87ZhOIYV954jQwRBAO5DsIYjKlIkuG7aDX0pt5blp3utf/QI9RFdeQt8tIQtrbo2OqkDqknCmyFt7XhMe30+4r7goEAgJdFrRaNiNPSwXHUwt3lmRGGxcGl0FFPTHpvWuWkz2uMzNurRbQqK9va6jSZ4kOqvrbpc4Ht1kRkAgnOt64e9ioFq9T+CvpMAlM52yUDnt8x9bfMlHjx1hyJhLsfGL7qxMhNurdkaBwEZJPJQVfuZi9DXQ/avHGR0ZmcWPdorvU4htQyB6NzH5iyKveJFqFk4uKXDhyIjfFc9W57pJPB1SIkdoNXjrqALWTDQdJyWFG1IxuGCLKk9Dt8Th5uaTbStJ6OyU4YctXwI0fjcWKriKZEMJoLh008VIP/nzaIB+Gt2PBiDlbDAR9dCA/aWNdJK+YmU7FwOuhbfO9HCMHUj5Bn92uWJ5u0GSYTQ3vTiJnC/05q/JoW++0s/KGyL19wcMVLa+5chIWy58AQtmbYe+F5bZNnB3kSwJt6q4iYGwnct/+O86SQ8Paekj9wpHY9P0dqTt8L+iWD2jzKYyYIxipnxcMAt5VS61f3bwbXSyGDDLobLl2JulKIsY1nd/l+Fe7FEgaG1L7sYh5jh8hIPbx/hPUMJs+2plltfxOxotmdO/HZnj7g3JMaE4UVeZb+RoMGNVOp9fsRXHxQ2Mu5kjpaTt8ZfUkLe6cr9kLBM/Baf5WJCWHfCWfigbDoSKvVMnfTuhAfTM8FDo81LjTOOpiaL63LBmgWOfurmmmqLNkvOJ3XbJQOV2cNxjp7LEYcaRs5lvHLG7tU8mbkXb6YTHtWnMDaOAkKW9OMjPvSMxJie2ryCsMnauXY7K03vGfPvJ2q6HrfnwG3vGAb+9pBnUKNhAwV6Dl18k51h0YprIMmIluhMWvZ5f5qKt4G3Bq3lbHsmgeWOvhaF2iGtnQ7CVnm7HlgKtnWz255FpaC3sz Aj3zT5hO fto+22KovUvNOv1gX5jw/9lB8q53Ob/6blLpGSCqvKWuwQ3Flthy0+uBJ/NNk+t2sqnrFWh2+Xi+O6bWewKh782T1uWq10WgmdZ5pi72nAqtr8AQqYs8VV7+PMAcazP2owD36GiE4h4CaxRnz8Iy1PHA1BPp16oBdp7RJCjq9YepwbmjKCg6aisSESKzfCYr7q7fpyg7NYAHDKuUTXsBSzJ2EiKFO/om4tHZe X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Implement the PKEYS interface, using the Permission Overlay Extension. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/mmu.h | 2 + arch/arm64/include/asm/mmu_context.h | 32 ++++++++++++- arch/arm64/include/asm/pgtable.h | 23 +++++++++- arch/arm64/include/asm/pkeys.h | 68 +++++++++++++++++++++++++--- arch/arm64/include/asm/por.h | 33 ++++++++++++++ arch/arm64/mm/mmu.c | 35 +++++++++++++- 6 files changed, 184 insertions(+), 9 deletions(-) create mode 100644 arch/arm64/include/asm/por.h diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h index 94b68850cb9f..ed2cd66347d8 100644 --- a/arch/arm64/include/asm/mmu.h +++ b/arch/arm64/include/asm/mmu.h @@ -25,6 +25,8 @@ typedef struct { refcount_t pinned; void *vdso; unsigned long flags; + + u8 pkey_allocation_map; } mm_context_t; /* diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index c0eeed54225e..aa739b87d49b 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -205,11 +206,24 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) { atomic64_set(&mm->context.id, 0); refcount_set(&mm->context.pinned, 0); + + // pkey 0 is the default, so always reserve it. + mm->context.pkey_allocation_map = 0x1; + return 0; } +static inline void arch_dup_pkeys(struct mm_struct *oldmm, + struct mm_struct *mm) +{ + /* Duplicate the oldmm pkey state in mm: */ + mm->context.pkey_allocation_map = oldmm->context.pkey_allocation_map; +} + static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) { + arch_dup_pkeys(oldmm, mm); + return 0; } @@ -311,10 +325,26 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm) return -1UL >> 8; } +/* + * We only want to enforce protection keys on the current process + * because we effectively have no access to POR_EL0 for other + * processes or any way to tell *which * POR_EL0 in a threaded + * process we could use. + * + * So do not enforce things if the VMA is not from the current + * mm, or if we are in a kernel thread. + */ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write, bool execute, bool foreign) { - return true; + if (!arch_pkeys_enabled()) + return true; + + /* allow access if the VMA is not one from this process */ + if (foreign || vma_is_foreign(vma)) + return true; + + return por_el0_allows_pkey(vma_pkey(vma), write, execute); } #include diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 6c57ebe8e349..8a1ff6ed917d 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -143,6 +144,24 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys) #define pte_accessible(mm, pte) \ (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte)) +static inline bool por_el0_allows_pkey(u8 pkey, bool write, bool execute) +{ + u64 por; + + if (!system_supports_poe()) + return true; + + por = read_sysreg_s(SYS_POR_EL0); + + if (write) + return por_elx_allows_write(por, pkey); + + if (execute) + return por_elx_allows_exec(por, pkey); + + return por_elx_allows_read(por, pkey); +} + /* * p??_access_permitted() is true for valid user mappings (PTE_USER * bit set, subject to the write permission check). For execute-only @@ -151,7 +170,9 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys) * PTE_VALID bit set. */ #define pte_access_permitted(pte, write) \ - (((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) && (!(write) || pte_write(pte))) + (((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) && \ + (!(write) || pte_write(pte)) && \ + por_el0_allows_pkey(FIELD_GET(PTE_PO_IDX_MASK, pte_val(pte)), write, false)) #define pmd_access_permitted(pmd, write) \ (pte_access_permitted(pmd_pte(pmd), (write))) #define pud_access_permitted(pud, write) \ diff --git a/arch/arm64/include/asm/pkeys.h b/arch/arm64/include/asm/pkeys.h index 5761fb48fd53..a80c654da93d 100644 --- a/arch/arm64/include/asm/pkeys.h +++ b/arch/arm64/include/asm/pkeys.h @@ -10,7 +10,7 @@ #define ARCH_VM_PKEY_FLAGS (VM_PKEY_BIT0 | VM_PKEY_BIT1 | VM_PKEY_BIT2) -#define arch_max_pkey() 0 +#define arch_max_pkey() 7 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val); @@ -22,33 +22,89 @@ static inline bool arch_pkeys_enabled(void) static inline int vma_pkey(struct vm_area_struct *vma) { - return -1; + return (vma->vm_flags & ARCH_VM_PKEY_FLAGS) >> VM_PKEY_SHIFT; } static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma, int prot, int pkey) { - return -1; + if (pkey != -1) + return pkey; + + return vma_pkey(vma); } static inline int execute_only_pkey(struct mm_struct *mm) { + // Execute-only mappings are handled by EPAN/FEAT_PAN3. + WARN_ON_ONCE(!cpus_have_final_cap(ARM64_HAS_EPAN)); + return -1; } +#define mm_pkey_allocation_map(mm) (mm->context.pkey_allocation_map) +#define mm_set_pkey_allocated(mm, pkey) do { \ + mm_pkey_allocation_map(mm) |= (1U << pkey); \ +} while (0) +#define mm_set_pkey_free(mm, pkey) do { \ + mm_pkey_allocation_map(mm) &= ~(1U << pkey); \ +} while (0) + static inline bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey) { - return false; + /* + * "Allocated" pkeys are those that have been returned + * from pkey_alloc() or pkey 0 which is allocated + * implicitly when the mm is created. + */ + if (pkey < 0) + return false; + if (pkey >= arch_max_pkey()) + return false; + + return mm_pkey_allocation_map(mm) & (1U << pkey); } +/* + * Returns a positive, 3-bit key on success, or -1 on failure. + */ static inline int mm_pkey_alloc(struct mm_struct *mm) { - return -1; + /* + * Note: this is the one and only place we make sure + * that the pkey is valid as far as the hardware is + * concerned. The rest of the kernel trusts that + * only good, valid pkeys come out of here. + */ + u8 all_pkeys_mask = ((1U << arch_max_pkey()) - 1); + int ret; + + if (!arch_pkeys_enabled()) + return -1; + + /* + * Are we out of pkeys? We must handle this specially + * because ffz() behavior is undefined if there are no + * zeros. + */ + if (mm_pkey_allocation_map(mm) == all_pkeys_mask) + return -1; + + ret = ffz(mm_pkey_allocation_map(mm)); + + mm_set_pkey_allocated(mm, ret); + + return ret; } static inline int mm_pkey_free(struct mm_struct *mm, int pkey) { - return -EINVAL; + if (!mm_pkey_is_allocated(mm, pkey)) + return -EINVAL; + + mm_set_pkey_free(mm, pkey); + + return 0; } #endif /* _ASM_ARM64_PKEYS_H */ diff --git a/arch/arm64/include/asm/por.h b/arch/arm64/include/asm/por.h new file mode 100644 index 000000000000..90484dae9920 --- /dev/null +++ b/arch/arm64/include/asm/por.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Arm Ltd. +*/ + +#ifndef _ASM_ARM64_POR_H +#define _ASM_ARM64_POR_H + +#define POR_BITS_PER_PKEY 4 +#define POR_ELx_IDX(por_elx, idx) (((por_elx) >> (idx * POR_BITS_PER_PKEY)) & 0xf) + +static inline bool por_elx_allows_read(u64 por, u8 pkey) +{ + u8 perm = POR_ELx_IDX(por, pkey); + + return perm & POE_R; +} + +static inline bool por_elx_allows_write(u64 por, u8 pkey) +{ + u8 perm = POR_ELx_IDX(por, pkey); + + return perm & POE_W; +} + +static inline bool por_elx_allows_exec(u64 por, u8 pkey) +{ + u8 perm = POR_ELx_IDX(por, pkey); + + return perm & POE_X; +} + +#endif /* _ASM_ARM64_POR_H */ diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 11765791b880..eccf5a95ff30 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -1491,6 +1492,38 @@ void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte #ifdef CONFIG_ARCH_HAS_PKEYS int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val) { - return -ENOSPC; + u64 new_por = POE_RXW; + u64 old_por; + u64 pkey_shift; + + if (!arch_pkeys_enabled()) + return -ENOSPC; + + /* + * This code should only be called with valid 'pkey' + * values originating from in-kernel users. Complain + * if a bad value is observed. + */ + if (WARN_ON_ONCE(pkey >= arch_max_pkey())) + return -EINVAL; + + /* Set the bits we need in POR: */ + if (init_val & PKEY_DISABLE_ACCESS) + new_por = POE_X; + else if (init_val & PKEY_DISABLE_WRITE) + new_por = POE_RX; + + /* Shift the bits in to the correct place in POR for pkey: */ + pkey_shift = pkey * POR_BITS_PER_PKEY; + new_por <<= pkey_shift; + + /* Get old POR and mask off any old bits in place: */ + old_por = read_sysreg_s(SYS_POR_EL0); + old_por &= ~(POE_MASK << pkey_shift); + + /* Write old part along with new part: */ + write_sysreg_s(old_por | new_por, SYS_POR_EL0); + + return 0; } #endif From patchwork Fri Oct 27 18:08:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29092C25B70 for ; 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imf23.hostedemail.com; dkim=none; spf=pass (imf23.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com; dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 795911424; Fri, 27 Oct 2023 11:10:22 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ABCE63F64C; Fri, 27 Oct 2023 11:09:38 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 15/24] arm64: add POE signal support Date: Fri, 27 Oct 2023 19:08:41 +0100 Message-Id: <20231027180850.1068089-16-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 8F9CD140015 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: k7dqhyn1my16r8k4fyzmcoombpp4gmsm X-HE-Tag: 1698430181-743628 X-HE-Meta: U2FsdGVkX18Gxy0AZO1f+oouA5jlgINGCpaEIC3oJdOPRytgRhaXhUFTij3+onu7R8Ba/A+P5ZVCQObb6kBPR2lCih5vQ0QUf9bpeuofU5bB/GRiTIdaOEapxevxCdNWOo5UD9zMSlRjTFHS8v62jdAaL09pEtKZwPwElafEDvDF67EoL3++9kHdi6AjmpVkxPoFsFiegOmtfJZV+kQkK0FiNAYEbus7EewLoxw/rbMLEFp2IOV46HfnGWY2Z9JzyKFogmnfeRt+yJkfcBtmC/2pB6bR76MoQPleDisEAufRWt3dFuQUw24Hzcz/Tj+HGkgHYwYrLoBTdu7DkeLDARa4LaJ6c+kxi6hqEBe8+G9DmV6gqDjcEL2p70rJyllmgxaPHUgAkVQIr7XM4O0gRTgjcKuUka8AuzMjKQVTiHrvpoGNGUBpgZKZQAcPWCBDfL6Uat2SKgx2qQ8XTAUaan70pfTRR8VyAZfRrahMxgr2thp3ArXGc9CYuyJScsvZl3KraRcf1l5tOvkeMDvnZ/L15JR/c6WBkbWL0zXnO3i4l5sNBpL6ipqUDPFgEkQJLLhM+e0B4MpQdyQH5S2G2fh3iFm+F2CxXG+8tIL7a9KcSH/NUIz1K4qt9uYhJKSbVmtcS0zwIUDjj4XEhu0VjxBc23z2tcdy6NquHv2e+OEMAGeMlBZnkUqu7dAMumNhFGUCdQ9loF32OsvchhCd4omEss9z56nLnuB5bBEoNczcv9R5E6r83rvR+rsk1HD9bHfLXTMjLoVGzwVCHm39JSkf3d4mZmkt08aGGt2iNCmHeZVEUw4I9xVlq3xads8NHd/vmivIzlZeW4yOS1Qnb0f/Cz6o/wqu2aEsBICn2MUf2ziUkICoZbBAenKBjJPdHiR79XATUcuQxnZNKtrd/pzOhx8OVCd5dpdjj+11JfMOUmRNSvAdTO+s45jLdMHLrOWqve1QRWBt/EArTof LpWQTrq+ iozqJUhSqkh0M0Sv3hXXSY4fZE9ui+VYgpWCq1aY7xyvdnTO3Yy2jKP1hRNgWj/lu5XL2DXa6gJhy3IjZcZgdLa2bXODGWpXORZtkCFVyp25bwHOePtU4queTslcQxyFdsJjP3ca0YzQoOrBnP1IOuXJSMlvA+XS0npZDKey8JNX4PbZmx3Oa5yineGbZWv6+f9DRfNQskwOlBTN01OUDLibN8A== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add PKEY support to signals, by saving and restoring POR_EL0 from the stackframe. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown --- arch/arm64/include/uapi/asm/sigcontext.h | 7 ++++ arch/arm64/kernel/signal.c | 51 ++++++++++++++++++++++++ 2 files changed, 58 insertions(+) diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h index f23c1dc3f002..cef85eeaf541 100644 --- a/arch/arm64/include/uapi/asm/sigcontext.h +++ b/arch/arm64/include/uapi/asm/sigcontext.h @@ -98,6 +98,13 @@ struct esr_context { __u64 esr; }; +#define POE_MAGIC 0x504f4530 + +struct poe_context { + struct _aarch64_ctx head; + __u64 por_el0; +}; + /* * extra_context: describes extra space in the signal frame for * additional structures that don't fit in sigcontext.__reserved[]. diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 0e8beb3349ea..379f364005bf 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -62,6 +62,7 @@ struct rt_sigframe_user_layout { unsigned long zt_offset; unsigned long extra_offset; unsigned long end_offset; + unsigned long poe_offset; }; #define BASE_SIGFRAME_SIZE round_up(sizeof(struct rt_sigframe), 16) @@ -182,6 +183,8 @@ struct user_ctxs { u32 za_size; struct zt_context __user *zt; u32 zt_size; + struct poe_context __user *poe; + u32 poe_size; }; static int preserve_fpsimd_context(struct fpsimd_context __user *ctx) @@ -227,6 +230,20 @@ static int restore_fpsimd_context(struct user_ctxs *user) return err ? -EFAULT : 0; } +static int restore_poe_context(struct user_ctxs *user) +{ + u64 por_el0; + int err = 0; + + if (user->poe_size != sizeof(*user->poe)) + return -EINVAL; + + __get_user_error(por_el0, &(user->poe->por_el0), err); + if (!err) + write_sysreg_s(por_el0, SYS_POR_EL0); + + return err; +} #ifdef CONFIG_ARM64_SVE @@ -590,6 +607,7 @@ static int parse_user_sigframe(struct user_ctxs *user, user->tpidr2 = NULL; user->za = NULL; user->zt = NULL; + user->poe = NULL; if (!IS_ALIGNED((unsigned long)base, 16)) goto invalid; @@ -640,6 +658,17 @@ static int parse_user_sigframe(struct user_ctxs *user, /* ignore */ break; + case POE_MAGIC: + if (!system_supports_poe()) + goto invalid; + + if (user->poe) + goto invalid; + + user->poe = (struct poe_context __user *)head; + user->poe_size = size; + break; + case SVE_MAGIC: if (!system_supports_sve() && !system_supports_sme()) goto invalid; @@ -812,6 +841,9 @@ static int restore_sigframe(struct pt_regs *regs, if (err == 0 && system_supports_sme2() && user.zt) err = restore_zt_context(&user); + if (err == 0 && system_supports_poe() && user.poe) + err = restore_poe_context(&user); + return err; } @@ -928,6 +960,13 @@ static int setup_sigframe_layout(struct rt_sigframe_user_layout *user, } } + if (system_supports_poe()) { + err = sigframe_alloc(user, &user->poe_offset, + sizeof(struct poe_context)); + if (err) + return err; + } + return sigframe_alloc_end(user); } @@ -968,6 +1007,15 @@ static int setup_sigframe(struct rt_sigframe_user_layout *user, __put_user_error(current->thread.fault_code, &esr_ctx->esr, err); } + if (system_supports_poe() && err == 0 && user->poe_offset) { + struct poe_context __user *poe_ctx = + apply_user_offset(user, user->poe_offset); + + __put_user_error(POE_MAGIC, &poe_ctx->head.magic, err); + __put_user_error(sizeof(*poe_ctx), &poe_ctx->head.size, err); + __put_user_error(read_sysreg_s(SYS_POR_EL0), &poe_ctx->por_el0, err); + } + /* Scalable Vector Extension state (including streaming), if present */ if ((system_supports_sve() || system_supports_sme()) && err == 0 && user->sve_offset) { @@ -1119,6 +1167,9 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka, sme_smstop(); } + if (system_supports_poe()) + write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); + if (ka->sa.sa_flags & SA_RESTORER) sigtramp = ka->sa.sa_restorer; else From patchwork Fri Oct 27 18:08:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65177C25B47 for ; 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s=arc-20220608; d=hostedemail.com; t=1698430184; a=rsa-sha256; cv=none; b=LQXApsLEfh2csvPp56I6qSL7Ozc90hs/7/EcbUGpBC25ykPf11jEPwLUQsW+QdtDIn7Pe3 51dFz0HUsaFK1uhtx/wteD97Rv3ErSZvw7s4Q9rBOVJt+5vlnuFM9/ZmHLApvNa75iFG1z /Lr+EDsXEDbLgEYwuYN4RFA58SRojWo= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E220F153B; Fri, 27 Oct 2023 11:10:24 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2050F3F64C; Fri, 27 Oct 2023 11:09:41 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 16/24] arm64: enable PKEY support for CPUs with S1POE Date: Fri, 27 Oct 2023 19:08:42 +0100 Message-Id: <20231027180850.1068089-17-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: E656740006 X-Stat-Signature: m7q6utc6hriyqwez9di3ofqbf5abd1mc X-HE-Tag: 1698430183-573592 X-HE-Meta: U2FsdGVkX1+PVVr1Lznz/jzAp/0PP2pqaKhIh8+dmBIu/ZhpUJj+jGhGsH/Lfpag3BmtHG+uVLm6bqBzgnpcRrtZSGGIp7Oq16ighue/Ye+yAK+B1g17SEThfdUsyyfHGzM70HUdOZfGGMEuoHruXbxHtUS1M/u4Q/IfiO0oMUV13C5+ppI83OjPrCx+FlUB7gO3nGRHnoE2hbrr459zeIu0WXpG9iG6Rjkkxs3140fXCHiyZ8+PBIWZ90KL9QM6SdVX3LpJuFH081OEsmwEp1VelH+FRMXW45DVFCE36oCCfX2Z3FlJCghKPk7/LHv5YU+g8I1vUtv1N/9Y2hQU8m1SmYIdNChoefzezzrHCE3xXCi7q82IhaazDZwfPG7v0Z7WIyYa2o/7IxvCvQbBzf68EfiMT2eUtAx7Df+8yDj+TZ1u89KgcQhRud6A1ZAN6tG7WhdgHZJe/P03UBUF1I3BpquE+Q71Kip7wnEFzgbtxZ6OeGraqqSzVea6cS0GqBJgNCVGz8zgctiPyvw/lfDpm3TR2eWUy9vAxeIwn+B0ka4q4tMxJcbPtjUZPRnii0RgYg7hGr38cZIApOQVBjF5ssq+bys4z46A5I8LlYYdxqkgc9Sg6eHYoiaU8RCLJvw2fAjz+B5AhoKBytCrWdj3aGaJ3UeDZ3nNIk4QIbRQVdkckXksSeiH3fLoZakROYatxzuwGduAwADZnySZgpX5hkUG6cnY+FUrtdn4ZAsskwwy60Vj+la66tlo/6Mf8lNMDDM7CPmN7d2nrEUWG34vvfhUQLKU7q1yghJWWFvijrv3z6T3nYxuRxIW6VUpQ54J8P/bVbEt6op/g1yFN+hhDOOD0yG2U/uPwcSMzPM6PsgJheqPduUUbOuClJe0/bglBVcecpYNXS3oAf4s9Tebk+fFPh25+kL8RbWEnrbuoeObAOhPO1xmOBQVi8pPXCLUTlXvI97BbVfcWyc KrAzNIZS V9sVLSZh1nHRQrOWxHfstqKnIg/W6WBXOPWICbZ7zbeuKORF1gDo47nQoUeKwzootCi6bDE30jY9UNXjlq2rrd9ncuI1B6cFtaQU5Ymjy6Jd7ueXHQs7MKl1aRvt+XqhOvhaIyS40ZC5ezPKEUYUEIVy3jrA2v4fPcrohmXInWnsO+DrdJJUtMwHDgNdSsCoA3VxjSXnH2lxSllwBFxc5svia8w== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Now that PKEYs support has been implemented, enable it for CPUs that support S1POE. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/pkeys.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pkeys.h b/arch/arm64/include/asm/pkeys.h index a80c654da93d..23c473300058 100644 --- a/arch/arm64/include/asm/pkeys.h +++ b/arch/arm64/include/asm/pkeys.h @@ -17,7 +17,7 @@ int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, static inline bool arch_pkeys_enabled(void) { - return false; + return system_supports_poe(); } static inline int vma_pkey(struct vm_area_struct *vma) From patchwork Fri Oct 27 18:08:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDCDFC25B72 for ; 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imf13.hostedemail.com; dkim=none; spf=pass (imf13.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com; dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 570A0143D; Fri, 27 Oct 2023 11:10:27 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 88EF03F64C; Fri, 27 Oct 2023 11:09:43 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 17/24] arm64: enable POE and PIE to coexist Date: Fri, 27 Oct 2023 19:08:43 +0100 Message-Id: <20231027180850.1068089-18-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 7A4102001F X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: s1anf8wiodmb8o9fyzzn3dshzem4pwdo X-HE-Tag: 1698430186-171295 X-HE-Meta: U2FsdGVkX19EDaZXynRtx6GtkP5ZcPz0Ze4Y+r7qAIIZI7nmFN8XDWmvnvoLBG4GwaCXUqu57AME3O3sfyn5J5bXfUft40WhSCOyl9d2JFXSsDduNqhKuuPg1pPJ+LYB+VCEPsbVK2kHxwJVyBxWyRzA0TQi/EiUZlj4mK7jbgsv0Hn52xJ0JnBaY+cbmXmzYip1RFg/IZgSc7xbglL511jFliJQNumIRtKGKN+I+AEtp/r7OvHHhy5bH/u9iOBD9/TuYbCfvVt097E77pzlPwy9wrDoZWWbeQA+YhjFgZUGvgDQEyB+crk2d5e9G1YUHLi/u9XOkB1T6KRLZXGI+xapwoj2d4disXwF3STDo7IVDghkPp6MkBAo/u+coXGEZLOw/IQxTM3PNiAAAigQom3UVe/87q0Uka7dKQ5zbUV6aVZXWNf2sn4CS8Ry1F3PgTDcl1zkBmnJczZ0BrH75nPXo22rkSMRNWdeOfkhAtDFqsoayoWTGg3eYX1kJ26iIce/tYWEoXLSyW0N1ulpwgXr3N4kKHv6VJyu/4MCIy3fbLEMTNJvQ4c0xHkPxPMGsKmqIsVoK+wglqg+yZvnqsysIO4szPoJTiiS/fZ4AIoBBAGytyfncGUOew3crFIv9Fycysbc/9481z+isfMODJEB3F+Dkb+0q6j+uUweisJVjnVb5TT84tO4Ngaz6AyCbzTPqWmfuPWlYTNVpChw7RbIRrYPSpGbnG6Fl/PFGpHYz92zw/w+Alj5DU1QFiwuOgAFeYKMh8cLKZN0BXsh/9FUi9C5STva6kHRkCfqbYTkJI1Se/KP6HnUyH1I19LTL+JI7QXI8Tvs3oFvtAkgj9ErlLFqr14h5paovMWxchqUHghpFH+8UPiLfW4dkMDwQVnls48kNlr3J+PjfYW7s8JP5Xnsn1v8uB4/D63wIEhXmotDj6NC9/8irWythyoS0DuFtv+fDaSJlEsLQfv jTJn8ceU Ek0ZmKrwQDw0ozfKcmQ7FdPDFqKqp/7AaacjXOqkSFKrHBOsTqrAmaNBl7Ao5iVOV55a4KYNh0H0hcN/bbV9DTS6jScjN3KFCFKosRqR6Hgdz3BCDJhFmjGWn+ytTceQTLfbLDg+HC6tE0xyuhTd7k2t4n4kZ/YTp66c76Kp2XrwqS0QpHIP5JdgWgmLyV0OkkoYPZBNaH1mASHJSQrym8GKg/r6KoWuFwcFe X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Set the EL0/userspace indirection encodings to be the overlay enabled variants of the permissions. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/pgtable-prot.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h index eed814b00a38..06fb944ef252 100644 --- a/arch/arm64/include/asm/pgtable-prot.h +++ b/arch/arm64/include/asm/pgtable-prot.h @@ -141,10 +141,10 @@ extern bool arm64_use_ng_mappings; #define PIE_E0 ( \ PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW)) + PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O) | \ + PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX_O) | \ + PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R_O) | \ + PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW_O)) #define PIE_E1 ( \ PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \ From patchwork Fri Oct 27 18:08:44 2023 Content-Type: text/plain; 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Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Andrew Morton Cc: Shuah Khan Cc: Dave Hansen Cc: Aneesh Kumar K.V --- .../arm64/signal/testcases/testcases.c | 23 ----------------- .../arm64/signal/testcases/testcases.h | 25 +++++++++++++++++-- 2 files changed, 23 insertions(+), 25 deletions(-) diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.c b/tools/testing/selftests/arm64/signal/testcases/testcases.c index 9f580b55b388..fe950b6bca6b 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.c +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.c @@ -6,29 +6,6 @@ #include "testcases.h" -struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic, - size_t resv_sz, size_t *offset) -{ - size_t offs = 0; - struct _aarch64_ctx *found = NULL; - - if (!head || resv_sz < HDR_SZ) - return found; - - while (offs <= resv_sz - HDR_SZ && - head->magic != magic && head->magic) { - offs += head->size; - head = GET_RESV_NEXT_HEAD(head); - } - if (head->magic == magic) { - found = head; - if (offset) - *offset = offs; - } - - return found; -} - bool validate_extra_context(struct extra_context *extra, char **err, void **extra_data, size_t *extra_size) { diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.h b/tools/testing/selftests/arm64/signal/testcases/testcases.h index a08ab0d6207a..d33154c9a4bd 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.h +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.h @@ -87,8 +87,29 @@ struct fake_sigframe { bool validate_reserved(ucontext_t *uc, size_t resv_sz, char **err); -struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic, - size_t resv_sz, size_t *offset); +static inline struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic, + size_t resv_sz, size_t *offset) +{ + size_t offs = 0; + struct _aarch64_ctx *found = NULL; + + if (!head || resv_sz < HDR_SZ) + return found; + + while (offs <= resv_sz - HDR_SZ && + head->magic != magic && head->magic) { + offs += head->size; + head = GET_RESV_NEXT_HEAD(head); + } + if (head->magic == magic) { + found = head; + if (offset) + *offset = offs; + } + + return found; +} + static inline struct _aarch64_ctx *get_terminator(struct _aarch64_ctx *head, size_t resv_sz, From patchwork Fri Oct 27 18:08:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438790 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 496EDC25B47 for ; Fri, 27 Oct 2023 18:09:54 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 4653C6B03E8; Fri, 27 Oct 2023 14:09:53 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 414CE6B03E9; Fri, 27 Oct 2023 14:09:53 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 28E2B6B03EA; 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Fri, 27 Oct 2023 11:09:48 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 19/24] selftests: mm: move fpregs printing Date: Fri, 27 Oct 2023 19:08:45 +0100 Message-Id: <20231027180850.1068089-20-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 2C20EC0007 X-Rspam-User: X-Stat-Signature: kwqyg7chtobahggefjiejeses11iizho X-Rspamd-Server: rspam03 X-HE-Tag: 1698430191-623552 X-HE-Meta: U2FsdGVkX1+XmKaPTbNXwdzrtuhlXY8s9yF67DKqROphPEKsevKzJLs0WlZwREWsETU66kClYe5xokm87RA2Vkn5QkglCEyzj/Wi0pambtdde1ooQ9pquGpDqFh7m0Kn6Wp/R/Lij3azariZ+h4E6elkOiiKfaFzd1sxz0z4s/WpNRK4wD5dYEHa9cG3J9NQEqdV8wqfRxzGTSOLG8qqpyl1KWBUqT94IbrTjHjtbQX1isp5Sz5qzst1tjjZL/xw1YNR0tK3ptaMJyo2W4qLFJ/2HJjA+NhYG6n0tyeZzablP88DXfaMR1M31Hies+H/Yxxaa3APmaEmyZiGUmVkhaKOaAISDiO2VNCuqf0b/mpeSjQSGYPBgw52LNHtpRP20nd4yhaHE6KdtK+FIdr3IyudlyceD2TZ4hMREyhi6KGb5mqqujEs7BU5bT4A5sDh19Pb6koG2wwDekcqAI+UN7D05LAXvjkau+0K/XaesLoop6IvJVC5OKknn74T/9jvvhHKB6Cj9F93pXohb1GnYvM0z/7CbffMN1rx/XlUJzNuLLwubDN7lvrVzOfZ1LdfYERIyaaANEPd+JjBWQHtumoVTrBOmsaJ1fzsabNabT1fRT3WLfxJaI5kms42zVsVyHyt2I8e3RrpQ5Yx/8xLZVyNPZd0ugi/OkPjGJTzUOF0QRdwdrsJNde356g0HvQaEm094xmKr1NeVr4mbVdB5mcczz3JYq6QyBwzh2pWPBxGHSn5H+enD8l7NQvhmuJvSAA0C2vXH8C87cjnbeIFNOxMbjdK6V7SseO5UiQ7X6kTCiTwswEBC7u7TKPd9VgyiNLwjrOkA5abOb+LY9mHtGkGpnpMbn5V7dmXKVhjGSEl0JwRtjIS46w7f9xs19AupFTdrAKWlsbQAvAUQWza/OT+1e5tY+PJeK3WqorZzKpU0gTkuwfTGojzAjxeb7XXY3HILoVp1qs/kPA1ioo qp9EoUbk ueIOqYPvvPaWxF8fRs6g3G/6SOVHUl+bO8XOWfOwWikQgjKWF4X9VamxPOLt66auKKxsy8Kz3llWSca3VpfS4HvmmTxLK+VzirtLnxmogQhS/3SRc8vggk+ojZHFvY6IhlEhmhQdf3539hLyXdtcNAQq8z6et3dW07NpScRM8b9Sb9DkgOyzrk6RgjptIdrRxXskf24QbmNz7k3imn4mLMmTPf4HRl1+X6q8+w/lmFicUP/2zHqiq76odVqb1BL/ad4pGK3Zn+W2o0eZazZUmqRbxJtaYhoQHLvs791fVCBwBXnVnSW5E6AjZxGVBUHVcH7Cp X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: arm64's fpregs are not at a constant offset from sigcontext. Since this is not an important part of the test, don't print the fpregs pointer on arm64. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Andrew Morton Cc: Shuah Khan Cc: Dave Hansen Cc: Aneesh Kumar K.V Acked-by: Dave Hansen --- tools/testing/selftests/mm/pkey-powerpc.h | 1 + tools/testing/selftests/mm/pkey-x86.h | 2 ++ tools/testing/selftests/mm/protection_keys.c | 6 ++++++ 3 files changed, 9 insertions(+) diff --git a/tools/testing/selftests/mm/pkey-powerpc.h b/tools/testing/selftests/mm/pkey-powerpc.h index ae5df26104e5..6275d0f474b3 100644 --- a/tools/testing/selftests/mm/pkey-powerpc.h +++ b/tools/testing/selftests/mm/pkey-powerpc.h @@ -9,6 +9,7 @@ #endif #define REG_IP_IDX PT_NIP #define REG_TRAPNO PT_TRAP +#define MCONTEXT_FPREGS #define gregs gp_regs #define fpregs fp_regs #define si_pkey_offset 0x20 diff --git a/tools/testing/selftests/mm/pkey-x86.h b/tools/testing/selftests/mm/pkey-x86.h index 814758e109c0..b9170a26bfcb 100644 --- a/tools/testing/selftests/mm/pkey-x86.h +++ b/tools/testing/selftests/mm/pkey-x86.h @@ -15,6 +15,8 @@ #endif +#define MCONTEXT_FPREGS + #ifndef PKEY_DISABLE_ACCESS # define PKEY_DISABLE_ACCESS 0x1 #endif diff --git a/tools/testing/selftests/mm/protection_keys.c b/tools/testing/selftests/mm/protection_keys.c index 48dc151f8fca..b3dbd76ea27c 100644 --- a/tools/testing/selftests/mm/protection_keys.c +++ b/tools/testing/selftests/mm/protection_keys.c @@ -314,7 +314,9 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) ucontext_t *uctxt = vucontext; int trapno; unsigned long ip; +#ifdef MCONTEXT_FPREGS char *fpregs; +#endif #if defined(__i386__) || defined(__x86_64__) /* arch */ u32 *pkey_reg_ptr; int pkey_reg_offset; @@ -330,7 +332,9 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) trapno = uctxt->uc_mcontext.gregs[REG_TRAPNO]; ip = uctxt->uc_mcontext.gregs[REG_IP_IDX]; +#ifdef MCONTEXT_FPREGS fpregs = (char *) uctxt->uc_mcontext.fpregs; +#endif dprintf2("%s() trapno: %d ip: 0x%016lx info->si_code: %s/%d\n", __func__, trapno, ip, si_code_str(si->si_code), @@ -359,7 +363,9 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) #endif /* arch */ dprintf1("siginfo: %p\n", si); +#ifdef MCONTEXT_FPREGS dprintf1(" fpregs: %p\n", fpregs); +#endif if ((si->si_code == SEGV_MAPERR) || (si->si_code == SEGV_ACCERR) || From patchwork Fri Oct 27 18:08:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id F331EC25B48 for ; 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s=arc-20220608; d=hostedemail.com; t=1698430193; a=rsa-sha256; cv=none; b=6VrMnGiGUYK6RRvmMkrvD1gIAVxWkhA2Mtb1z5GEF7vBBZj4cWyL/2iXgQh181EC+5o9LK 6jzNlYgsql7lwTQ64OjfZm16bFN6+A3PKgqHuoZQsDgKVZohHnR1yueeUKBGx3cIABPGl5 aUR/MBtAech1XyQXu/jzeX9ReLn+mRg= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A07031424; Fri, 27 Oct 2023 11:10:34 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D274B3F64C; Fri, 27 Oct 2023 11:09:50 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 20/24] selftests: mm: make protection_keys test work on arm64 Date: Fri, 27 Oct 2023 19:08:46 +0100 Message-Id: <20231027180850.1068089-21-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: A204540021 X-Stat-Signature: mmuo47u5j4egzamh7r58se6399p1qhyc X-HE-Tag: 1698430193-788216 X-HE-Meta: U2FsdGVkX1/NZpbM6CKCqxj02Z4sfTS7mvmUjntJFJ/a/5NMXT12kJuZps/QB92IKVZCSoYeKWFR+NTBc4VOHveJAV/1eDXdZ+hQRwjEohAbMJ7iYl7GoAnZNjCzaXvZB1cKiz/dg27bnny/3WDah7Tr3wFUPOVQ/eI9ENtGMNaBP5fRrYG6jGj6fXxC5CJNjcEg5g0Qpg6se+yikY/OnX1YF+JStirVJR0N+tyi8gHwdg3s7OddiNCylIjDGXswZpkd48qCRVnbJMNtkwSFvYONWoa8QH43Pn/jX21SC+XG/0GP/GdRz+cBQBAtkPuMSjrFBP4ULHGLQbC1YZQq3aeB0lnWXjPWXius681oY+N/iIWyR+P1QhprZJjH/U9AqwhQNwNMAHjq3EysWlFHw6J1Ol/d8oamUn7P8xbq0F1vy5qe2y/fKym3OfXmNlEXmETPEU1R6k1YiEq2hVfgAjiDDKD8/0ZyUgUXINxkZFKWXmdItpgSrdoineODlrY5SD6djPiKYGhXLtz3E/YkKRcYMNKtK1ePka7wseVUxt7n61VblLhz87sZD2RhSG+BgUoXlbULpIwtcZZDm0ygkCd01ve9VFbLBUNxoYTT1/z+RQMFJmBBA6QnEtyDQyGMWE1Fodj17o/x9Xke/C2xr+SbjlnKAarhKhb/OxojRsDkvCOBgPiAYElFBj4NUUJ4oN4lXPKvGlGFQUOQwXKng21/fHd5UgIyiFFTg6w+HLq/TBhpC6LcN92KR2PLgf4HR7YMJeHvoOxzRiSGuzlEav/aPTy3vfO7idrNj57Pu0jvkMYE/vzfAq3irPmKoAPqBgFoNwh59bUb1inIsT8T68BqOj7+aiXkY+3qy7QwywztytHAU+TTjEUAqijETp7FByxEl2TQCZb6Z5/sxlnGjYH+EKejr/4GJK5vWvZkS2W3zwEYYIRjlxUiY+sXZgFrcF6eDcr5KEgmz9xtZwv 2xJuBlEj jvJTSbPRZd517f+6ypR++wc0T9BjzF1H6R0JTcUfZg+UxvWRAtblIrcXUSQcYFMI5OIVZdyCX+AqwEg7yt/vyC3Lo/G/plKncu2GXPUnHNb896+s7a8FEQ3lRaOPx0xuxWzy1R5AIyDJcJKq03ODwQEr+fzHVBIIEw1gMEhhN02CDar5T/6LyHdqGymNXRfoQBFDlTiL8Di8mGtNpTmCaBBfC3OUoxrwEsWS0p8YUKjH2KH/8a64k1T6tTw7MI4/2jMpXEyvAMdpLMd0EDmXbs2y4wxcYk3ZKiuLubC3H/9OlJqkiC9yddBO0jRZEZhi652sZ20KJauZtbZUc3TMdR3Dv8asrnRPmHMFeSqKQwqY1WfXHNaFcPvBYSA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The encoding of the pkey register differs on arm64, than on x86/ppc. On those platforms, a bit in the register is used to disable permissions, for arm64, a bit enabled in the register indicates that the permission is allowed. This drops two asserts of the form: assert(read_pkey_reg() <= orig_pkey_reg); Because on arm64 this doesn't hold, due to the encoding. The pkey must be reset to both access allow and write allow in the signal handler. pkey_access_allow() works currently for PowerPC as the PKEY_DISABLE_ACCESS and PKEY_DISABLE_WRITE have overlapping bits set. Access to the uc_mcontext is abstracted, as arm64 has a different structure. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Andrew Morton Cc: Shuah Khan Cc: Dave Hansen Cc: Aneesh Kumar K.V Acked-by: Dave Hansen --- .../arm64/signal/testcases/testcases.h | 3 + tools/testing/selftests/mm/Makefile | 2 +- tools/testing/selftests/mm/pkey-arm64.h | 138 ++++++++++++++++++ tools/testing/selftests/mm/pkey-helpers.h | 8 + tools/testing/selftests/mm/pkey-powerpc.h | 2 + tools/testing/selftests/mm/pkey-x86.h | 2 + tools/testing/selftests/mm/protection_keys.c | 23 +-- 7 files changed, 167 insertions(+), 11 deletions(-) create mode 100644 tools/testing/selftests/mm/pkey-arm64.h diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.h b/tools/testing/selftests/arm64/signal/testcases/testcases.h index d33154c9a4bd..e445027d5ec2 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.h +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.h @@ -25,6 +25,9 @@ #define HDR_SZ \ sizeof(struct _aarch64_ctx) +#define GET_UC_RESV_HEAD(uc) \ + (struct _aarch64_ctx *)(&(uc->uc_mcontext.__reserved)) + #define GET_SF_RESV_HEAD(sf) \ (struct _aarch64_ctx *)(&(sf).uc.uc_mcontext.__reserved) diff --git a/tools/testing/selftests/mm/Makefile b/tools/testing/selftests/mm/Makefile index 6a9fc5693145..f50987233f55 100644 --- a/tools/testing/selftests/mm/Makefile +++ b/tools/testing/selftests/mm/Makefile @@ -95,7 +95,7 @@ TEST_GEN_FILES += $(BINARIES_64) endif else -ifneq (,$(findstring $(ARCH),ppc64)) +ifneq (,$(filter $(ARCH),arm64 ppc64)) TEST_GEN_FILES += protection_keys endif diff --git a/tools/testing/selftests/mm/pkey-arm64.h b/tools/testing/selftests/mm/pkey-arm64.h new file mode 100644 index 000000000000..3a5d8ba69bb7 --- /dev/null +++ b/tools/testing/selftests/mm/pkey-arm64.h @@ -0,0 +1,138 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Arm Ltd. +*/ + +#ifndef _PKEYS_ARM64_H +#define _PKEYS_ARM64_H + +#include "vm_util.h" +/* for signal frame parsing */ +#include "../arm64/signal/testcases/testcases.h" + +#ifndef SYS_mprotect_key +# define SYS_mprotect_key 288 +#endif +#ifndef SYS_pkey_alloc +# define SYS_pkey_alloc 289 +# define SYS_pkey_free 290 +#endif +#define MCONTEXT_IP(mc) mc.pc +#define MCONTEXT_TRAPNO(mc) -1 + +#define PKEY_MASK 0xf + +#define POE_X 0x2 +#define POE_RX 0x3 +#define POE_RWX 0x7 + +#define NR_PKEYS 7 +#define NR_RESERVED_PKEYS 1 /* pkey-0 */ + +#define PKEY_ALLOW_ALL 0x77777777 + +#define PKEY_BITS_PER_PKEY 4 +#define PAGE_SIZE sysconf(_SC_PAGESIZE) +#undef HPAGE_SIZE +#define HPAGE_SIZE default_huge_page_size() + +/* 4-byte instructions * 16384 = 64K page */ +#define __page_o_noops() asm(".rept 16384 ; nop; .endr") + +static inline u64 __read_pkey_reg(void) +{ + u64 pkey_reg = 0; + + // POR_EL0 + asm volatile("mrs %0, S3_3_c10_c2_4" : "=r" (pkey_reg)); + + return pkey_reg; +} + +static inline void __write_pkey_reg(u64 pkey_reg) +{ + u64 por = pkey_reg; + + dprintf4("%s() changing %016llx to %016llx\n", + __func__, __read_pkey_reg(), pkey_reg); + + // POR_EL0 + asm volatile("msr S3_3_c10_c2_4, %0\nisb" :: "r" (por) :); + + dprintf4("%s() pkey register after changing %016llx to %016llx\n", + __func__, __read_pkey_reg(), pkey_reg); +} + +static inline int cpu_has_pkeys(void) +{ + /* No simple way to determine this */ + return 1; +} + +static inline u32 pkey_bit_position(int pkey) +{ + return pkey * PKEY_BITS_PER_PKEY; +} + +static inline int get_arch_reserved_keys(void) +{ + return NR_RESERVED_PKEYS; +} + +void expect_fault_on_read_execonly_key(void *p1, int pkey) +{ +} + +void *malloc_pkey_with_mprotect_subpage(long size, int prot, u16 pkey) +{ + return PTR_ERR_ENOTSUP; +} + +#define set_pkey_bits set_pkey_bits +static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags) +{ + u32 shift = pkey_bit_position(pkey); + u64 new_val = POE_RWX; + + /* mask out bits from pkey in old value */ + reg &= ~((u64)PKEY_MASK << shift); + + if (flags & PKEY_DISABLE_ACCESS) + new_val = POE_X; + else if (flags & PKEY_DISABLE_WRITE) + new_val = POE_RX; + + /* OR in new bits for pkey */ + reg |= new_val << shift; + + return reg; +} + +#define get_pkey_bits get_pkey_bits +static inline u64 get_pkey_bits(u64 reg, int pkey) +{ + u32 shift = pkey_bit_position(pkey); + /* + * shift down the relevant bits to the lowest two, then + * mask off all the other higher bits + */ + u32 perm = (reg >> shift) & PKEY_MASK; + + if (perm == POE_X) + return PKEY_DISABLE_ACCESS; + if (perm == POE_RX) + return PKEY_DISABLE_WRITE; + return 0; +} + +static void aarch64_write_signal_pkey(ucontext_t *uctxt, u64 pkey) +{ + struct _aarch64_ctx *ctx = GET_UC_RESV_HEAD(uctxt); + struct poe_context *poe_ctx = + (struct poe_context *) get_header(ctx, POE_MAGIC, + sizeof(uctxt->uc_mcontext), NULL); + if (poe_ctx) + poe_ctx->por_el0 = pkey; +} + +#endif /* _PKEYS_ARM64_H */ diff --git a/tools/testing/selftests/mm/pkey-helpers.h b/tools/testing/selftests/mm/pkey-helpers.h index 92f3be3dd8e5..07d131f98043 100644 --- a/tools/testing/selftests/mm/pkey-helpers.h +++ b/tools/testing/selftests/mm/pkey-helpers.h @@ -91,12 +91,17 @@ void record_pkey_malloc(void *ptr, long size, int prot); #include "pkey-x86.h" #elif defined(__powerpc64__) /* arch */ #include "pkey-powerpc.h" +#elif defined(__aarch64__) /* arch */ +#include "pkey-arm64.h" #else /* arch */ #error Architecture not supported #endif /* arch */ +#ifndef PKEY_MASK #define PKEY_MASK (PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE) +#endif +#ifndef set_pkey_bits static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags) { u32 shift = pkey_bit_position(pkey); @@ -106,7 +111,9 @@ static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags) reg |= (flags & PKEY_MASK) << shift; return reg; } +#endif +#ifndef get_pkey_bits static inline u64 get_pkey_bits(u64 reg, int pkey) { u32 shift = pkey_bit_position(pkey); @@ -116,6 +123,7 @@ static inline u64 get_pkey_bits(u64 reg, int pkey) */ return ((reg >> shift) & PKEY_MASK); } +#endif extern u64 shadow_pkey_reg; diff --git a/tools/testing/selftests/mm/pkey-powerpc.h b/tools/testing/selftests/mm/pkey-powerpc.h index 6275d0f474b3..3d0c0bdae5bc 100644 --- a/tools/testing/selftests/mm/pkey-powerpc.h +++ b/tools/testing/selftests/mm/pkey-powerpc.h @@ -8,6 +8,8 @@ # define SYS_pkey_free 385 #endif #define REG_IP_IDX PT_NIP +#define MCONTEXT_IP(mc) mc.gp_regs[REG_IP_IDX] +#define MCONTEXT_TRAPNO(mc) mc.gp_regs[REG_TRAPNO] #define REG_TRAPNO PT_TRAP #define MCONTEXT_FPREGS #define gregs gp_regs diff --git a/tools/testing/selftests/mm/pkey-x86.h b/tools/testing/selftests/mm/pkey-x86.h index b9170a26bfcb..5f28e26a2511 100644 --- a/tools/testing/selftests/mm/pkey-x86.h +++ b/tools/testing/selftests/mm/pkey-x86.h @@ -15,6 +15,8 @@ #endif +#define MCONTEXT_IP(mc) mc.gregs[REG_IP_IDX] +#define MCONTEXT_TRAPNO(mc) mc.gregs[REG_TRAPNO] #define MCONTEXT_FPREGS #ifndef PKEY_DISABLE_ACCESS diff --git a/tools/testing/selftests/mm/protection_keys.c b/tools/testing/selftests/mm/protection_keys.c index b3dbd76ea27c..14883d551531 100644 --- a/tools/testing/selftests/mm/protection_keys.c +++ b/tools/testing/selftests/mm/protection_keys.c @@ -147,7 +147,7 @@ void abort_hooks(void) * will then fault, which makes sure that the fault code handles * execute-only memory properly. */ -#ifdef __powerpc64__ +#if defined(__powerpc64__) || defined(__aarch64__) /* This way, both 4K and 64K alignment are maintained */ __attribute__((__aligned__(65536))) #else @@ -212,7 +212,6 @@ void pkey_disable_set(int pkey, int flags) unsigned long syscall_flags = 0; int ret; int pkey_rights; - u64 orig_pkey_reg = read_pkey_reg(); dprintf1("START->%s(%d, 0x%x)\n", __func__, pkey, flags); @@ -242,8 +241,6 @@ void pkey_disable_set(int pkey, int flags) dprintf1("%s(%d) pkey_reg: 0x%016llx\n", __func__, pkey, read_pkey_reg()); - if (flags) - pkey_assert(read_pkey_reg() >= orig_pkey_reg); dprintf1("END<---%s(%d, 0x%x)\n", __func__, pkey, flags); } @@ -253,7 +250,6 @@ void pkey_disable_clear(int pkey, int flags) unsigned long syscall_flags = 0; int ret; int pkey_rights = hw_pkey_get(pkey, syscall_flags); - u64 orig_pkey_reg = read_pkey_reg(); pkey_assert(flags & (PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE)); @@ -273,8 +269,6 @@ void pkey_disable_clear(int pkey, int flags) dprintf1("%s(%d) pkey_reg: 0x%016llx\n", __func__, pkey, read_pkey_reg()); - if (flags) - assert(read_pkey_reg() <= orig_pkey_reg); } void pkey_write_allow(int pkey) @@ -330,8 +324,8 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) __func__, __LINE__, __read_pkey_reg(), shadow_pkey_reg); - trapno = uctxt->uc_mcontext.gregs[REG_TRAPNO]; - ip = uctxt->uc_mcontext.gregs[REG_IP_IDX]; + trapno = MCONTEXT_TRAPNO(uctxt->uc_mcontext); + ip = MCONTEXT_IP(uctxt->uc_mcontext); #ifdef MCONTEXT_FPREGS fpregs = (char *) uctxt->uc_mcontext.fpregs; #endif @@ -395,6 +389,8 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) #elif defined(__powerpc64__) /* arch */ /* restore access and let the faulting instruction continue */ pkey_access_allow(siginfo_pkey); +#elif defined(__aarch64__) + aarch64_write_signal_pkey(uctxt, PKEY_ALLOW_ALL); #endif /* arch */ pkey_faults++; dprintf1("<<<<==================================================\n"); @@ -908,7 +904,9 @@ void expected_pkey_fault(int pkey) * test program continue. We now have to restore it. */ if (__read_pkey_reg() != 0) -#else /* arch */ +#elif defined(__aarch64__) + if (__read_pkey_reg() != PKEY_ALLOW_ALL) +#else if (__read_pkey_reg() != shadow_pkey_reg) #endif /* arch */ pkey_assert(0); @@ -1498,6 +1496,11 @@ void test_executing_on_unreadable_memory(int *ptr, u16 pkey) lots_o_noops_around_write(&scratch); do_not_expect_pkey_fault("executing on PROT_EXEC memory"); expect_fault_on_read_execonly_key(p1, pkey); + + // Reset back to PROT_EXEC | PROT_READ for architectures that support + // non-PKEY execute-only permissions. + ret = mprotect_pkey(p1, PAGE_SIZE, PROT_EXEC | PROT_READ, (u64)pkey); + pkey_assert(!ret); } void test_implicit_mprotect_exec_only_memory(int *ptr, u16 pkey) From patchwork Fri Oct 27 18:08:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438792 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71092C25B47 for ; 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Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Shuah Khan --- tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index e3d262831d91..64bb49fe3f5c 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -101,6 +101,12 @@ static void pmull_sigill(void) asm volatile(".inst 0x0ee0e000" : : : ); } +static void poe_sigill(void) +{ + /* mrs x0, POR_EL0 */ + asm volatile("mrs x0, S3_3_C10_C2_4" : : : "x0"); +} + static void rng_sigill(void) { asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0"); @@ -379,6 +385,13 @@ static const struct hwcap_data { .cpuinfo = "pmull", .sigill_fn = pmull_sigill, }, + { + .name = "POE", + .at_hwcap = AT_HWCAP2, + .hwcap_bit = HWCAP2_POE, + .cpuinfo = "poe", + .sigill_fn = poe_sigill, + }, { .name = "RNG", .at_hwcap = AT_HWCAP2, From patchwork Fri Oct 27 18:08:48 2023 Content-Type: text/plain; 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Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Shuah Khan Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/signal/testcases/testcases.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.c b/tools/testing/selftests/arm64/signal/testcases/testcases.c index fe950b6bca6b..5dda753870aa 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.c +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.c @@ -161,6 +161,10 @@ bool validate_reserved(ucontext_t *uc, size_t resv_sz, char **err) if (head->size != sizeof(struct esr_context)) *err = "Bad size for esr_context"; break; + case POE_MAGIC: + if (head->size != sizeof(struct poe_context)) + *err = "Bad size for poe_context"; + break; case TPIDR2_MAGIC: if (head->size != sizeof(struct tpidr2_context)) *err = "Bad size for tpidr2_context"; From patchwork Fri Oct 27 18:08:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438794 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FAE6C25B70 for ; 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s=arc-20220608; d=hostedemail.com; t=1698430201; a=rsa-sha256; cv=none; b=JXdLCvvO1y4b5jxFDg2VrNXNTKJTyYoaVUHtWGW9AuIjTRO2uQ72nkVq2uLZAEmzAYw54L WGauAXquyHay4hV2bgmAJlS0XXMvvglJ+IzVFO7q6nvOgDeyENRo7sCRNSBsxqj2b2Nd51 /d9Glj2O3cGmdIFscOD6gAyZljCVqNI= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E91801424; Fri, 27 Oct 2023 11:10:41 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 273E23F64C; Fri, 27 Oct 2023 11:09:58 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 23/24] kselftest/arm64: Add test case for POR_EL0 signal frame records Date: Fri, 27 Oct 2023 19:08:49 +0100 Message-Id: <20231027180850.1068089-24-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 022C140018 X-Stat-Signature: 1zu9wu3qmst7m4tbg4rsy4j65fuy7hhs X-HE-Tag: 1698430200-798539 X-HE-Meta: U2FsdGVkX19oci2TGAmvRyxlvy3vfoe0RCNkjiyE8Cp3JvXZSSgj+g9lMDQHgfHB5Z2/6nXX+1/9/DOP6pJ52ioY/v1lH2kiSbTvu1cddh3bbSquFY0t/W0uI0o3b7AUlaGfpHW6kWHlMY+JtmypWQcvHd87Q1JqTHQmwLuzgAcA9/iW8kIbRlXdn17Gz60GWbp8c5wuHVH0P3V9q7MEr85cDltpIZuAr8ctah9s/kFSQAARdGn5z0BtagRFyybMbnzjxHbljhuQKefEoNzToZepEXQF+0ps75frOAArpgGbSZBLyGekEgACBByqqGsRO76x0AssJkTtVn4vbzvjO+55mMIvcX2dhZ+JqZqNX/zd5qJLlVTgmUSj9gLEmqB/iFDmqyqbp7iTaqw5bLYuPVzRul4L8lAq/MJclW9ckAvSwhaK+aEU+QIGnj2x9VYnfYOZEblDCX79V3sLOEbheJyKEkAddCIKldS9uwzVR92SvGRcIRUg3FOY7VZF5fPlUvQIPEJNPLJMLiOfC3GcXLvzeCPSIefKxYpqblQHbkOnT3s1OebRpeyqkHIPwNHoWZj+vT3ikD5i24We7ypv1w+2d0Ztrc2Duvs1AMu/ewyyYv9mnZuCwOCqaOTOywz9FJHgrHwpTE4hexqlXu6juzV0VWCrJglHE6Y6eaQzJBsauGASW6tjh6wBykcppMoXTRZZdLFKy4Bftgpi9fk4hJS042kbeu6T+V0VDogjE38FK2+v55P8enCBnoOLug9nGQVxCdMR3danWxG1cJKO6Ev8aVRtwiXh460hzuBzkoZwqD962WzyMTNC1f3p3TXWbyRxGigJFuPHAXCSTUQPl8qH7/bnRJsEAE+rjV3KjCI+WD4o9NYIv5h6/q+gV0n2ynYZ+XhPGZy44edGw7FLzGxowuIWdx6nOOCOqg57TmRp92cKPG1YohIyF+qB6PEPSDa5gLCzyqrZqDxnrOp Q7H28jGO RRPCauUxVVcNFp8xJAUbUofcrnCWJwSY1kgk5v63Ouk5amjry3vnCX0nFGyzyRb+Oga1Lx840auRWk1CU9LGKjkuL3jd6nfmlC7zdDU5GBwwxmceKv4mkN+E0Coc0rQH034OiWRmHqZXd5gXvzhyLrD+q3/W546ERzd2abMglVMfapEQeRY2wLQu/zjQjOwuRrPqzP+/IrKMFDtki0u8+Ail84oBKCyebIsOmxiwhTAtHSTtXvG2NTYCIUv2pIfA/lGzD5fufQUZ0Y1U= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Ensure that we get signal context for POR_EL0 if and only if POE is present on the system. Copied from the TPIDR2 test. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Shuah Khan --- .../testing/selftests/arm64/signal/.gitignore | 1 + .../arm64/signal/testcases/poe_siginfo.c | 86 +++++++++++++++++++ 2 files changed, 87 insertions(+) create mode 100644 tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c diff --git a/tools/testing/selftests/arm64/signal/.gitignore b/tools/testing/selftests/arm64/signal/.gitignore index 839e3a252629..6bcb27bd506b 100644 --- a/tools/testing/selftests/arm64/signal/.gitignore +++ b/tools/testing/selftests/arm64/signal/.gitignore @@ -5,6 +5,7 @@ sme_* ssve_* sve_* tpidr2_* +poe_siginfo za_* zt_* !*.[ch] diff --git a/tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c b/tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c new file mode 100644 index 000000000000..d890029304c4 --- /dev/null +++ b/tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Arm Limited + * + * Verify that the POR_EL0 register context in signal frames is set up as + * expected. + */ + +#include +#include +#include +#include +#include +#include + +#include "test_signals_utils.h" +#include "testcases.h" + +static union { + ucontext_t uc; + char buf[1024 * 128]; +} context; + +#define SYS_POR_EL0 "S3_3_C10_C2_4" + +static uint64_t get_por_el0(void) +{ + uint64_t val; + + asm volatile ( + "mrs %0, " SYS_POR_EL0 "\n" + : "=r"(val) + : + : "cc"); + + return val; +} + +int poe_present(struct tdescr *td, siginfo_t *si, ucontext_t *uc) +{ + struct _aarch64_ctx *head = GET_BUF_RESV_HEAD(context); + struct poe_context *poe_ctx; + size_t offset; + bool in_sigframe; + bool have_poe; + __u64 orig_poe; + + have_poe = getauxval(AT_HWCAP2) & HWCAP2_POE; + if (have_poe) + orig_poe = get_por_el0(); + + if (!get_current_context(td, &context.uc, sizeof(context))) + return 1; + + poe_ctx = (struct poe_context *) + get_header(head, POE_MAGIC, td->live_sz, &offset); + + in_sigframe = poe_ctx != NULL; + + fprintf(stderr, "POR_EL0 sigframe %s on system %s POE\n", + in_sigframe ? "present" : "absent", + have_poe ? "with" : "without"); + + td->pass = (in_sigframe == have_poe); + + /* + * Check that the value we read back was the one present at + * the time that the signal was triggered. + */ + if (have_poe && poe_ctx) { + if (poe_ctx->por_el0 != orig_poe) { + fprintf(stderr, "POR_EL0 in frame is %llx, was %llx\n", + poe_ctx->por_el0, orig_poe); + td->pass = false; + } + } + + return 0; +} + +struct tdescr tde = { + .name = "POR_EL0", + .descr = "Validate that POR_EL0 is present as expected", + .timeout = 3, + .run = poe_present, +}; From patchwork Fri Oct 27 18:08:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13438795 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22B55C25B47 for ; Fri, 27 Oct 2023 18:10:07 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 92FFF6B03EF; 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t=1698430203; a=rsa-sha256; cv=none; b=mdvIwCwiRhG3zoR54s9Wo6bZAb4qdE5rBZI4CbXiV8f7Cn0FGVM5MONl3SqrosF55L2plH WOEfXstr4ma2Sw3Me1DJ9EaZCTXTklsKtPrBYBJQ90b2Za5iZ4K2j6Qwkk7Obm54RIIH4S MWvOwUt6WBpeX/xKLqW/xCKaQNZTdlA= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5E8F41595; Fri, 27 Oct 2023 11:10:44 -0700 (PDT) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 903DD3F64C; Fri, 27 Oct 2023 11:10:00 -0700 (PDT) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v2 24/24] KVM: selftests: get-reg-list: add Permission Overlay registers Date: Fri, 27 Oct 2023 19:08:50 +0100 Message-Id: <20231027180850.1068089-25-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027180850.1068089-1-joey.gouly@arm.com> References: <20231027180850.1068089-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 6A2AB20016 X-Stat-Signature: d57pc4ctifiz5sjcn3q1fypc7ghnzc1r X-Rspam-User: X-HE-Tag: 1698430203-660114 X-HE-Meta: U2FsdGVkX1/lYqBjIY6ZrCT9DQCBr1Kjk9aSi/YuQjPln4gFdAe39qROXOw/Ti+p8Yo5O+tUADuuFeIzyGa4erzK+ZKNyTSnHSiZH9Hl35ySdl8IzdLMf4uuQmA1oLAop9Jdl7jR9fnqYO0w59J6JIHAvEVcRJ9OuGLyNkMdkJsu5UXji80LG9yNGkaRuGdKWsPHU0gxvUjZoHiV+hGI0nmu8VYWrp6G3H6ausfP+GC5kuCP1In7WCAr4g6MXR8a6dYMGiC1CCYcoumT6IxRj70j+tqyjeMHxiXR2RceJeeMMC85EH/uzxAJr/qCWI+FDu+DJc5JZ1eduYK51NF/yqmA/TMCZwSEYmR/xBbfhRxdQBkJYxM+sekMTe1eNr0869XtujOGpvINS60Uxuu9g0BK0VoHjdYwnmx71rUU92bu1e7JP0k/epouX0oA6tAe5pq0UIejV5HC8NGol2cC9BC+rSOmKbvMfu3mBO+wxVDYxc23P8CP0Cvv3IsFKMm59cMPiCa+L/PDiSuqCI1csaQMZ86BbdeQxTIOhxdSQJ/eDgKOSmc96Zi9i/R3aic8TetKV/8W1ydAMiSj4pNISLSa7gxeGg5wp/zFoMOtzHX87BFYu0le02u7TCGJr0Pg/WeX7i199225odAwUDtBed85hklhIxTGtjfbdYFq5G9Q5H/fkRjXLUL45nGDIhVZ2Ia5cBdq07yeY+LCTaZvKVBBWHJhrTAjFCqRNJOVbEVTpaKsdVzCaN6yzBg43sDsklxNFj0mqQZ5PMXLbkzF/hgE2rj5St83ujp2d/WvEngkGp2NGyoPCprbcOdLzksvGatwlqiuC6K6WbNdGXLcRxZXqDybBIg8+uOS9KzPo+ucuiV+lKvTaxHZRchkmYcxUW6JdXRCom0cuXbVN20ThVfyI3jdiD3cwPVx/PMhehFMNGNiYro6hpyDnaznx952pED8YC+JlZs0XGICNyo Is4Brm6/ JkoeR1Q3lafQ+htolrpjKZ9fkG28FXVLLo15qvYWPnytnoiAo4HXVyaDdM5ICwNZaqqL0gQ9urdMtLc2uUMaTuHumvfxhn/to85p8MY1ESI37N802E7RvRwxFzw5kxKR8jHpUXqw9IYvPWD2W5orfj6SBe5wp/UTqXra+G28N2Qto48D0PE+7t/nGTQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add new system registers: - POR_EL1 - POR_EL0 Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Oliver Upton Cc: Shuah Khan --- tools/testing/selftests/kvm/aarch64/get-reg-list.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c index 709d7d721760..ac661ebf6859 100644 --- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c +++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c @@ -40,6 +40,18 @@ static struct feature_id_reg feat_id_regs[] = { ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ 4, 1 + }, + { + ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */ + ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ + 16, + 1 + }, + { + ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */ + ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ + 16, + 1 } }; @@ -468,6 +480,7 @@ static __u64 base_regs[] = { ARM64_SYS_REG(3, 0, 10, 2, 0), /* MAIR_EL1 */ ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */ ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */ + ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */ ARM64_SYS_REG(3, 0, 10, 3, 0), /* AMAIR_EL1 */ ARM64_SYS_REG(3, 0, 12, 0, 0), /* VBAR_EL1 */ ARM64_SYS_REG(3, 0, 12, 1, 1), /* DISR_EL1 */ @@ -475,6 +488,7 @@ static __u64 base_regs[] = { ARM64_SYS_REG(3, 0, 13, 0, 4), /* TPIDR_EL1 */ ARM64_SYS_REG(3, 0, 14, 1, 0), /* CNTKCTL_EL1 */ ARM64_SYS_REG(3, 2, 0, 0, 0), /* CSSELR_EL1 */ + ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */ ARM64_SYS_REG(3, 3, 13, 0, 2), /* TPIDR_EL0 */ ARM64_SYS_REG(3, 3, 13, 0, 3), /* TPIDRRO_EL0 */ ARM64_SYS_REG(3, 3, 14, 0, 1), /* CNTPCT_EL0 */