From patchwork Sun Nov 5 20:07:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13446096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0847CC0018A for ; Sun, 5 Nov 2023 20:08:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229628AbjKEUIh (ORCPT ); Sun, 5 Nov 2023 15:08:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229626AbjKEUIg (ORCPT ); Sun, 5 Nov 2023 15:08:36 -0500 Received: from mout-p-102.mailbox.org (mout-p-102.mailbox.org [80.241.56.152]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75172DD; Sun, 5 Nov 2023 12:08:33 -0800 (PST) Received: from smtp102.mailbox.org (smtp102.mailbox.org [10.196.197.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-102.mailbox.org (Postfix) with ESMTPS id 4SNlsp009sz9smh; Sun, 5 Nov 2023 21:08:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1699214910; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=EDD6lR1/aN0jSTjcpIJ2Ol25YYZAKhXKuuE0WkDZ1r8=; b=cGY3VnztQYTzxiZeHjuLoPlBThP5AfuVIOOd4s8W0NFmUBp1OrxqniMqrewsc5aZIoSEph 25mF2eyBHq1RKgzJlP1wvcidEJZy6d/i7liDx2/eWxl3pU9banjTe2HYH4fVvUrrSgy2LZ EFoAnAytNqfc9t6D/csupKoCy9JWLuu9E2xFt3vXGKHekkYaLGe/dXYa8f25oFckLYZ7wU QYGYfEZC8/8udKFkTEo8g+g/FyDzIAQ7OKQWBAPW8T+ZXkWd6j42qu79incwUr+7bRWDMD CQ9CBDdJcm8Z+0koHvUKwrCB9Rwu/IxryoR6l5b7wsr6a70Y7cqvCY0Lka0zrA== From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1699214908; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=EDD6lR1/aN0jSTjcpIJ2Ol25YYZAKhXKuuE0WkDZ1r8=; b=RUL7SbcFgSdDtQh9/Y2cY91DgvFgCUuvh/bm35Hgy4ND5DXTkruncPV0E8fjgV5aPsMyJk dajTs3LE2xOswtDjZWeLykAEiXpL6D8DgQIwf+PCLDy2pLy2zmZ5BzktNX6Q2z2jTmzs6n 3ZelpIqPPFjyWrm7LGLiplecsyityWuuOGCVPhOwguQrdkGfdAEn/JpS7w3yd4WNtCNy/f iu5bJwD1w7lq3VSs4h2L3PtlrzLyitjSPMvNDRmHKs94hSNRqEL9049XtOQ8N8l2tGRljL ZHzxzniIF6c9RoSlTLCHOxhIdMU1OD2VCUcCb51F4FhyANbQjdkZzZAgWHPl5w== To: linux-clk@vger.kernel.org Cc: Marek Vasut , Alexander Stein , Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Michael Turquette , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: clk: rs9: Add 9FGV0841 Date: Sun, 5 Nov 2023 21:07:58 +0100 Message-ID: <20231105200812.62849-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 X-MBO-RS-META: fdwghoktcwgo3put9mpangp8hhcdeh9c X-MBO-RS-ID: 3d0007d7550afafabac Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This is an 8-channel variant of 9FGV series. Signed-off-by: Marek Vasut Acked-by: Alexander Stein Acked-by: Conor Dooley --- Cc: Alexander Stein Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Krzysztof Kozlowski Cc: Michael Turquette Cc: Rob Herring Cc: Stephen Boyd Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- .../devicetree/bindings/clock/renesas,9series.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml index 3afdebdb52ad..af6319697b1c 100644 --- a/Documentation/devicetree/bindings/clock/renesas,9series.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml @@ -21,6 +21,15 @@ description: | 1 -- DIF1 2 -- DIF2 3 -- DIF3 + - 9FGV0841: + 0 -- DIF0 + 1 -- DIF1 + 2 -- DIF2 + 3 -- DIF3 + 4 -- DIF4 + 5 -- DIF5 + 6 -- DIF6 + 7 -- DIF7 maintainers: - Marek Vasut @@ -30,6 +39,7 @@ properties: enum: - renesas,9fgv0241 - renesas,9fgv0441 + - renesas,9fgv0841 reg: description: I2C device address From patchwork Sun Nov 5 20:07:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13446095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC7FDC4332F for ; Sun, 5 Nov 2023 20:08:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229451AbjKEUIg (ORCPT ); Sun, 5 Nov 2023 15:08:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229639AbjKEUIg (ORCPT ); Sun, 5 Nov 2023 15:08:36 -0500 Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [80.241.56.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 175D4D8; Sun, 5 Nov 2023 12:08:33 -0800 (PST) Received: from smtp102.mailbox.org (smtp102.mailbox.org [10.196.197.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4SNlsq3t15z9sb4; Sun, 5 Nov 2023 21:08:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1699214911; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FaYe2BQGomcplxNjBFyGekzoFMPfvJlEGkyI54jKyaY=; b=fIYfw5t3sZqihyxi2dm5Vg90xFc9URm1l1LGOQxn3KkiccmVcuVaLoHesXzJugnpD7x1p7 mjWGX9xuLGf3pUM4L1fcQ+jVGWxJe8D4thc88+vo1y9vtTIBQhb77N0Ie+Uv156bw92rP4 Wq3jhSYLLkZiq0vkbY9L/rlJrsw21BLOuoqHAWH/ylZ17VPfScvcPMwQCTqxvBMOWY9c5p 2Bg/zdT0lUBLshrvzat3PAWIEeRf8VAXA+Vrl5Ktisi4K0qUEsnhXLCjMRsWKuw/GoK5vz 5FQUtK9c7PyGzLkz+NdLSL8AIivj+YSjJ9ThslKS6rY1wC94lodThsPNg8lF9w== From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1699214909; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FaYe2BQGomcplxNjBFyGekzoFMPfvJlEGkyI54jKyaY=; b=tSqBPwhh4E4TTL6wT2XEcx/3qknQe70bOCrPPmczpK/HIXpeMJVOe+H1MbXvGXZNbT7QCt jSiQYbvQTrOlsxNreWFm2KS9Py4clYOvoNng2+z/6u73/npJgPUZZ2NnliZw8D6I4jYZ0U QPDJD6OmQVla/vJ4dj4Is7DoDBBxwN9q3uMvmOPX1s3GXg8xUY6Wkb8Ylh6PLzCX9mk7Y0 maXm1LX3IYuCA9crbOiqsWxPjYfm+QyolnqIHugnN0gsHOgBvo9SxlRg5ZV9Hh3R+nmR6s pK9TIccSbcs/8NPn4Nm0CK35CC6Biyrf0az1bLWJnsToOGyOi8Zebi0lEgNDqQ== To: linux-clk@vger.kernel.org Cc: Marek Vasut , Alexander Stein , Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Michael Turquette , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/2] clk: rs9: Add support for 9FGV0841 Date: Sun, 5 Nov 2023 21:07:59 +0100 Message-ID: <20231105200812.62849-2-marek.vasut+renesas@mailbox.org> In-Reply-To: <20231105200812.62849-1-marek.vasut+renesas@mailbox.org> References: <20231105200812.62849-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 X-MBO-RS-ID: 0bae51595360370d286 X-MBO-RS-META: eh1uzp5o46bwi7fojhwp9fxzg1c57xnh Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This model is similar to 9FGV0441, the DIFx bits start at bit 0 again, except this chip has 8 outputs. Adjust rs9_calc_dif() to special-case the 9FGV0241 where DIFx bits start at 1. Extract only vendor ID from VID register, the top 4 bits are revision ID which are not useful for the vendor ID check. Signed-off-by: Marek Vasut --- Cc: Alexander Stein Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Krzysztof Kozlowski Cc: Michael Turquette Cc: Rob Herring Cc: Stephen Boyd Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- drivers/clk/clk-renesas-pcie.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-renesas-pcie.c b/drivers/clk/clk-renesas-pcie.c index 6606aba253c5..f8dd79b18d5a 100644 --- a/drivers/clk/clk-renesas-pcie.c +++ b/drivers/clk/clk-renesas-pcie.c @@ -7,6 +7,7 @@ * Currently supported: * - 9FGV0241 * - 9FGV0441 + * - 9FGV0841 * * Copyright (C) 2022 Marek Vasut */ @@ -42,6 +43,7 @@ #define RS9_REG_DID 0x6 #define RS9_REG_BCP 0x7 +#define RS9_REG_VID_MASK GENMASK(3, 0) #define RS9_REG_VID_IDT 0x01 #define RS9_REG_DID_TYPE_FGV (0x0 << RS9_REG_DID_TYPE_SHIFT) @@ -53,6 +55,7 @@ enum rs9_model { RENESAS_9FGV0241, RENESAS_9FGV0441, + RENESAS_9FGV0841, }; /* Structure to describe features of a particular 9-series model */ @@ -162,12 +165,15 @@ static u8 rs9_calc_dif(const struct rs9_driver_data *rs9, int idx) { enum rs9_model model = rs9->chip_info->model; + /* + * On 9FGV0241, the DIF OE0 is BIT(1) and DIF OE(1) is BIT(2), + * on 9FGV0441 and 9FGV0841 the DIF OE0 is BIT(0) and so on. + * Increment the index in the 9FGV0241 special case here. + */ if (model == RENESAS_9FGV0241) - return BIT(idx + 1); - else if (model == RENESAS_9FGV0441) - return BIT(idx); + idx++; - return 0; + return BIT(idx); } static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx) @@ -333,6 +339,7 @@ static int rs9_probe(struct i2c_client *client) if (ret < 0) return ret; + vid &= RS9_REG_VID_MASK; if (vid != RS9_REG_VID_IDT || did != rs9->chip_info->did) return dev_err_probe(&client->dev, -ENODEV, "Incorrect VID/DID: %#02x, %#02x. Expected %#02x, %#02x\n", @@ -391,9 +398,16 @@ static const struct rs9_chip_info renesas_9fgv0441_info = { .did = RS9_REG_DID_TYPE_FGV | 0x04, }; +static const struct rs9_chip_info renesas_9fgv0841_info = { + .model = RENESAS_9FGV0841, + .num_clks = 8, + .did = RS9_REG_DID_TYPE_FGV | 0x08, +}; + static const struct i2c_device_id rs9_id[] = { { "9fgv0241", .driver_data = (kernel_ulong_t)&renesas_9fgv0241_info }, { "9fgv0441", .driver_data = (kernel_ulong_t)&renesas_9fgv0441_info }, + { "9fgv0841", .driver_data = (kernel_ulong_t)&renesas_9fgv0841_info }, { } }; MODULE_DEVICE_TABLE(i2c, rs9_id); @@ -401,6 +415,7 @@ MODULE_DEVICE_TABLE(i2c, rs9_id); static const struct of_device_id clk_rs9_of_match[] = { { .compatible = "renesas,9fgv0241", .data = &renesas_9fgv0241_info }, { .compatible = "renesas,9fgv0441", .data = &renesas_9fgv0441_info }, + { .compatible = "renesas,9fgv0841", .data = &renesas_9fgv0841_info }, { } }; MODULE_DEVICE_TABLE(of, clk_rs9_of_match);