From patchwork Mon Nov 6 16:37:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13447182 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C618C2941D for ; Mon, 6 Nov 2023 16:37:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="n5+LU7U/" Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8D79D6F; Mon, 6 Nov 2023 08:37:44 -0800 (PST) Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3A6GCSrp013132; Mon, 6 Nov 2023 16:37:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=mGKfaxFcsqBeblRGL8tnRW6ubtJDlbBFj1Lalg3Ogd8=; b=n5+LU7U/e/JYe4J8D1rvC+ZIjvi5LlntPv8VgZrCe3VfiQO3SfJIWp7lKUKn+o72EjkD gxuQEMukWws0bAGXCSCC8Z32VaI8cMY12BlfzN8sFjB/iXJkTxSUHHadqvuVelSRPVHQ xDov3ngIl49BxrnkuEQTHsGvr8tQtbXdgZo+urnK23H3tHzYnfjwvZmU+G+dQD/SOjlu RvfR3x2NFNqZauW5oBzbesBMASXs3iyQdrR854nK6wcBXm7u1Zx5n+9qwh0b1pqTpKeR A5t6I2PduKWEsDyA+GdbRM4INUD2py6bp/gfS/FWlfRIsBqrLyvjAsC1b4RcY0ebZ9+g kA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3u73f4gygn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 16:37:44 +0000 Received: from m0353729.ppops.net (m0353729.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3A6GCatj014051; Mon, 6 Nov 2023 16:37:43 GMT Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3u73f4gyfy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 16:37:43 +0000 Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 3A6EQb36007971; Mon, 6 Nov 2023 16:37:42 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3u61skaftw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 16:37:42 +0000 Received: from smtpav05.fra02v.mail.ibm.com (smtpav05.fra02v.mail.ibm.com [10.20.54.104]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3A6Gbd7W44892462 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 6 Nov 2023 16:37:39 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 19A032004B; Mon, 6 Nov 2023 16:37:39 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D10AC2004D; Mon, 6 Nov 2023 16:37:38 +0000 (GMT) Received: from t35lp63.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 6 Nov 2023 16:37:38 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 1/8] lib: s390x: introduce bitfield for PSW mask Date: Mon, 6 Nov 2023 17:37:23 +0100 Message-ID: <20231106163738.1116942-2-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Z2sS8W4t6D9KGZS7_HthGq1-MfL9jDox X-Proofpoint-ORIG-GUID: ImsmejNktl9u8JWp6iZkzS3wt18s8Ug9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 adultscore=0 mlxlogscore=673 priorityscore=1501 impostorscore=0 spamscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 Changing the PSW mask is currently little clumsy, since there is only the PSW_MASK_* defines. This makes it hard to change e.g. only the address space in the current PSW without a lot of bit fiddling. Introduce a bitfield for the PSW mask. This makes this kind of modifications much simpler and easier to read. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Claudio Imbrenda Reviewed-by: Janosch Frank --- lib/s390x/asm/arch_def.h | 25 ++++++++++++++++++++++++- s390x/selftest.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 1 deletion(-) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index bb26e008cc68..f629b6d0a17f 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -37,9 +37,32 @@ struct stack_frame_int { }; struct psw { - uint64_t mask; + union { + uint64_t mask; + struct { + uint64_t reserved00:1; + uint64_t per:1; + uint64_t reserved02:3; + uint64_t dat:1; + uint64_t io:1; + uint64_t ext:1; + uint64_t key:4; + uint64_t reserved12:1; + uint64_t mchk:1; + uint64_t wait:1; + uint64_t pstate:1; + uint64_t as:2; + uint64_t cc:2; + uint64_t prg_mask:4; + uint64_t reserved24:7; + uint64_t ea:1; + uint64_t ba:1; + uint64_t reserved33:31; + }; + }; uint64_t addr; }; +_Static_assert(sizeof(struct psw) == 16, "PSW size"); #define PSW(m, a) ((struct psw){ .mask = (m), .addr = (uint64_t)(a) }) diff --git a/s390x/selftest.c b/s390x/selftest.c index 13fd36bc06f8..92ed4e5d35eb 100644 --- a/s390x/selftest.c +++ b/s390x/selftest.c @@ -74,6 +74,39 @@ static void test_malloc(void) report_prefix_pop(); } +static void test_psw_mask(void) +{ + uint64_t expected_key = 0xf; + struct psw test_psw = PSW(0, 0); + + report_prefix_push("PSW mask"); + test_psw.mask = PSW_MASK_DAT; + report(test_psw.dat, "DAT matches expected=0x%016lx actual=0x%016lx", PSW_MASK_DAT, test_psw.mask); + + test_psw.mask = PSW_MASK_IO; + report(test_psw.io, "IO matches expected=0x%016lx actual=0x%016lx", PSW_MASK_IO, test_psw.mask); + + test_psw.mask = PSW_MASK_EXT; + report(test_psw.ext, "EXT matches expected=0x%016lx actual=0x%016lx", PSW_MASK_EXT, test_psw.mask); + + test_psw.mask = expected_key << (63 - 11); + report(test_psw.key == expected_key, "PSW Key matches expected=0x%lx actual=0x%x", expected_key, test_psw.key); + + test_psw.mask = 1UL << (63 - 13); + report(test_psw.mchk, "MCHK matches"); + + test_psw.mask = PSW_MASK_WAIT; + report(test_psw.wait, "Wait matches expected=0x%016lx actual=0x%016lx", PSW_MASK_WAIT, test_psw.mask); + + test_psw.mask = PSW_MASK_PSTATE; + report(test_psw.pstate, "Pstate matches expected=0x%016lx actual=0x%016lx", PSW_MASK_PSTATE, test_psw.mask); + + test_psw.mask = PSW_MASK_64; + report(test_psw.ea && test_psw.ba, "BA/EA matches expected=0x%016lx actual=0x%016lx", PSW_MASK_64, test_psw.mask); + + report_prefix_pop(); +} + int main(int argc, char**argv) { report_prefix_push("selftest"); @@ -89,6 +122,7 @@ int main(int argc, char**argv) test_fp(); test_pgm_int(); test_malloc(); + test_psw_mask(); return report_summary(); } From patchwork Mon Nov 6 16:37:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13447179 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F41AE29420 for ; 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Mon, 6 Nov 2023 16:37:39 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5CBD120040; Mon, 6 Nov 2023 16:37:39 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 224FB2004E; Mon, 6 Nov 2023 16:37:39 +0000 (GMT) Received: from t35lp63.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 6 Nov 2023 16:37:39 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 2/8] s390x: add function to set DAT mode for all interrupts Date: Mon, 6 Nov 2023 17:37:24 +0100 Message-ID: <20231106163738.1116942-3-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: oXpJyHTim2MLtAKCy1Di91-X1DiESxvU X-Proofpoint-GUID: w9fA0-3O75pYQQriZKD5ggv7yV4cjcG9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 mlxscore=0 bulkscore=0 phishscore=0 malwarescore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=506 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 When toggling DAT or switch address space modes, it is likely that interrupts should be handled in the same DAT or address space mode. Add a function which toggles DAT and address space mode for all interruptions, except restart interrupts. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Janosch Frank Reviewed-by: Claudio Imbrenda --- lib/s390x/asm/arch_def.h | 10 ++++++---- lib/s390x/asm/interrupt.h | 2 ++ lib/s390x/interrupt.c | 35 +++++++++++++++++++++++++++++++++++ lib/s390x/mmu.c | 5 +++-- 4 files changed, 46 insertions(+), 6 deletions(-) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index f629b6d0a17f..5beaf15b57e7 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -84,10 +84,12 @@ struct cpu { bool in_interrupt_handler; }; -#define AS_PRIM 0 -#define AS_ACCR 1 -#define AS_SECN 2 -#define AS_HOME 3 +enum address_space { + AS_PRIM = 0, + AS_ACCR = 1, + AS_SECN = 2, + AS_HOME = 3 +}; #define PSW_MASK_DAT 0x0400000000000000UL #define PSW_MASK_IO 0x0200000000000000UL diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index 35c1145f0349..d01f8a89641a 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -83,6 +83,8 @@ void expect_ext_int(void); uint16_t clear_pgm_int(void); void check_pgm_int_code(uint16_t code); +void irq_set_dat_mode(bool use_dat, enum address_space as); + /* Activate low-address protection */ static inline void low_prot_enable(void) { diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c index 3f993a363ae2..e990c1863630 100644 --- a/lib/s390x/interrupt.c +++ b/lib/s390x/interrupt.c @@ -9,6 +9,7 @@ */ #include #include +#include #include #include #include @@ -104,6 +105,40 @@ void register_ext_cleanup_func(void (*f)(struct stack_frame_int *)) THIS_CPU->ext_cleanup_func = f; } +/** + * irq_set_dat_mode - Set the DAT mode of all interrupt handlers, except for + * restart. + * @use_dat: specifies whether to use DAT or not + * @as: specifies the address space mode to use. Not set if use_dat is false. + * + * This will update the DAT mode and address space mode of all interrupt new + * PSWs. + * + * Since enabling DAT needs initialized CRs and the restart new PSW is often used + * to initialize CRs, the restart new PSW is never touched to avoid the chicken + * and egg situation. + */ +void irq_set_dat_mode(bool use_dat, enum address_space as) +{ + struct psw* irq_psws[] = { + OPAQUE_PTR(GEN_LC_EXT_NEW_PSW), + OPAQUE_PTR(GEN_LC_SVC_NEW_PSW), + OPAQUE_PTR(GEN_LC_PGM_NEW_PSW), + OPAQUE_PTR(GEN_LC_MCCK_NEW_PSW), + OPAQUE_PTR(GEN_LC_IO_NEW_PSW), + }; + struct psw *psw; + + assert(as == AS_PRIM || as == AS_ACCR || as == AS_SECN || as == AS_HOME); + + for (size_t i = 0; i < ARRAY_SIZE(irq_psws); i++) { + psw = irq_psws[i]; + psw->dat = use_dat; + if (use_dat) + psw->as = as; + } +} + static void fixup_pgm_int(struct stack_frame_int *stack) { /* If we have an error on SIE we directly move to sie_exit */ diff --git a/lib/s390x/mmu.c b/lib/s390x/mmu.c index b474d7021d3f..9a179d6b8ec5 100644 --- a/lib/s390x/mmu.c +++ b/lib/s390x/mmu.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "mmu.h" @@ -41,8 +42,8 @@ static void mmu_enable(pgd_t *pgtable) /* enable dat (primary == 0 set as default) */ enable_dat(); - /* we can now also use DAT unconditionally in our PGM handler */ - lowcore.pgm_new_psw.mask |= PSW_MASK_DAT; + /* we can now also use DAT in all interrupt handlers */ + irq_set_dat_mode(true, AS_PRIM); } /* From patchwork Mon Nov 6 16:37:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13447178 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 433D429424 for ; Mon, 6 Nov 2023 16:37:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="aXoxc/R2" Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E98F10E3; Mon, 6 Nov 2023 08:37:45 -0800 (PST) Received: from pps.filterd (m0353727.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3A6GHLJ5008305; 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Mon, 6 Nov 2023 16:37:39 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 3/8] s390x: sie: switch to home space mode before entering SIE Date: Mon, 6 Nov 2023 17:37:25 +0100 Message-ID: <20231106163738.1116942-4-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Y23M_fSmYj2rKG18ruC2pAWv81a-dta9 X-Proofpoint-ORIG-GUID: IWaRCRNBHqRR8xVB44eCK0kcIBL0i5kI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 adultscore=0 mlxscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 This is to prepare for running guests without MSO/MSL, which is currently not possible. We already have code in sie64a to setup a guest primary ASCE before entering SIE, so we can in theory switch to the page tables which translate gpa to hpa. But the host is running in primary space mode already, so changing the primary ASCE before entering SIE will also affect the host's code and data. To make this switch useful, the host should run in a different address space mode. Hence, set up and change to home address space mode before installing the guest ASCE. The home space ASCE is just copied over from the primary space ASCE, so no functional change is intended, also for tests that want to use MSO/MSL. If a test intends to use a different primary space ASCE, it can now just set the guest.asce in the save_area. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Janosch Frank Reviewed-by: Claudio Imbrenda --- lib/s390x/asm/arch_def.h | 1 + lib/s390x/sie.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index 5beaf15b57e7..745a33878de5 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -92,6 +92,7 @@ enum address_space { }; #define PSW_MASK_DAT 0x0400000000000000UL +#define PSW_MASK_HOME 0x0000C00000000000UL #define PSW_MASK_IO 0x0200000000000000UL #define PSW_MASK_EXT 0x0100000000000000UL #define PSW_MASK_KEY 0x00F0000000000000UL diff --git a/lib/s390x/sie.c b/lib/s390x/sie.c index b44febdeaaac..7f4474555ff7 100644 --- a/lib/s390x/sie.c +++ b/lib/s390x/sie.c @@ -52,6 +52,8 @@ void sie_handle_validity(struct vm *vm) void sie(struct vm *vm) { + uint64_t old_cr13; + if (vm->sblk->sdf == 2) memcpy(vm->sblk->pv_grregs, vm->save_area.guest.grs, sizeof(vm->save_area.guest.grs)); @@ -59,6 +61,24 @@ void sie(struct vm *vm) /* Reset icptcode so we don't trip over it below */ vm->sblk->icptcode = 0; + /* + * Set up home address space to match primary space. Instead of running + * in home space all the time, we switch every time in sie() because: + * - tests that depend on running in primary space mode don't need to be + * touched + * - it avoids regressions in tests + * - switching every time makes it easier to extend this in the future, + * for example to allow tests to run in whatever space they want + */ + old_cr13 = stctg(13); + lctlg(13, stctg(1)); + + /* switch to home space so guest tables can be different from host */ + psw_mask_set_bits(PSW_MASK_HOME); + + /* also handle all interruptions in home space while in SIE */ + irq_set_dat_mode(true, AS_HOME); + while (vm->sblk->icptcode == 0) { sie64a(vm->sblk, &vm->save_area); sie_handle_validity(vm); @@ -66,6 +86,12 @@ void sie(struct vm *vm) vm->save_area.guest.grs[14] = vm->sblk->gg14; vm->save_area.guest.grs[15] = vm->sblk->gg15; + irq_set_dat_mode(true, AS_PRIM); + psw_mask_clear_bits(PSW_MASK_HOME); + + /* restore the old CR 13 */ + lctlg(13, old_cr13); + if (vm->sblk->sdf == 2) memcpy(vm->save_area.guest.grs, vm->sblk->pv_grregs, sizeof(vm->save_area.guest.grs)); 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Mon, 6 Nov 2023 16:37:39 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 4/8] s390x: lib: don't forward PSW when handling exception in SIE Date: Mon, 6 Nov 2023 17:37:26 +0100 Message-ID: <20231106163738.1116942-5-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 9P7QfSgThZoWmPONAA2PRW_fo_5qODiU X-Proofpoint-GUID: 5Sv6uXPrWnyOYFVCQiqGojSIHdBxXK82 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 mlxscore=0 bulkscore=0 phishscore=0 malwarescore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 When we're handling a pgm int in SIE, we want to return to the SIE cleanup after handling the exception. That's why we set pgm_old_psw to the sie_exit label in fixup_pgm_int. On nullifing pgm ints, fixup_pgm_int will also forward the old PSW such that we don't cause an pgm int again. However, when we want to return to the sie_exit label, this is not needed (since we've manually set pgm_old_psw). Instead, forwarding the PSW might cause us to skip an instruction or end up in the middle of an instruction. So, let's just skip the rest of the fixup in case we're inside SIE. Note that we're intentionally not fixing up the PSW in the guest; that's best left to the test at hand by registering their own psw fixup. Signed-off-by: Nico Boehr Reviewed-by: Janosch Frank Reviewed-by: Claudio Imbrenda --- lib/s390x/interrupt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c index e990c1863630..f7843a8f01c6 100644 --- a/lib/s390x/interrupt.c +++ b/lib/s390x/interrupt.c @@ -145,6 +145,7 @@ static void fixup_pgm_int(struct stack_frame_int *stack) if (lowcore.pgm_old_psw.addr >= (uint64_t)&sie_entry && lowcore.pgm_old_psw.addr <= (uint64_t)&sie_exit) { lowcore.pgm_old_psw.addr = (uint64_t)&sie_exit; + return; } switch (lowcore.pgm_int_code) { From patchwork Mon Nov 6 16:37:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13447183 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A17D29427 for ; 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Mon, 06 Nov 2023 16:37:45 +0000 Received: from m0353729.ppops.net (m0353729.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3A6GDAJR018099; Mon, 6 Nov 2023 16:37:44 GMT Received: from ppma21.wdc07v.mail.ibm.com (5b.69.3da9.ip4.static.sl-reverse.com [169.61.105.91]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3u73f4gygr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 16:37:44 +0000 Received: from pps.filterd (ppma21.wdc07v.mail.ibm.com [127.0.0.1]) by ppma21.wdc07v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 3A6GSuAI025671; Mon, 6 Nov 2023 16:37:43 GMT Received: from smtprelay05.fra02v.mail.ibm.com ([9.218.2.225]) by ppma21.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3u619namxf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 16:37:43 +0000 Received: from smtpav05.fra02v.mail.ibm.com (smtpav05.fra02v.mail.ibm.com [10.20.54.104]) by smtprelay05.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3A6GbejA21561862 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 6 Nov 2023 16:37:40 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3861F20040; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F182B2004D; Mon, 6 Nov 2023 16:37:39 +0000 (GMT) Received: from t35lp63.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 6 Nov 2023 16:37:39 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 5/8] s390x: lib: sie: don't reenter SIE on pgm int Date: Mon, 6 Nov 2023 17:37:27 +0100 Message-ID: <20231106163738.1116942-6-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: o0ptaAlmOeKijZ9yUKXBH-H3kr4iAooO X-Proofpoint-ORIG-GUID: DTRXyzIMkhhWGvOG7ufLSc9p44ZUKZzm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=17 malwarescore=0 mlxscore=17 clxscore=1015 lowpriorityscore=0 suspectscore=0 adultscore=0 mlxlogscore=70 priorityscore=1501 impostorscore=0 spamscore=17 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 At the moment, when a PGM int occurs while in SIE, we will just reenter SIE after the interrupt handler was called. This is because sie() has a loop which checks icptcode and re-enters SIE if it is zero. However, this behaviour is quite undesirable for SIE tests, since it doesn't give the host the chance to assert on the PGM int. Instead, we will just re-enter SIE, on nullifing conditions even causing the exception again. In sie(), check whether a pgm int code is set in lowcore. If it has, exit the loop so the test can react to the interrupt. Add a new function read_pgm_int_code() to obtain the interrupt code. Note that this introduces a slight oddity with sie and pgm int in certain cases: If a PGM int occurs between a expect_pgm_int() and sie(), we will now never enter SIE until the pgm_int_code is cleared by e.g. clear_pgm_int(). Also add missing include of facility.h to mem.h. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Claudio Imbrenda Reviewed-by: Janosch Frank --- lib/s390x/asm/interrupt.h | 14 ++++++++++++++ lib/s390x/asm/mem.h | 1 + lib/s390x/sie.c | 7 ++++++- 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index d01f8a89641a..39b43b64ea07 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -97,4 +97,18 @@ static inline void low_prot_disable(void) ctl_clear_bit(0, CTL0_LOW_ADDR_PROT); } +/** + * read_pgm_int_code - Get the program interruption code of the last pgm int + * on the current CPU. + * + * This is similar to clear_pgm_int(), except that it doesn't clear the + * interruption information from lowcore. + * + * Return: 0 when none occurred. + */ +static inline uint16_t read_pgm_int_code(void) +{ + return lowcore.pgm_int_code; +} + #endif diff --git a/lib/s390x/asm/mem.h b/lib/s390x/asm/mem.h index 64ef59b546a4..94d58c34f53f 100644 --- a/lib/s390x/asm/mem.h +++ b/lib/s390x/asm/mem.h @@ -8,6 +8,7 @@ #ifndef _ASMS390X_MEM_H_ #define _ASMS390X_MEM_H_ #include +#include /* create pointer while avoiding compiler warnings */ #define OPAQUE_PTR(x) ((void *)(((uint64_t)&lowcore) + (x))) diff --git a/lib/s390x/sie.c b/lib/s390x/sie.c index 7f4474555ff7..2530ff09ddcd 100644 --- a/lib/s390x/sie.c +++ b/lib/s390x/sie.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -54,6 +55,9 @@ void sie(struct vm *vm) { uint64_t old_cr13; + /* When a pgm int code is set, we'll never enter SIE below. */ + assert(!read_pgm_int_code()); + if (vm->sblk->sdf == 2) memcpy(vm->sblk->pv_grregs, vm->save_area.guest.grs, sizeof(vm->save_area.guest.grs)); @@ -79,7 +83,8 @@ void sie(struct vm *vm) /* also handle all interruptions in home space while in SIE */ irq_set_dat_mode(true, AS_HOME); - while (vm->sblk->icptcode == 0) { + /* leave SIE when we have an intercept or an interrupt so the test can react to it */ + while (vm->sblk->icptcode == 0 && !read_pgm_int_code()) { sie64a(vm->sblk, &vm->save_area); sie_handle_validity(vm); } From patchwork Mon Nov 6 16:37:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13447177 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FBBD29413 for ; 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Mon, 6 Nov 2023 16:37:40 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 868A120040; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 42B3320043; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) Received: from t35lp63.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 6/8] s390x: add test source dir to include paths Date: Mon, 6 Nov 2023 17:37:28 +0100 Message-ID: <20231106163738.1116942-7-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: -N2NmcYNjehihb3lmk3JrtVv5E4kYPLz X-Proofpoint-ORIG-GUID: J8fhgOcaGbvpWDZRdQaAlGnsIOEQ-2HP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 adultscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 spamscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 Sometimes, it is useful to share some defines between a snippet and a test. By adding the source directory to include paths, header files can be placed in the snippet directory and included from the test (or vice versa). This is a prerequisite for future tests. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Janosch Frank Reviewed-by: Claudio Imbrenda --- s390x/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/s390x/Makefile b/s390x/Makefile index 6e967194ae0d..947a4344738f 100644 --- a/s390x/Makefile +++ b/s390x/Makefile @@ -67,7 +67,7 @@ test_cases: $(tests) test_cases_binary: $(tests_binary) test_cases_pv: $(tests_pv_binary) -INCLUDE_PATHS = $(SRCDIR)/lib $(SRCDIR)/lib/s390x +INCLUDE_PATHS = $(SRCDIR)/lib $(SRCDIR)/lib/s390x $(SRCDIR)/s390x # Include generated header files (e.g. in case of out-of-source builds) INCLUDE_PATHS += lib CPPFLAGS = $(addprefix -I,$(INCLUDE_PATHS)) From patchwork Mon Nov 6 16:37:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13447181 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6950929434 for ; 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Mon, 6 Nov 2023 16:37:40 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CB58C20040; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 915552004D; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) Received: from t35lp63.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 6 Nov 2023 16:37:40 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 7/8] s390x: add a test for SIE without MSO/MSL Date: Mon, 6 Nov 2023 17:37:29 +0100 Message-ID: <20231106163738.1116942-8-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: m9BDRcHBe-TxFOD5KYdj1duX7a2YlP1k X-Proofpoint-ORIG-GUID: 7s6VRp9Ik4pRHTQzaOww4PtcjwoKkq-t X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 adultscore=0 mlxscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 Since we now have the ability to run guests without MSO/MSL, add a test to make sure this doesn't break. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Claudio Imbrenda Reviewed-by: Janosch Frank --- s390x/Makefile | 2 + s390x/sie-dat.c | 111 +++++++++++++++++++++++++++++++++++++ s390x/snippets/c/sie-dat.c | 57 +++++++++++++++++++ s390x/snippets/c/sie-dat.h | 2 + s390x/unittests.cfg | 3 + 5 files changed, 175 insertions(+) create mode 100644 s390x/sie-dat.c create mode 100644 s390x/snippets/c/sie-dat.c create mode 100644 s390x/snippets/c/sie-dat.h diff --git a/s390x/Makefile b/s390x/Makefile index 947a4344738f..f79fd0098312 100644 --- a/s390x/Makefile +++ b/s390x/Makefile @@ -41,6 +41,7 @@ tests += $(TEST_DIR)/migration-sck.elf tests += $(TEST_DIR)/exittime.elf tests += $(TEST_DIR)/ex.elf tests += $(TEST_DIR)/topology.elf +tests += $(TEST_DIR)/sie-dat.elf pv-tests += $(TEST_DIR)/pv-diags.elf pv-tests += $(TEST_DIR)/pv-icptcode.elf @@ -123,6 +124,7 @@ snippet_lib = $(snippet_asmlib) lib/auxinfo.o # perquisites (=guests) for the snippet hosts. # $(TEST_DIR)/.elf: snippets = $(SNIPPET_DIR)//.gbin $(TEST_DIR)/mvpg-sie.elf: snippets = $(SNIPPET_DIR)/c/mvpg-snippet.gbin +$(TEST_DIR)/sie-dat.elf: snippets = $(SNIPPET_DIR)/c/sie-dat.gbin $(TEST_DIR)/spec_ex-sie.elf: snippets = $(SNIPPET_DIR)/c/spec_ex.gbin $(TEST_DIR)/pv-diags.elf: pv-snippets += $(SNIPPET_DIR)/asm/pv-diag-yield.gbin diff --git a/s390x/sie-dat.c b/s390x/sie-dat.c new file mode 100644 index 000000000000..3459fa1ccec3 --- /dev/null +++ b/s390x/sie-dat.c @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Tests SIE with paging. + * + * Copyright 2023 IBM Corp. + * + * Authors: + * Nico Boehr + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "snippets/c/sie-dat.h" + +static struct vm vm; +static pgd_t *guest_root; + +static void test_sie_dat(void) +{ + uint64_t test_page_gpa, test_page_hpa; + uint8_t *test_page_hva, expected_val; + bool contents_match; + uint8_t r1; + + /* guest will tell us the guest physical address of the test buffer */ + sie(&vm); + assert(vm.sblk->icptcode == ICPT_INST && + (vm.sblk->ipa & 0xff00) == 0x8300 && vm.sblk->ipb == 0x9c0000); + + r1 = (vm.sblk->ipa & 0xf0) >> 4; + test_page_gpa = vm.save_area.guest.grs[r1]; + test_page_hpa = virt_to_pte_phys(guest_root, (void*)test_page_gpa); + test_page_hva = __va(test_page_hpa); + report_info("test buffer gpa=0x%lx hva=%p", test_page_gpa, test_page_hva); + + /* guest will now write to the test buffer and we verify the contents */ + sie(&vm); + assert(vm.sblk->icptcode == ICPT_INST && + vm.sblk->ipa == 0x8300 && vm.sblk->ipb == 0x440000); + + contents_match = true; + for (unsigned int i = 0; i < GUEST_TEST_PAGE_COUNT; i++) { + expected_val = 42 + i; + if (test_page_hva[i * PAGE_SIZE] != expected_val) { + report_fail("page %u mismatch actual_val=%x expected_val=%x", + i, test_page_hva[i], expected_val); + contents_match = false; + } + } + report(contents_match, "test buffer contents match"); + + /* the guest will now write to an unmapped address and we check that this causes a segment translation exception */ + report_prefix_push("guest write to unmapped"); + expect_pgm_int(); + sie(&vm); + check_pgm_int_code(PGM_INT_CODE_SEGMENT_TRANSLATION); + report((lowcore.trans_exc_id & PAGE_MASK) == (GUEST_TOTAL_PAGE_COUNT * PAGE_SIZE), "TEID address match"); + report_prefix_pop(); +} + +static void setup_guest(void) +{ + extern const char SNIPPET_NAME_START(c, sie_dat)[]; + extern const char SNIPPET_NAME_END(c, sie_dat)[]; + uint64_t guest_max_addr; + + setup_vm(); + snippet_setup_guest(&vm, false); + + /* allocate a region-1 table */ + guest_root = pgd_alloc_one(); + + /* map guest memory 1:1 */ + guest_max_addr = GUEST_TOTAL_PAGE_COUNT * PAGE_SIZE; + for (uint64_t i = 0; i < guest_max_addr; i += PAGE_SIZE) + install_page(guest_root, __pa(vm.guest_mem + i), (void *)i); + + /* set up storage limit supression - leave mso and msl intact they are ignored anyways */ + vm.sblk->cpuflags |= CPUSTAT_SM; + + /* set up the guest asce */ + vm.save_area.guest.asce = __pa(guest_root) | ASCE_DT_REGION1 | REGION_TABLE_LENGTH; + + snippet_init(&vm, SNIPPET_NAME_START(c, sie_dat), + SNIPPET_LEN(c, sie_dat), SNIPPET_UNPACK_OFF); +} + +int main(void) +{ + report_prefix_push("sie-dat"); + if (!sclp_facilities.has_sief2) { + report_skip("SIEF2 facility unavailable"); + goto done; + } + + setup_guest(); + test_sie_dat(); + sie_guest_destroy(&vm); + +done: + report_prefix_pop(); + return report_summary(); + +} diff --git a/s390x/snippets/c/sie-dat.c b/s390x/snippets/c/sie-dat.c new file mode 100644 index 000000000000..ecfcb60e6b3f --- /dev/null +++ b/s390x/snippets/c/sie-dat.c @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Snippet used by the sie-dat.c test to verify paging without MSO/MSL + * + * Copyright (c) 2023 IBM Corp + * + * Authors: + * Nico Boehr + */ +#include +#include +#include "sie-dat.h" + +static uint8_t test_pages[GUEST_TEST_PAGE_COUNT * PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE))); + +static inline void force_exit(void) +{ + asm volatile("diag 0,0,0x44\n" + : + : + : "memory" + ); +} + +static inline void force_exit_value(uint64_t val) +{ + asm volatile("diag %[val],0,0x9c\n" + : + : [val] "d"(val) + : "memory" + ); +} + +int main(void) +{ + uint8_t *invalid_ptr; + + memset(test_pages, 0, sizeof(test_pages)); + /* tell the host the page's physical address (we're running DAT off) */ + force_exit_value((uint64_t)test_pages); + + /* write some value to the page so the host can verify it */ + for (size_t i = 0; i < GUEST_TEST_PAGE_COUNT; i++) + test_pages[i * PAGE_SIZE] = 42 + i; + + /* indicate we've written all pages */ + force_exit(); + + /* the first unmapped address */ + invalid_ptr = (uint8_t *)(GUEST_TOTAL_PAGE_COUNT * PAGE_SIZE); + *invalid_ptr = 42; + + /* indicate we've written the non-allowed page (should never get here) */ + force_exit(); + + return 0; +} diff --git a/s390x/snippets/c/sie-dat.h b/s390x/snippets/c/sie-dat.h new file mode 100644 index 000000000000..ed3f99f75f9c --- /dev/null +++ b/s390x/snippets/c/sie-dat.h @@ -0,0 +1,2 @@ +#define GUEST_TEST_PAGE_COUNT 10 +#define GUEST_TOTAL_PAGE_COUNT 256 diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg index 68e119e4fcaa..184658ff7d8d 100644 --- a/s390x/unittests.cfg +++ b/s390x/unittests.cfg @@ -247,3 +247,6 @@ file = topology.elf [topology-2] file = topology.elf extra_params = -cpu max,ctop=on -smp sockets=31,cores=8,maxcpus=248 -append '-sockets 31 -cores 8' + +[sie-dat] +file = sie-dat.elf From patchwork Mon Nov 6 16:37:30 2023 Content-Type: text/plain; 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Mon, 6 Nov 2023 16:37:40 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, hca@linux.ibm.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v8 8/8] lib: s390x: interrupt: remove TEID_ASCE defines Date: Mon, 6 Nov 2023 17:37:30 +0100 Message-ID: <20231106163738.1116942-9-nrb@linux.ibm.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231106163738.1116942-1-nrb@linux.ibm.com> References: <20231106163738.1116942-1-nrb@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: LAPY1rBsB3hythmOxt-cBTQbuYbkwphk X-Proofpoint-GUID: itqfF9_xJhgTovifh1FDk0nE_SPsevvl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 impostorscore=0 malwarescore=0 mlxlogscore=828 bulkscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2311060134 These defines were - I can only guess - meant for the asce_id field. Since print_decode_teid() used AS_PRIM and friends instead, I see little benefit in keeping these around. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth Reviewed-by: Claudio Imbrenda Reviewed-by: Janosch Frank --- lib/s390x/asm/interrupt.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index 39b43b64ea07..61d156d56b37 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -13,11 +13,6 @@ #define EXT_IRQ_EXTERNAL_CALL 0x1202 #define EXT_IRQ_SERVICE_SIG 0x2401 -#define TEID_ASCE_PRIMARY 0 -#define TEID_ASCE_AR 1 -#define TEID_ASCE_SECONDARY 2 -#define TEID_ASCE_HOME 3 - union teid { unsigned long val; union {