From patchwork Tue Nov 7 09:57:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Shih X-Patchwork-Id: 13448246 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26AFAC4332F for ; Tue, 7 Nov 2023 09:57:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233767AbjKGJ56 (ORCPT ); Tue, 7 Nov 2023 04:57:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229776AbjKGJ5z (ORCPT ); Tue, 7 Nov 2023 04:57:55 -0500 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22E35F3; Tue, 7 Nov 2023 01:57:53 -0800 (PST) Received: by mail-pg1-x52c.google.com with SMTP id 41be03b00d2f7-577fff1cae6so4027982a12.1; Tue, 07 Nov 2023 01:57:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699351072; x=1699955872; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZgbrRFHSh+56Lz72WSMa9a/GQjYEEMIgbG85FsQ7VvM=; b=A0dK8gczn3t96/AGKSV6Sxz/m2S5pGekhQ3rqcn2AEbxvRuQFQSOQN9E2ZWFdlpDBg d2GZWAGmWX7d3THrXi36SCGfZRDbvkXLHGi6H7DO/8I2w824or61yqsMRhald+xlz7Gi tThtbiBMkhj3g5t+EvCXggoGxpANHW3d8mfgjDq83MLEY3+eMRkMKUrunvK7mjaPQKG8 huVBLrLEv19hHLJKC5w2TZCkj/+d9d4R1P93XEZCWyYPuv8TTuwszHf4uxZMgGcWAwwY cWWLFVt1m1acpUYml2ly869qATizVYOv2E6hEKhOwr68+Qa2uGppADaKJQs12J0+u7Jo BjZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699351072; x=1699955872; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZgbrRFHSh+56Lz72WSMa9a/GQjYEEMIgbG85FsQ7VvM=; b=Zvmk9xFpSCG5wENUWiBwB/Go/2Bf0N1Q1p9L7TiAsoT4hhKXc8Z950m0bqaU9FZ87z 2raQf9hfh/tW0lagsUaJTFDHRtYaK4codTGP1DO0SWlHoXCRhY70mMDrgnWWIJJPIQn9 CLpeJ9fMzvaL2YTA8yo9XOR3kGJMPK5MrZfe+Fd9Y9sWOT5tqmxocsvBAI8vnHt2l2Nu r7JOkGAHDvkWLG9DjVOqFlXiEffAsIsidZtv+lrrYrWHjIL0ebaMat/JBDbKlH4jOy+d HMH6O1i7gYXQ+C8wvuAjKMlzzxEeA538ifq9sI3/WO8T4qo9v5mK6Wg+MxYvbY79uCzR 9EYA== X-Gm-Message-State: AOJu0Yybfe3q8lNEViUn6R5D73VR4BSW1Ouv7fEBsJrwul/CR6tjuuH0 wMN28yWTHK2qwOvuTzng5Yg= X-Google-Smtp-Source: AGHT+IE4XIqoAfBV+HCC9Kf97MpGjZfnQa/4pck/kaH/qnu/cK0s6eQb4lcCpz4FNj7GfX+utmR4Kg== X-Received: by 2002:a17:90b:a01:b0:280:982:aa9f with SMTP id gg1-20020a17090b0a0100b002800982aa9fmr2817165pjb.7.1699351072501; Tue, 07 Nov 2023 01:57:52 -0800 (PST) Received: from localhost.localdomain (2001-b400-e25d-e1ee-eb42-adf3-9163-f337.emome-ip6.hinet.net. [2001:b400:e25d:e1ee:eb42:adf3:9163:f337]) by smtp.gmail.com with ESMTPSA id v13-20020a63f20d000000b0050f85ef50d1sm1078725pgh.26.2023.11.07.01.57.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 01:57:52 -0800 (PST) From: Victor Shih To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, SeanHY.Chen.tu@genesyslogic.com.tw, kai.heng.feng@canonical.com, Victor Shih , Victor Shih , Kai-Heng Feng Subject: [PATCH V3 1/2] mmc: sdhci-pci-gli: GL9750: Mask the replay timer timeout of AER Date: Tue, 7 Nov 2023 17:57:40 +0800 Message-Id: <20231107095741.8832-2-victorshihgli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231107095741.8832-1-victorshihgli@gmail.com> References: <20231107095741.8832-1-victorshihgli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Victor Shih Due to a flaw in the hardware design, the GL9750 replay timer frequently times out when ASPM is enabled. As a result, the warning messages will often appear in the system log when the system accesses the GL9750 PCI config. Therefore, the replay timer timeout must be masked. Fixes: d7133797e9e1 ("mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2") Signed-off-by: Victor Shih Acked-by: Adrian Hunter Acked-by: Kai-Heng Feng --- drivers/mmc/host/sdhci-pci-gli.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index d83261e857a5..3887bfd7386b 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -28,6 +28,9 @@ #define PCI_GLI_9750_PM_CTRL 0xFC #define PCI_GLI_9750_PM_STATE GENMASK(1, 0) +#define PCI_GLI_9750_CORRERR_MASK 0x214 +#define PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12) + #define SDHCI_GLI_9750_CFG2 0x848 #define SDHCI_GLI_9750_CFG2_L1DLY GENMASK(28, 24) #define GLI_9750_CFG2_L1DLY_VALUE 0x1F @@ -561,6 +564,11 @@ static void gl9750_hw_setting(struct sdhci_host *host) value &= ~PCI_GLI_9750_PM_STATE; pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value); + /* mask the replay timer timeout of AER */ + pci_read_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, &value); + value |= PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT; + pci_write_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, value); + gl9750_wt_off(host); } From patchwork Tue Nov 7 09:57:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Shih X-Patchwork-Id: 13448247 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA721C4167B for ; Tue, 7 Nov 2023 09:57:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233778AbjKGJ57 (ORCPT ); Tue, 7 Nov 2023 04:57:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233765AbjKGJ56 (ORCPT ); Tue, 7 Nov 2023 04:57:58 -0500 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31B8D120; Tue, 7 Nov 2023 01:57:56 -0800 (PST) Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-6b7f0170d7bso5470405b3a.2; Tue, 07 Nov 2023 01:57:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699351075; x=1699955875; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SmIG2BB5oMZIMJvfS5LNShy64tFn+UOtZXHaIVjFwZs=; b=GVlv7eSmKEQGnf9xsdYhFN8tsA5Cd/4tWLi0kEvNcbuu46nkcdscHnGNNS1hRDlfvU w9lXVNVp59uZCwNRwiJVCAI/LDYTCFMDYC0waZbkzoEZzkeyrT82ubzAi5M9pwUve5YQ NuRdJy3lUw72PT/4ZgewUuMwmQFU0Ph2cgscFYWK+JOy+UpNzgOSifJB0QQ2BRNcAgQl 4d5JLPuylZ5r3p4/QbvpDtTu92H6cdU9wJHGN5xikEDstH7qjsNGIYlkTFLbrEFMq0JH toOHCZoX2tEujw0/C75TqdqjSYSMgeSeN+fpQw748CHTReCdQOFqx8ZpaTiYh4tHt4vH ajJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699351075; x=1699955875; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SmIG2BB5oMZIMJvfS5LNShy64tFn+UOtZXHaIVjFwZs=; b=YbaRcHPKkbqvXkzxJ4UZAD09hUG2HHhUAig8scysFmes2CytvZfEpIuJCGbsedapdc 9XzoS4tGO15we21W95rsBGu52mc9JGcnzf2iwrXeeEDJ8T5/zrS6oF54pV2CqtwzW+6B qet1oOJrY0Km/ybXe4uLVITsm3lEF+GtBf09+L0H+HiMb3m6lY7kviodsCYcLTwRdwQK LiwzpnYnHmbv2IZxZFM9X/7bDr/tcljjfaW6Q6neIYFT2ey6pdUbdjxV41mMGbjypols LEtJZ+oRq8hmntfL/Yy+UF2U/OT6JYWioxWoNwNVKBEuBnhfDK8fTa0GU3K6WhcC87aT KdQQ== X-Gm-Message-State: AOJu0YzZsbMvQ9HfXFSwQxaGyoB89OIFDBAlTZrfI+2112bIc7Giu5jh epYg3cn4iB2ZeER7FQwr2Ek= X-Google-Smtp-Source: AGHT+IEpitLyg32wwYqZvE6VlxXihLXKM4M1ElZzPqwWcDU/N6x5rrmkmCtZVW9wtgD8sXcew+UYgg== X-Received: by 2002:a05:6a00:1ca6:b0:6c2:c5b6:3963 with SMTP id y38-20020a056a001ca600b006c2c5b63963mr20614535pfw.0.1699351075663; Tue, 07 Nov 2023 01:57:55 -0800 (PST) Received: from localhost.localdomain (2001-b400-e25d-e1ee-eb42-adf3-9163-f337.emome-ip6.hinet.net. [2001:b400:e25d:e1ee:eb42:adf3:9163:f337]) by smtp.gmail.com with ESMTPSA id v13-20020a63f20d000000b0050f85ef50d1sm1078725pgh.26.2023.11.07.01.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 01:57:55 -0800 (PST) From: Victor Shih To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, SeanHY.Chen.tu@genesyslogic.com.tw, kai.heng.feng@canonical.com, Victor Shih , Victor Shih , Kai-Heng Feng Subject: [PATCH V3 2/2] mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AER Date: Tue, 7 Nov 2023 17:57:41 +0800 Message-Id: <20231107095741.8832-3-victorshihgli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231107095741.8832-1-victorshihgli@gmail.com> References: <20231107095741.8832-1-victorshihgli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Victor Shih Due to a flaw in the hardware design, the GL9755 replay timer frequently times out when ASPM is enabled. As a result, the warning messages will often appear in the system log when the system accesses the GL9755 PCI config. Therefore, the replay timer timeout must be masked. Fixes: 36ed2fd32b2c ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2") Signed-off-by: Victor Shih Acked-by: Adrian Hunter Acked-by: Kai-Heng Feng --- drivers/mmc/host/sdhci-pci-gli.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c index 3887bfd7386b..d8a991b349a8 100644 --- a/drivers/mmc/host/sdhci-pci-gli.c +++ b/drivers/mmc/host/sdhci-pci-gli.c @@ -155,6 +155,9 @@ #define PCI_GLI_9755_PM_CTRL 0xFC #define PCI_GLI_9755_PM_STATE GENMASK(1, 0) +#define PCI_GLI_9755_CORRERR_MASK 0x214 +#define PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12) + #define SDHCI_GLI_9767_GM_BURST_SIZE 0x510 #define SDHCI_GLI_9767_GM_BURST_SIZE_AXI_ALWAYS_SET BIT(8) @@ -778,6 +781,11 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot) value &= ~PCI_GLI_9755_PM_STATE; pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value); + /* mask the replay timer timeout of AER */ + pci_read_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, &value); + value |= PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT; + pci_write_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, value); + gl9755_wt_off(pdev); }