From patchwork Wed Nov 8 11:34:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Luo X-Patchwork-Id: 13449855 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAD331095F for ; Wed, 8 Nov 2023 11:35:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="PfQgj3hQ" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 21B42B0; Wed, 8 Nov 2023 03:35:18 -0800 (PST) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3A8BZ6gM010334; Wed, 8 Nov 2023 11:35:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=gEe8vKUE5d8vuTXVVQ+r0YFP2utTSyMT2wTA9gqZ50w=; b=PfQgj3hQPWCkne++lDK4K5kKudSr6VScuL8fSw300B0EMey40Q/asHt6JQ0nptoxAETr TA7rUSW8PjOELjjY2ooAuyY2vxEBiSOBCeo1IBEZ3qoQ7ZyR067yC0ahs4/WJ8YyOUEL 7YOVglLQbneENiK+md0aII81YjGr6P6iYsqJHcsaQrIBFC423hwuACgN5qGq51W+JNfz V3Gqf9wjIgcqjBT0esNJ2N9GGbeGQ8dLtH5VR7uy4GzbDkvR3M8VZ9OY6ALD3LbmcsGr 7MmjF+F4DVQoT19PxVjO+epkkKX0yLcd1xpHcV2xmiVIaVRbtpSyk0UqQZ8j1T+Trqpe Gw== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u7xyu1992-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 08 Nov 2023 11:35:06 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3A8BZ5Hm028913 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 8 Nov 2023 11:35:05 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 8 Nov 2023 03:35:03 -0800 From: Luo Jie To: , , , , , , CC: , Subject: [PATCH v2 1/3] net: phy: at803x: add QCA8084 ethernet phy support Date: Wed, 8 Nov 2023 19:34:43 +0800 Message-ID: <20231108113445.24825-2-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231108113445.24825-1-quic_luoj@quicinc.com> References: <20231108113445.24825-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: YzXibLwLpka9_YHWTF91LExvTSbz_dyA X-Proofpoint-GUID: YzXibLwLpka9_YHWTF91LExvTSbz_dyA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-08_01,2023-11-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 mlxlogscore=779 adultscore=0 suspectscore=0 clxscore=1015 malwarescore=0 phishscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311080097 X-Patchwork-Delegate: kuba@kernel.org Add qca8084 PHY support, which is four-port PHY with maximum link capability 2.5G, the features of each port is almost same as QCA8081 and slave seed config is not needed. Three kind of interface modes supported by qca8084. PHY_INTERFACE_MODE_QUSGMII, PHY_INTERFACE_MODE_2500BASEX and PHY_INTERFACE_MODE_SGMII. The PCS(serdes) and clock are also needed to be configured to bringup qca8084 PHY, which will be added in the pcs driver. The additional CDT configurations used for qca8084. Signed-off-by: Luo Jie Signed-off-by: Vladimir Oltean --- drivers/net/phy/at803x.c | 48 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 37fb033e1c29..f2a0d1688159 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -176,6 +176,7 @@ #define AT8030_PHY_ID_MASK 0xffffffef #define QCA8081_PHY_ID 0x004dd101 +#define QCA8084_PHY_ID 0x004dd180 #define QCA8327_A_PHY_ID 0x004dd033 #define QCA8327_B_PHY_ID 0x004dd034 @@ -1760,6 +1761,9 @@ static bool qca808x_is_prefer_master(struct phy_device *phydev) static bool qca808x_has_fast_retrain_or_slave_seed(struct phy_device *phydev) { + if (phydev_id_compare(phydev, QCA8084_PHY_ID)) + return false; + return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); } @@ -1824,6 +1828,21 @@ static int qca808x_read_status(struct phy_device *phydev) return ret; if (phydev->link) { + /* There are two PCSs available for QCA8084, which support the following + * interface modes. + * + * 1. PHY_INTERFACE_MODE_QUSGMII utilizes PCS1 for all available 4 ports, + * which is for all link speeds. + * + * 2. PHY_INTERFACE_MODE_2500BASEX utilizes PCS0 for the fourth port, + * which is only for the link speed 2500M same as QCA8081. + * + * 3. PHY_INTERFACE_MODE_SGMII utilizes PCS0 for the fourth port, + * which is for the link speed 10M, 100M and 1000M same as QCA8081. + */ + if (phydev->interface == PHY_INTERFACE_MODE_QUSGMII) + return 0; + if (phydev->speed == SPEED_2500) phydev->interface = PHY_INTERFACE_MODE_2500BASEX; else @@ -1958,6 +1977,14 @@ static int qca808x_cable_test_start(struct phy_device *phydev) phy_write_mmd(phydev, MDIO_MMD_PCS, 0x807a, 0xc060); phy_write_mmd(phydev, MDIO_MMD_PCS, 0x807e, 0xb060); + if (phydev_id_compare(phydev, QCA8084_PHY_ID)) { + /* Adjust the positive and negative pulse thereshold of CDT */ + phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8075, 0xa060); + + /* Disable the near echo bypass */ + phy_modify_mmd(phydev, MDIO_MMD_PCS, 0x807f, BIT(15), 0); + } + return 0; } @@ -2227,6 +2254,26 @@ static struct phy_driver at803x_driver[] = { .cable_test_start = qca808x_cable_test_start, .cable_test_get_status = qca808x_cable_test_get_status, .link_change_notify = qca808x_link_change_notify, +}, { + /* Qualcomm QCA8084 */ + PHY_ID_MATCH_MODEL(QCA8084_PHY_ID), + .name = "Qualcomm QCA8084", + .flags = PHY_POLL_CABLE_TEST, + .probe = at803x_probe, + .config_intr = at803x_config_intr, + .handle_interrupt = at803x_handle_interrupt, + .get_tunable = at803x_get_tunable, + .set_tunable = at803x_set_tunable, + .set_wol = at803x_set_wol, + .get_wol = at803x_get_wol, + .get_features = qca808x_get_features, + .config_aneg = at803x_config_aneg, + .suspend = genphy_suspend, + .resume = genphy_resume, + .read_status = qca808x_read_status, + .soft_reset = qca808x_soft_reset, + .cable_test_start = qca808x_cable_test_start, + .cable_test_get_status = qca808x_cable_test_get_status, }, }; module_phy_driver(at803x_driver); @@ -2242,6 +2289,7 @@ static struct mdio_device_id __maybe_unused atheros_tbl[] = { { PHY_ID_MATCH_EXACT(QCA8327_B_PHY_ID) }, { PHY_ID_MATCH_EXACT(QCA9561_PHY_ID) }, { PHY_ID_MATCH_EXACT(QCA8081_PHY_ID) }, + { PHY_ID_MATCH_MODEL(QCA8084_PHY_ID) }, { } }; From patchwork Wed Nov 8 11:34:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Luo X-Patchwork-Id: 13449854 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAD6015E93 for ; Wed, 8 Nov 2023 11:35:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="exO10LX5" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DB40125; 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Wed, 08 Nov 2023 11:35:08 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3A8BZ7xN000523 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 8 Nov 2023 11:35:07 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 8 Nov 2023 03:35:05 -0800 From: Luo Jie To: , , , , , , CC: , Subject: [PATCH v2 2/3] net: phy: at803x: Add qca8084_config_init function Date: Wed, 8 Nov 2023 19:34:44 +0800 Message-ID: <20231108113445.24825-3-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231108113445.24825-1-quic_luoj@quicinc.com> References: <20231108113445.24825-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: fvOzj9TMZvlQ-kSYs1a4LdvOUxBGDe7w X-Proofpoint-GUID: fvOzj9TMZvlQ-kSYs1a4LdvOUxBGDe7w X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-08_01,2023-11-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 adultscore=0 spamscore=0 mlxscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311080097 X-Patchwork-Delegate: kuba@kernel.org Configure MSE detect threshold and ADC clock edge invert. Signed-off-by: Luo Jie --- drivers/net/phy/at803x.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index f2a0d1688159..6bea6e31caaa 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -280,6 +280,15 @@ #define QCA8081_PHY_SERDES_MMD1_FIFO_CTRL 0x9072 #define QCA8081_PHY_FIFO_RSTN BIT(11) +/* QCA8084 ADC clock edge */ +#define QCA8084_ADC_CLK_SEL 0x8b80 +#define QCA8084_ADC_CLK_SEL_ACLK GENMASK(7, 4) +#define QCA8084_ADC_CLK_SEL_ACLK_FALL 0xf +#define QCA8084_ADC_CLK_SEL_ACLK_RISE 0x0 + +#define QCA8084_MSE_THRESHOLD 0x800a +#define QCA8084_MSE_THRESHOLD_2P5G_VAL 0x51c6 + MODULE_DESCRIPTION("Qualcomm Atheros AR803x and QCA808X PHY driver"); MODULE_AUTHOR("Matus Ujhelyi"); MODULE_LICENSE("GPL"); @@ -2077,6 +2086,23 @@ static void qca808x_link_change_notify(struct phy_device *phydev) QCA8081_PHY_FIFO_RSTN, phydev->link ? QCA8081_PHY_FIFO_RSTN : 0); } +static int qca8084_config_init(struct phy_device *phydev) +{ + int ret; + + /* Invert ADC clock edge */ + ret = at803x_debug_reg_mask(phydev, QCA8084_ADC_CLK_SEL, + QCA8084_ADC_CLK_SEL_ACLK, + FIELD_PREP(QCA8084_ADC_CLK_SEL_ACLK, + QCA8084_ADC_CLK_SEL_ACLK_FALL)); + if (ret < 0) + return ret; + + /* Adjust MSE threshold value to avoid link issue with some link partner */ + return phy_write_mmd(phydev, MDIO_MMD_PMAPMD, + QCA8084_MSE_THRESHOLD, QCA8084_MSE_THRESHOLD_2P5G_VAL); +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */ @@ -2274,6 +2300,7 @@ static struct phy_driver at803x_driver[] = { .soft_reset = qca808x_soft_reset, .cable_test_start = qca808x_cable_test_start, .cable_test_get_status = qca808x_cable_test_get_status, + .config_init = qca8084_config_init, }, }; module_phy_driver(at803x_driver); From patchwork Wed Nov 8 11:34:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Luo X-Patchwork-Id: 13449857 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E502A16400 for ; Wed, 8 Nov 2023 11:35:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="eYGDf/zp" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 834CB18E; Wed, 8 Nov 2023 03:35:20 -0800 (PST) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3A8BWFuu015415; Wed, 8 Nov 2023 11:35:11 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=GrB9/H/l5aOxGCY1NFujRRp90fJh11KaZT064mhhhRk=; b=eYGDf/zpyfGTQ1yx4Ahnpsd0dTl6hPI/Fsy5doP+wlbOa50mKK4mOa7PyJSV8/h9C8Fy J/BSvl/YJmzptG08X8IC4s06NCPhWuteWMIALwRiDBAMgoKG82E7Z1YvvXoaQD+OyLfJ G6Ma5hpPVzRsjIbFFODRzRP8ADviapb/EUDzI7yb+XP4YRDFi8yXPsU4Y4uqkSOADkkT AyyKvBxJ5/sGJXqx3pSeQI/zEQ+/9zde2OWbdCVN2qwtxx2rrYRW59Z9+ZfggTzcSZnE vfeNPy7yYRueDePtuWbjAlDl3DwpLWz7mikyxKFF1OrJ6K4tLvWHXhWidFOtBTtyKkaN 3g== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u7w33sf1u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 08 Nov 2023 11:35:11 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3A8BZAYj032330 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 8 Nov 2023 11:35:10 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 8 Nov 2023 03:35:07 -0800 From: Luo Jie To: , , , , , , CC: , Subject: [PATCH v2 3/3] net: phy: qca8084: add qca8084_link_change_notify Date: Wed, 8 Nov 2023 19:34:45 +0800 Message-ID: <20231108113445.24825-4-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231108113445.24825-1-quic_luoj@quicinc.com> References: <20231108113445.24825-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zHjVdxIiVJF4zJw9oCauT2heV9lQolGG X-Proofpoint-GUID: zHjVdxIiVJF4zJw9oCauT2heV9lQolGG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-08_01,2023-11-08_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 suspectscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 bulkscore=0 spamscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311080097 X-Patchwork-Delegate: kuba@kernel.org When the link is changed, qca8084 needs to do the fifo reset and adjust the IPG level for the qusgmii link speed 1000M. Signed-off-by: Luo Jie --- drivers/net/phy/at803x.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 6bea6e31caaa..4906775770b3 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -289,6 +289,13 @@ #define QCA8084_MSE_THRESHOLD 0x800a #define QCA8084_MSE_THRESHOLD_2P5G_VAL 0x51c6 +#define QCA8084_FIFO_CONTROL 0x19 +#define QCA8084_FIFO_MAC_2_PHY BIT(1) +#define QCA8084_FIFO_PHY_2_MAC BIT(0) + +#define QCA8084_MMD7_IPG_OP 0x901d +#define QCA8084_IPG_10_TO_11_EN BIT(0) + MODULE_DESCRIPTION("Qualcomm Atheros AR803x and QCA808X PHY driver"); MODULE_AUTHOR("Matus Ujhelyi"); MODULE_LICENSE("GPL"); @@ -2103,6 +2110,35 @@ static int qca8084_config_init(struct phy_device *phydev) QCA8084_MSE_THRESHOLD, QCA8084_MSE_THRESHOLD_2P5G_VAL); } +static void qca8084_link_change_notify(struct phy_device *phydev) +{ + int ret; + + ret = phy_modify(phydev, QCA8084_FIFO_CONTROL, + QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC, + 0); + if (ret) + return; + + /* If the PHY works on PHY_INTERFACE_MODE_QUSGMII mode, the fifo needs to + * be kept as reset state in link down status. + */ + if (phydev->interface != PHY_INTERFACE_MODE_QUSGMII || phydev->link) { + msleep(50); + ret = phy_modify(phydev, QCA8084_FIFO_CONTROL, + QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC, + QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC); + if (ret) + return; + } + + /* Enable IPG 10 to 11 tuning on link speed 1000M of QUSGMII mode. */ + if (phydev->interface == PHY_INTERFACE_MODE_QUSGMII) + phy_modify_mmd(phydev, MDIO_MMD_AN, QCA8084_MMD7_IPG_OP, + QCA8084_IPG_10_TO_11_EN, + phydev->speed == SPEED_1000 ? QCA8084_IPG_10_TO_11_EN : 0); +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */ @@ -2301,6 +2337,7 @@ static struct phy_driver at803x_driver[] = { .cable_test_start = qca808x_cable_test_start, .cable_test_get_status = qca808x_cable_test_get_status, .config_init = qca8084_config_init, + .link_change_notify = qca8084_link_change_notify, }, }; module_phy_driver(at803x_driver);