From patchwork Tue Nov 14 17:42:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 13455742 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 458B22C1A1 for ; Tue, 14 Nov 2023 17:44:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marek.ca header.i=@marek.ca header.b="FXQ7dxcx" Received: from mail-qk1-x730.google.com (mail-qk1-x730.google.com [IPv6:2607:f8b0:4864:20::730]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A40694 for ; Tue, 14 Nov 2023 09:44:02 -0800 (PST) Received: by mail-qk1-x730.google.com with SMTP id af79cd13be357-778927f2dd3so303723885a.2 for ; Tue, 14 Nov 2023 09:44:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek.ca; s=google; t=1699983841; x=1700588641; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=thGoIvnqITUJB7IQaQsWGdMjOXMrq/akRqtI22GpJyQ=; b=FXQ7dxcxpBSE5zZsFlJRwBYnmmsznxRjIhYT40fqR7x6Yoo/1VV595U4yzi4D9idAt NTZMv5sQPmmA9CWcuAVmjsg6J60Nbjm5mWpmVlsqM8tkOZi60OQypnH4bi6bL7VcvmaL /jGRMbxx8RvMlI/Jo42qIhE0uNlPupx5UxjSlbn5yqr4cfLB5ojoy37+operULioqgWZ ImZIwpjncnWPbjq/QAVrCutJOuk7dSNLzgBL3Kx73PfyaVkod1IO8StGr5YxFrNnL/bl kQ6ZzqHYCBehXckAg+MlHbUmBjnaq1KKqjlsoubk5FCKlz9gjxK6K4OOnG9Orctrc3k7 8MJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699983841; x=1700588641; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=thGoIvnqITUJB7IQaQsWGdMjOXMrq/akRqtI22GpJyQ=; b=Y5cnSbcOULnehsXRmrEUgS9XSgfQ8Z4ft61NiOQjd0/Esfrsp59J9mvSKrIYJCkh79 yGxDtQo5QWGrrEBIr0Dpc3Wgj9yrXHeD5T3WnCKVNbWh5o8lhyZYeglRXtUJj9aVf4+O bbE1YZjGEtvoGf0EXJjVRDbnrXIV0x85zAhr7YfynT3NJPWfgy5eiGCyeq8vvGtgSUht Zkr4ZWIps+vS2GKGy9SlL92UaN6aURuSlBmq3mY+beShvtkm3AG8SB6NrTUXhlu0iMBa s32vWBbKR4HlCb7r83qIIMyibCcGyvdq2+saAUJKTodIGEmlr+XRJ3Q4btKrEoHfuMmZ SFXw== X-Gm-Message-State: AOJu0YygqakgCvRIqh+LkcqnD7T58Jxs0exqzxeQC4fHt7SISztHIlmL jqymWr1d1Oz/6KZvQykVLg8gBQ== X-Google-Smtp-Source: AGHT+IHcVT+p/7lEFZr3H2gf88K+Xif9L02wc8rJZEdi8qlawjVvm/vlqEVvJKZyXLD4cXnfklItEg== X-Received: by 2002:a05:620a:8c0c:b0:775:7e16:2cdf with SMTP id qz12-20020a05620a8c0c00b007757e162cdfmr2232672qkn.39.1699983841236; Tue, 14 Nov 2023 09:44:01 -0800 (PST) Received: from localhost.localdomain (modemcable125.110-19-135.mc.videotron.ca. [135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:00 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , Vinod Koul , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/4] drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC (fix video mode DSC) Date: Tue, 14 Nov 2023 12:42:13 -0500 Message-Id: <20231114174218.19765-1-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Video mode DSC won't work if this field is not set correctly. Set it to fix video mode DSC (for slice_per_pkt==1 cases at least). Fixes: 08802f515c3 ("drm/msm/dsi: Add support for DSC configuration") Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 9d355cdc3ec1..bddc57726fb9 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -847,6 +847,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod u32 slice_per_intf, total_bytes_per_intf; u32 pkt_per_line; u32 eol_byte_num; + u32 bytes_per_pkt; /* first calculate dsc parameters and then program * compress mode registers @@ -854,6 +855,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; + bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ eol_byte_num = total_bytes_per_intf % 3; @@ -891,6 +893,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL, reg_ctrl); dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2); } else { + reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_WC(bytes_per_pkt); dsi_write(msm_host, REG_DSI_VIDEO_COMPRESSION_MODE_CTRL, reg); } } From patchwork Tue Nov 14 17:42:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 13455743 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 418AE2C1A1 for ; Tue, 14 Nov 2023 17:44:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marek.ca header.i=@marek.ca header.b="OC5xPt1k" Received: from mail-qk1-x732.google.com (mail-qk1-x732.google.com [IPv6:2607:f8b0:4864:20::732]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D662D9 for ; Tue, 14 Nov 2023 09:44:05 -0800 (PST) Received: by mail-qk1-x732.google.com with SMTP id af79cd13be357-77891c236fcso378454985a.3 for ; Tue, 14 Nov 2023 09:44:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek.ca; s=google; t=1699983844; x=1700588644; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X/Se8NuL5JKZV2azJTKlvFmjep69ofpc3jvqTI1b0ug=; b=OC5xPt1k3Xh2bhIYSKP0jgJJ2babStSoVDqbwb0oFKt9iN+m7MIjh4YwaXzI3BbOyb 7rEhIXIBV7flKRnqq1K5m4NK57JiKZzbbvwZwQAZJ8/QWbekN+Rmn018z+j63UeDiVjT Own204oYyHBD4tpEg9lvKLhUlBr6uKHx3XtzwdUlMcwSZ/32BRhuyjgqPV2sNh+7WrSl Y82T7pT0vOgoehPmKyetF2Sfx//2I99CaCtoSilF/fFYkGqMdhQqNbiCP3rIg/Fn4FOH oWfWysShI1nUUhCqsaRLFoEVb8Hvvmd6D810VKgPqx4yx4ev4ntm/Uub5oooLmM0mSJX cJnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699983844; x=1700588644; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X/Se8NuL5JKZV2azJTKlvFmjep69ofpc3jvqTI1b0ug=; b=vd39fx07JycD2ndyj+8ZngK7CAlLEzRdIUdNizLQjeDDraebPcTwezMeu4H5oUFTNF eSk5kTT3HimFyo/mk2bJ7l69Mb/V2iqc6fD0lBksDORZ/5FYiKMV9/hT6Z/SE3mk63Xn 1OYjGjey0MXfmyEbfQZOqEhA5gvQE547/BFVTBhPeD/+x0CoufbblohyW3Yjph7/7CZm he4eo+BnIW2p98d7ffspFu7oRdTdi8jPYqTdlUv1QsrDR8U6FjkUtVaoDHpuKUYilOd2 jAZJHOvdwmX/FLqR++kTKN63uKFeewFgEj6gztK2pwNS5YGBk7psSj9BYwT8wO7SKrZH qF+Q== X-Gm-Message-State: AOJu0YxGPDBIKQToLKtKdjQW0jxnFTu5mx+5SeqBzCUfemQKXf/O0Jtb pPE/il7kTWuEohweHOpmtwRu9A== X-Google-Smtp-Source: AGHT+IEVo5nwOKH3fh3lUeHfJPuHsZveyp2ikuoOIr0IRzcdZCJpfEChO6qWMjdi051wikBpH2Rarg== X-Received: by 2002:a05:620a:4627:b0:779:efb4:73bb with SMTP id br39-20020a05620a462700b00779efb473bbmr3357188qkb.41.1699983844031; Tue, 14 Nov 2023 09:44:04 -0800 (PST) Received: from localhost.localdomain (modemcable125.110-19-135.mc.videotron.ca. [135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:03 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/4] drm/msm/dsi: add a comment to explain pkt_per_line encoding Date: Tue, 14 Nov 2023 12:42:14 -0500 Message-Id: <20231114174218.19765-2-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114174218.19765-1-jonathan@marek.ca> References: <20231114174218.19765-1-jonathan@marek.ca> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Make it clear why the pkt_per_line value is being "divided by 2". Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index bddc57726fb9..2ea2fc105fbf 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -875,6 +875,8 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod /* DSI_VIDEO_COMPRESSION_MODE & DSI_COMMAND_COMPRESSION_MODE * registers have similar offsets, so for below common code use * DSI_VIDEO_COMPRESSION_MODE_XXXX for setting bits + * + * pkt_per_line is log2 encoded, >>1 works for supported values (1,2,4) */ reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_PKT_PER_LINE(pkt_per_line >> 1); reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_EOL_BYTE_NUM(eol_byte_num); From patchwork Tue Nov 14 17:42:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 13455744 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A1AB2C194 for ; Tue, 14 Nov 2023 17:44:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marek.ca header.i=@marek.ca header.b="NNOlHeT6" Received: from mail-qk1-x735.google.com (mail-qk1-x735.google.com [IPv6:2607:f8b0:4864:20::735]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3141CD9 for ; Tue, 14 Nov 2023 09:44:08 -0800 (PST) Received: by mail-qk1-x735.google.com with SMTP id af79cd13be357-778a92c06d6so358316785a.2 for ; Tue, 14 Nov 2023 09:44:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek.ca; s=google; t=1699983847; x=1700588647; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jOopcK9K4HsHFD0FhRzafDXESddDDjm1WV41GtBAoVg=; b=NNOlHeT6V2tk7tkOEN1XsYXa+HDykthr64IZi2AdUKw/5/8FEma3YPdRdmQ8IJr6fV hXPM8nnX3GHmpUjtlj/v6ibTby0lLq6D8kblpw3qpJnQd28gXkZ+BjdvHWuw4N39VsSB RQ0vsTE82U3jG09y+fLfsbhN+foHANDwB1qj+0lPZWAQ0VTflCPFD+TnaieOsCdjNFQh PGeEwafnIGRvX7LJzyEebM3zdanpfWKG1rxd+P7NL6/zBaas09YamM45qBHOdewcVwDI WEooIGlLa6R1/6pJhnM0amgjG8amSgiEHB1XAtOLDOwx+MHIGDS8H7Bz/hsjYGp0TKLs 7Wjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699983847; x=1700588647; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jOopcK9K4HsHFD0FhRzafDXESddDDjm1WV41GtBAoVg=; b=YUggoDPgezVEYnYSAz31FQPO+Q9fHYK5aFtTFZP9Mscu0lJUYLsRPvmKe+GQU7QggW hOxnjp1svBcCwQO4Nb1J3jsVl7UHUFbt0mJKMcTJE1a3CC+l8/2BvzieJHZOLzisSH0g hQ+ARV7y73vtHnNpVk4Dso1IwE/cQQLuuRd5k2cVBPltz9rKtwObbV2PxbEONaxzgsbG Uic9SlAIlyVt0pCI5sPCmu6YU7CG8m8iEAKxgbuAQnjq4YuDnBCK9rWxhj8j1C5srsHr Yl0EzsdZkAqosgMrf/d39M6JHiI6yyIAJKJtpui28H4QyehcoF28LLUn2bNdxA0X0Z6z 9zDw== X-Gm-Message-State: AOJu0YwYxp2S0/V8JvZs6GqVi1xXyhS7rZZpz8na+YbQnNFpaWLPAs/Z 5sc1BhMQwz0+s2jsosCu0vwaxw== X-Google-Smtp-Source: AGHT+IEoUWi2pDWF6jdLsDdB9bo4yCiuTcH+dJCQhosEkkKLGNi7bZ3RwGK2wPPoN9/9Te+GQZRRKg== X-Received: by 2002:a05:620a:4453:b0:77b:d90e:dd91 with SMTP id w19-20020a05620a445300b0077bd90edd91mr3857377qkp.46.1699983847240; Tue, 14 Nov 2023 09:44:07 -0800 (PST) Received: from localhost.localdomain (modemcable125.110-19-135.mc.videotron.ca. [135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:07 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 3/4] drm/msm/dsi: support DSC configurations with slice_per_pkt > 1 Date: Tue, 14 Nov 2023 12:42:15 -0500 Message-Id: <20231114174218.19765-3-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114174218.19765-1-jonathan@marek.ca> References: <20231114174218.19765-1-jonathan@marek.ca> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a dsc_slice_per_pkt field to mipi_dsi_device struct and the necessary changes to msm driver to support this field. Note that the removed "pkt_per_line = slice_per_intf * slice_per_pkt" comment is incorrect. Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi_host.c | 25 ++++++++++--------------- include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 2ea2fc105fbf..7284346ab787 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -161,6 +161,7 @@ struct msm_dsi_host { struct drm_display_mode *mode; struct drm_dsc_config *dsc; + unsigned int dsc_slice_per_pkt; /* connected device info */ unsigned int channel; @@ -855,17 +856,10 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; - bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ + bytes_per_pkt = dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt; eol_byte_num = total_bytes_per_intf % 3; - - /* - * Typically, pkt_per_line = slice_per_intf * slice_per_pkt. - * - * Since the current driver only supports slice_per_pkt = 1, - * pkt_per_line will be equal to slice per intf for now. - */ - pkt_per_line = slice_per_intf; + pkt_per_line = slice_per_intf / msm_host->dsc_slice_per_pkt; if (is_cmd_mode) /* packet data type */ reg = DSI_COMMAND_COMPRESSION_MODE_CTRL_STREAM0_DATATYPE(MIPI_DSI_DCS_LONG_WRITE); @@ -1002,12 +996,8 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) else /* * When DSC is enabled, WC = slice_chunk_size * slice_per_pkt + 1. - * Currently, the driver only supports default value of slice_per_pkt = 1 - * - * TODO: Expand mipi_dsi_device struct to hold slice_per_pkt info - * and adjust DSC math to account for slice_per_pkt. */ - wc = msm_host->dsc->slice_chunk_size + 1; + wc = msm_host->dsc->slice_chunk_size * msm_host->dsc_slice_per_pkt + 1; dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL, DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) | @@ -1634,8 +1624,13 @@ static int dsi_host_attach(struct mipi_dsi_host *host, msm_host->lanes = dsi->lanes; msm_host->format = dsi->format; msm_host->mode_flags = dsi->mode_flags; - if (dsi->dsc) + if (dsi->dsc) { msm_host->dsc = dsi->dsc; + msm_host->dsc_slice_per_pkt = dsi->dsc_slice_per_pkt; + /* for backwards compatibility, assume 1 if not set */ + if (!msm_host->dsc_slice_per_pkt) + msm_host->dsc_slice_per_pkt = 1; + } /* Some gpios defined in panel DT need to be controlled by host */ ret = dsi_host_init_panel_gpios(msm_host, &dsi->dev); diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index c9df0407980c..3e32fa52d94b 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -193,6 +193,7 @@ struct mipi_dsi_device { unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; + unsigned int dsc_slice_per_pkt; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" From patchwork Tue Nov 14 17:42:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 13455745 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92B292C194 for ; Tue, 14 Nov 2023 17:44:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marek.ca header.i=@marek.ca header.b="H46kxdtM" Received: from mail-qk1-x72a.google.com (mail-qk1-x72a.google.com [IPv6:2607:f8b0:4864:20::72a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5ED6192 for ; Tue, 14 Nov 2023 09:44:14 -0800 (PST) Received: by mail-qk1-x72a.google.com with SMTP id af79cd13be357-77ba6d5123fso1561585a.0 for ; Tue, 14 Nov 2023 09:44:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek.ca; s=google; t=1699983853; x=1700588653; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LxJSud2bUpEWb5+zdKhsCdpc+jFCEiyn/rkkbqMyRnU=; b=H46kxdtM39JzFf+LiuZsCA4xkC9uXqQPJJmPtN8byJufdLblbxs8j9x84ekLl5Vd6e aMsG4JU+0vI8Pv/bFXzOx5UoA5+ZTlCkWfQltXAe70Spdhb3h1OetvPcn7QRjcMuhWaX HEQz5WszLmr6TEw6wJosYC3CUwUr8TYJ9EpZ2+WsUXzPrjkyZ2KI1RJCSuNzvs08MkQb CifyUDKl6k5fMz2iP9MRTIHx5Y0G7qXmNLzAW3GUozrRUCCIWCZbt7PCSSHiyUHCq9+u tM6F8UN11YjPbSdBEeZv1tvKToSishGG5eHPImFn7u8vMJz0RowHq4bjEOTKqLxKR7bj 6EaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699983853; x=1700588653; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LxJSud2bUpEWb5+zdKhsCdpc+jFCEiyn/rkkbqMyRnU=; b=Rk1RzNGMed/TGr+2NKjR3JAL6IOoWAMm83k9UNnxT3166sPrT7HXVwVVHxgQoyqo6I WP9hpPdXTqK0r+h8XF/dji9/DF7LTKH3Yg8tkt8JZm3bTuY3xa79juKj7JAHRuhXEb3v /1lmOjtUD9qx2aW2PjfZ7Lh/6Lzu++8yoVO3iFefBRlbR0NTu81Hxk7Hxk629EQqIfqz EqbyWHB86AeDE0QZfCD8ydaKIQVNAhDEHTXImytJxs3GplSABg5aVjmY7juus8fH8VpS zN/tsRyHTe0px2cQ7lG4NbcO6ApL+MZ8CcFs57nDkIrJ2jone6k4+Pnu00BwhtUt3qPq 2k3Q== X-Gm-Message-State: AOJu0YxEwFVT88Ug5p56rDjj62mQQm/UYxo4sHuDP2v5LUFtFTv7tShk dOPNEw/Kugcf83TSQgxybK8QdA== X-Google-Smtp-Source: AGHT+IFQfSiyA6caJXGmA0kjldo9K1Mp143S3RfZtOQoQPR93hcHUbZgAlUeJDg/XI9hn6gk8MAd8A== X-Received: by 2002:a05:620a:1993:b0:76c:b7f0:2bc9 with SMTP id bm19-20020a05620a199300b0076cb7f02bc9mr5333777qkb.16.1699983853651; Tue, 14 Nov 2023 09:44:13 -0800 (PST) Received: from localhost.localdomain (modemcable125.110-19-135.mc.videotron.ca. [135.19.110.125]) by smtp.gmail.com with ESMTPSA id bi8-20020a05620a318800b007671cfe8a18sm2833350qkb.13.2023.11.14.09.44.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 09:44:13 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Cc: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Konrad Dybcio , Jiasheng Jiang , Doug Anderson , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 4/4] drm/msm/dsi: fix DSC for the bonded DSI case Date: Tue, 14 Nov 2023 12:42:16 -0500 Message-Id: <20231114174218.19765-4-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114174218.19765-1-jonathan@marek.ca> References: <20231114174218.19765-1-jonathan@marek.ca> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For the bonded DSI case, DSC pic_width and timing calculations should use the width of a single panel instead of the total combined width. Signed-off-by: Jonathan Marek --- drivers/gpu/drm/msm/dsi/dsi.h | 3 ++- drivers/gpu/drm/msm/dsi/dsi_host.c | 20 +++++++++++--------- drivers/gpu/drm/msm/dsi/dsi_manager.c | 2 +- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h index 28379b1af63f..3a641e69447c 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.h +++ b/drivers/gpu/drm/msm/dsi/dsi.h @@ -93,7 +93,8 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host); int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, const struct drm_display_mode *mode); enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, - const struct drm_display_mode *mode); + const struct drm_display_mode *mode, + bool is_bonded_dsi); unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host); int msm_dsi_host_register(struct mipi_dsi_host *host); void msm_dsi_host_unregister(struct mipi_dsi_host *host); diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 7284346ab787..a6286eb9d006 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -938,8 +938,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) mode->hdisplay, mode->vdisplay); return; } - - dsc->pic_width = mode->hdisplay; + dsc->pic_width = hdisplay; dsc->pic_height = mode->vdisplay; DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); @@ -950,6 +949,11 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) if (ret) return; + if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) + dsi_update_dsc_timing(msm_host, false, hdisplay); + else + dsi_update_dsc_timing(msm_host, true, hdisplay); + /* Divide the display by 3 but keep back/font porch and * pulse width same */ @@ -966,9 +970,6 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) } if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) { - if (msm_host->dsc) - dsi_update_dsc_timing(msm_host, false, mode->hdisplay); - dsi_write(msm_host, REG_DSI_ACTIVE_H, DSI_ACTIVE_H_START(ha_start) | DSI_ACTIVE_H_END(ha_end)); @@ -987,9 +988,6 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) DSI_ACTIVE_VSYNC_VPOS_START(vs_start) | DSI_ACTIVE_VSYNC_VPOS_END(vs_end)); } else { /* command mode */ - if (msm_host->dsc) - dsi_update_dsc_timing(msm_host, true, mode->hdisplay); - /* image data and 1 byte write_memory_start cmd */ if (!msm_host->dsc) wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1; @@ -2487,7 +2485,8 @@ int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, } enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, - const struct drm_display_mode *mode) + const struct drm_display_mode *mode, + bool is_bonded_dsi) { struct msm_dsi_host *msm_host = to_msm_dsi_host(host); struct drm_dsc_config *dsc = msm_host->dsc; @@ -2497,6 +2496,9 @@ enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, if (!msm_host->dsc) return MODE_OK; + if (is_bonded_dsi) + pic_width = mode->hdisplay / 2; + if (pic_width % dsc->slice_width) { pr_err("DSI: pic_width %d has to be multiple of slice %d\n", pic_width, dsc->slice_width); diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c index 896f369fdd53..2ca1a7ca3659 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c @@ -455,7 +455,7 @@ static enum drm_mode_status dsi_mgr_bridge_mode_valid(struct drm_bridge *bridge, return MODE_ERROR; } - return msm_dsi_host_check_dsc(host, mode); + return msm_dsi_host_check_dsc(host, mode, IS_BONDED_DSI()); } static const struct drm_bridge_funcs dsi_mgr_bridge_funcs = {