From patchwork Fri Nov 17 05:39:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXUtY2hhbmcgTGVlICjmnY7nprnnkosp?= X-Patchwork-Id: 13458375 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="g8h6SzBp" Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D52A795; Thu, 16 Nov 2023 21:40:02 -0800 (PST) X-UUID: be3034c0850b11eea33bb35ae8d461a2-20231117 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Y9d7TXQIk3+RrPTfENZLQsTLYBMK0/HZ3yBRZwqiBzg=; b=g8h6SzBpXeAUVzVF8WUxqqqTaGSjTrAC39KyplnxBuHL+9VQpUFpmYXrjQa+GKK9+EALRNAJusIzxBFunIFbtTd3BZtjFf7ZhO2qEHhTOa5eBC3vQvWHBWVtPI8kDyTtG9w6GXdDOU8R5PXi81L6CvYBlLxrrJSHegxD+8nYCsU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.33,REQID:dbd4d386-c664-42f7-b6dd-f6ed11f3f93d,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:364b77b,CLOUDID:90dda2fc-4a48-46e2-b946-12f04f20af8c,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: be3034c0850b11eea33bb35ae8d461a2-20231117 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 623218369; Fri, 17 Nov 2023 13:39:57 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 17 Nov 2023 13:39:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 17 Nov 2023 13:39:56 +0800 From: yu-chang.lee To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno CC: Garmin Chang , , , , , , , "yu-chang . lee" Subject: [PATCH v3 1/2] dt-bindings: clock: mediatek: Remove compatible for MT8188 VPPSYS Date: Fri, 17 Nov 2023 13:39:33 +0800 Message-ID: <20231117053934.10571-2-yu-chang.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231117053934.10571-1-yu-chang.lee@mediatek.com> References: <20231117053934.10571-1-yu-chang.lee@mediatek.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N MT8188 VPPSYS 0/1 should be probed from mtk-mmsys driver to populate device by platform_device_register_data then start its own clock driver. Signed-off-by: yu-chang.lee --- .../devicetree/bindings/clock/mediatek,mt8188-clock.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml index d7214d97b2ba..860570320545 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml @@ -43,8 +43,6 @@ properties: - mediatek,mt8188-vdecsys - mediatek,mt8188-vdecsys-soc - mediatek,mt8188-vencsys - - mediatek,mt8188-vppsys0 - - mediatek,mt8188-vppsys1 - mediatek,mt8188-wpesys - mediatek,mt8188-wpesys-vpp0 From patchwork Fri Nov 17 05:39:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXUtY2hhbmcgTGVlICjmnY7nprnnkosp?= X-Patchwork-Id: 13458377 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="WRtQUuyz" Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7642FD4A; Thu, 16 Nov 2023 21:40:06 -0800 (PST) X-UUID: be581940850b11ee8051498923ad61e6-20231117 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=DDgzt+TD+lJqTGXiX5OtoLjS5NStrm3zvY+st4jUBtc=; b=WRtQUuyz+BQJvRXj/jgVKOh5nEAFt3XMix/IUZXC5a0hOG2kjZAYTYt0whvwJENpa0gbzUSkzTRWi7rAltmpXI/xRo2WnrhYRTI88yiTDXkCB8jUlzA2pjc1flWyoHCNlIbyuF0izlGuwbEj7RahStpst4miEmnkTxC38UCyKe8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.33,REQID:b3314205-c12c-4888-83bf-f9d5b1688f34,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:364b77b,CLOUDID:ea7d7f95-10ce-4e4b-85c2-c9b5229ff92b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: be581940850b11ee8051498923ad61e6-20231117 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 478931206; Fri, 17 Nov 2023 13:39:57 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 17 Nov 2023 13:39:56 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 17 Nov 2023 13:39:56 +0800 From: yu-chang.lee To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno CC: Garmin Chang , , , , , , , "yu-chang . lee" Subject: [PATCH v3 2/2] dt-bindings: arm: mediatek: mmsys: Add VPPSYS compatible for MT8188 Date: Fri, 17 Nov 2023 13:39:34 +0800 Message-ID: <20231117053934.10571-3-yu-chang.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231117053934.10571-1-yu-chang.lee@mediatek.com> References: <20231117053934.10571-1-yu-chang.lee@mediatek.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N For MT8188, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be determined by compatible names. Signed-off-by: yu-chang.lee --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 536f5a5ebd24..50324248b965 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -32,6 +32,8 @@ properties: - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys - mediatek,mt8188-vdosys0 + - mediatek,mt8188-vppsys0 + - mediatek,mt8188-vppsys1 - mediatek,mt8192-mmsys - mediatek,mt8195-vdosys1 - mediatek,mt8195-vppsys0