From patchwork Wed Nov 22 16:35:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465250 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nn3B6ZqC" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA28A11F; Wed, 22 Nov 2023 08:56:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700672212; x=1732208212; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+w70dijnIhYAk0vVK1fe5YJSScdtigXGehzr6Lwxbvg=; b=nn3B6ZqCB4UG2LwrxYm48bgHXm2vJJqjTn8Npi8cgHucLkkEb+xXjNQl dBOW+zcKYt4r16/T8FsODItD3hoc6pJhqtDHXSA+N1KahEnAvV4uyf98z XP/sU1y17Q8VicBN6ppcigHxSK6SWZfC/Oqf1PeZlZFsLkX7XUyVGlMBx SaN6JkEXSPPFJ57BQoFHLfRqBxJTIvkC64crQeb8Bt8kKwpScf26uSgq7 M4AmwLNV7zNTW63DhvltHQj7q1OWVcg5sqSxWATSO+DLylfGAsQMAC7B6 2yekQXZuSf5SKGRw6DiapHiqm8rZMsFEjwyeVnfFfm0xPeJWl8plo03H8 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="5235476" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="5235476" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:56:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="857815517" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="857815517" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 22 Nov 2023 08:56:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id E3FE6FD; Wed, 22 Nov 2023 18:40:44 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 01/17] pinctrl: equilibrium: Convert to use struct pingroup Date: Wed, 22 Nov 2023 18:35:33 +0200 Message-ID: <20231122164040.2262742-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The pin control header provides struct pingroup. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-equilibrium.c | 32 +++++++++++++-------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c index 5b5ddf7e5d0e..9202a60b4ec7 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.c +++ b/drivers/pinctrl/pinctrl-equilibrium.c @@ -705,7 +705,7 @@ static int eqbr_build_groups(struct eqbr_pinctrl_drv_data *drvdata) struct device *dev = drvdata->dev; struct device_node *node = dev->of_node; unsigned int *pinmux, pin_id, pinmux_id; - struct group_desc group; + struct pingroup group, *grp = &group; struct device_node *np; struct property *prop; int j, err; @@ -715,55 +715,53 @@ static int eqbr_build_groups(struct eqbr_pinctrl_drv_data *drvdata) if (!prop) continue; - group.num_pins = of_property_count_u32_elems(np, "pins"); - if (group.num_pins < 0) { + grp->npins = of_property_count_u32_elems(np, "pins"); + if (grp->npins < 0) { dev_err(dev, "No pins in the group: %s\n", prop->name); of_node_put(np); return -EINVAL; } - group.name = prop->value; - group.pins = devm_kcalloc(dev, group.num_pins, - sizeof(*(group.pins)), GFP_KERNEL); - if (!group.pins) { + grp->name = prop->value; + grp->pins = devm_kcalloc(dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); + if (!grp->pins) { of_node_put(np); return -ENOMEM; } - pinmux = devm_kcalloc(dev, group.num_pins, sizeof(*pinmux), - GFP_KERNEL); + pinmux = devm_kcalloc(dev, grp->npins, sizeof(*pinmux), GFP_KERNEL); if (!pinmux) { of_node_put(np); return -ENOMEM; } - for (j = 0; j < group.num_pins; j++) { + for (j = 0; j < grp->npins; j++) { if (of_property_read_u32_index(np, "pins", j, &pin_id)) { dev_err(dev, "Group %s: Read intel pins id failed\n", - group.name); + grp->name); of_node_put(np); return -EINVAL; } if (pin_id >= drvdata->pctl_desc.npins) { dev_err(dev, "Group %s: Invalid pin ID, idx: %d, pin %u\n", - group.name, j, pin_id); + grp->name, j, pin_id); of_node_put(np); return -EINVAL; } - group.pins[j] = pin_id; + grp->pins[j] = pin_id; if (of_property_read_u32_index(np, "pinmux", j, &pinmux_id)) { dev_err(dev, "Group %s: Read intel pinmux id failed\n", - group.name); + grp->name); of_node_put(np); return -EINVAL; } pinmux[j] = pinmux_id; } - err = pinctrl_generic_add_group(drvdata->pctl_dev, group.name, - group.pins, group.num_pins, + err = pinctrl_generic_add_group(drvdata->pctl_dev, grp->name, + grp->pins, grp->num_pins, pinmux); if (err < 0) { - dev_err(dev, "Failed to register group %s\n", group.name); + dev_err(dev, "Failed to register group %s\n", grp->name); of_node_put(np); return err; } From patchwork Wed Nov 22 16:35:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465142 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="TpjkR4yb" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5543810F3; 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a="884681493" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681493" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:40:45 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id F1D64387; Wed, 22 Nov 2023 18:40:44 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 02/17] pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP() Date: Wed, 22 Nov 2023 18:35:34 +0200 Message-ID: <20231122164040.2262742-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko Reviewed-by: Jonathan Neuschäfer --- drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c index 0cff44b07b29..4589900244c7 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c +++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c @@ -474,9 +474,8 @@ enum { #undef WPCM450_GRP }; -static struct group_desc wpcm450_groups[] = { -#define WPCM450_GRP(x) { .name = #x, .pins = x ## _pins, \ - .num_pins = ARRAY_SIZE(x ## _pins) } +static struct pingroup wpcm450_groups[] = { +#define WPCM450_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins)) WPCM450_GRPS #undef WPCM450_GRP }; @@ -852,7 +851,7 @@ static int wpcm450_get_group_pins(struct pinctrl_dev *pctldev, const unsigned int **pins, unsigned int *npins) { - *npins = wpcm450_groups[selector].num_pins; + *npins = wpcm450_groups[selector].npins; *pins = wpcm450_groups[selector].pins; return 0; @@ -901,7 +900,7 @@ static int wpcm450_pinmux_set_mux(struct pinctrl_dev *pctldev, struct wpcm450_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); wpcm450_setfunc(pctrl->gcr_regmap, wpcm450_groups[group].pins, - wpcm450_groups[group].num_pins, function); + wpcm450_groups[group].npins, function); return 0; } From patchwork Wed Nov 22 16:35:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465141 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="O1BlsWJy" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACD3710F2; Wed, 22 Nov 2023 08:40:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671255; x=1732207255; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mMbruSBIhN6yytGf1T9i3S2OJs+TIbgzVI2rHK9D8Qk=; b=O1BlsWJyHmLu7qlZSOQ1+NZxyJqVbNdaySGD8rEU6FORi+Cs3BG9iz7e wfmkX7P7AEbWzD0lfXYD+J2LIw6d3FBbudyNoaG5Q2ccwVlauzdLX2cMH cIWlDB1ui2IsR7KAmGFGYFZo6cstdz2evE5KPC4T6DkfDfIhuzZls0AgG tV12H5hx60Iwv8cv+wpcusQz92JaxUcvwZsgDL1FMf11TNtuflSWEMlPD XPWKnLmwJsy3H+GVIUaD/y/7ti7em/zkvu19li/atknxljGMFVWzdLL7e kDKsBykSCMgOwptmog8nQi+6OUv7YtVgYlr76XiHeBaGsepgyo2yQs1j0 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414199" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414199" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:40:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681487" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681487" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:40:46 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 0E42738C; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 03/17] pinctrl: qcom: lpass-lpi: Replace kernel.h with what is being used Date: Wed, 22 Nov 2023 18:35:35 +0200 Message-ID: <20231122164040.2262742-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace kernel.h with what exactly is being used, i.e. array_size.h. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h index 206b2c0ca828..2017bc80314d 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h @@ -6,8 +6,8 @@ #ifndef __PINCTRL_LPASS_LPI_H__ #define __PINCTRL_LPASS_LPI_H__ +#include #include -#include #include "../core.h" From patchwork Wed Nov 22 16:35:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465143 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dSrvO0OH" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5943710F4; Wed, 22 Nov 2023 08:40:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671256; x=1732207256; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dkKQwOmPwkq7+I2jTCgB+WEwrRWIZFNvs71QGtDYw+o=; b=dSrvO0OH6jDCQRqC8nROzgO1wL2BZZTWCJrfajwvf5cSWz7DlGqdc94l KNVyvnPc1UL9mRw6xV3i56UBKfEBiW3pmbxo6Aus89qW+6CH/arTluhbP +jMwRQkDjDVm2j4HpCD3AU2udRcKjvuHRwcdFp5tuJAIfKAGKQClolg+w 0/iDs3XWU7rEfbEE4hFceC0SrL5XpGFUP8rCgMZBCP4rb/2hqOno+yt5/ KCenZIdZj6Vtcw/ZPIsiBJMKwa+/gJpqyFZTdaQ28C4WjXzWY3Tk2ilXF 0dfLTvBUXy+B9+IPWaGuriLVMTcVNmY22KjSuuENBL/qafD6g/ms42hIB Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414220" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414220" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:40:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681501" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681501" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:40:46 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1F34741A; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 04/17] pinctrl: qcom: lpass-lpi: Remove unused member in struct lpi_pingroup Date: Wed, 22 Nov 2023 18:35:36 +0200 Message-ID: <20231122164040.2262742-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The group is not used anywhere, remove it. And if needed, it should be struct pingroup anyway. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 4 ---- .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 16 ------------- .../pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c | 20 ---------------- .../pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c | 20 ---------------- .../pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c | 15 ------------ .../pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c | 16 ------------- .../pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c | 24 ------------------- .../pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c | 24 ------------------- .../pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c | 24 ------------------- 9 files changed, 163 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h index 2017bc80314d..a9b2f65c1ebe 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h @@ -45,11 +45,8 @@ struct pinctrl_pin_desc; #define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \ { \ - .group.name = "gpio" #id, \ - .group.pins = gpio##id##_pins, \ .pin = id, \ .slew_offset = soff, \ - .group.num_pins = ARRAY_SIZE(gpio##id##_pins), \ .funcs = (int[]){ \ LPI_MUX_gpio, \ LPI_MUX_##f1, \ @@ -67,7 +64,6 @@ struct pinctrl_pin_desc; #define LPI_FLAG_SLEW_RATE_SAME_REG BIT(0) struct lpi_pingroup { - struct group_desc group; unsigned int pin; /* Bit offset in slew register for SoundWire pins only */ int slew_offset; diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c index 99156217c6a5..6bb39812e1d8 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c @@ -36,22 +36,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; - static const struct pinctrl_pin_desc sc7280_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c index b33483056f42..c0369baf3398 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c @@ -45,26 +45,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; -static int gpio15_pins[] = { 15 }; -static int gpio16_pins[] = { 16 }; -static int gpio17_pins[] = { 17 }; -static int gpio18_pins[] = { 18 }; - static const struct pinctrl_pin_desc sc8280xp_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c index e8a6f6f6af54..316d6fc69131 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c @@ -36,26 +36,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; -static int gpio15_pins[] = { 15 }; -static int gpio16_pins[] = { 16 }; -static int gpio17_pins[] = { 17 }; -static int gpio18_pins[] = { 18 }; - static const struct pinctrl_pin_desc sm6115_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c index cb10ce8d5d28..9791d9ba5087 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c @@ -36,21 +36,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; - static const struct pinctrl_pin_desc sm8250_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c index 297cc95ac3c0..5b9a2cb216bd 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c @@ -36,22 +36,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; - static const struct pinctrl_pin_desc sm8350_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c index 2e7896791fc0..a028cbb49947 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c @@ -52,30 +52,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; -static int gpio15_pins[] = { 15 }; -static int gpio16_pins[] = { 16 }; -static int gpio17_pins[] = { 17 }; -static int gpio18_pins[] = { 18 }; -static int gpio19_pins[] = { 19 }; -static int gpio20_pins[] = { 20 }; -static int gpio21_pins[] = { 21 }; -static int gpio22_pins[] = { 22 }; - static const struct pinctrl_pin_desc sm8450_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c index 64458c3fbe5e..852192b044e1 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c @@ -52,30 +52,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; -static int gpio15_pins[] = { 15 }; -static int gpio16_pins[] = { 16 }; -static int gpio17_pins[] = { 17 }; -static int gpio18_pins[] = { 18 }; -static int gpio19_pins[] = { 19 }; -static int gpio20_pins[] = { 20 }; -static int gpio21_pins[] = { 21 }; -static int gpio22_pins[] = { 22 }; - static const struct pinctrl_pin_desc sm8550_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), diff --git a/drivers/pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c index 6e4be91ff085..04400c832327 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c @@ -54,30 +54,6 @@ enum lpass_lpi_functions { LPI_MUX__, }; -static int gpio0_pins[] = { 0 }; -static int gpio1_pins[] = { 1 }; -static int gpio2_pins[] = { 2 }; -static int gpio3_pins[] = { 3 }; -static int gpio4_pins[] = { 4 }; -static int gpio5_pins[] = { 5 }; -static int gpio6_pins[] = { 6 }; -static int gpio7_pins[] = { 7 }; -static int gpio8_pins[] = { 8 }; -static int gpio9_pins[] = { 9 }; -static int gpio10_pins[] = { 10 }; -static int gpio11_pins[] = { 11 }; -static int gpio12_pins[] = { 12 }; -static int gpio13_pins[] = { 13 }; -static int gpio14_pins[] = { 14 }; -static int gpio15_pins[] = { 15 }; -static int gpio16_pins[] = { 16 }; -static int gpio17_pins[] = { 17 }; -static int gpio18_pins[] = { 18 }; -static int gpio19_pins[] = { 19 }; -static int gpio20_pins[] = { 20 }; -static int gpio21_pins[] = { 21 }; -static int gpio22_pins[] = { 22 }; - static const struct pinctrl_pin_desc sm8650_lpi_pins[] = { PINCTRL_PIN(0, "gpio0"), PINCTRL_PIN(1, "gpio1"), From patchwork Wed Nov 22 16:35:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465213 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; 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22 Nov 2023 08:51:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="910887962" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="910887962" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2023 08:51:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 2F9CD4F4; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 05/17] pinctrl: core: Add a convenient define PINCTRL_GROUP_DESC() Date: Wed, 22 Nov 2023 18:35:37 +0200 Message-ID: <20231122164040.2262742-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add PINCTRL_GROUP_DESC() macro for inline use. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/core.c | 5 +---- drivers/pinctrl/core.h | 9 +++++++++ 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index f2977eb65522..c0354ea0597a 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -660,10 +660,7 @@ int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, if (!group) return -ENOMEM; - group->name = name; - group->pins = pins; - group->num_pins = num_pins; - group->data = data; + *group = PINCTRL_GROUP_DESC(name, pins, num_pins, data); error = radix_tree_insert(&pctldev->pin_group_tree, selector, group); if (error) diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h index 530370443c19..179948e44016 100644 --- a/drivers/pinctrl/core.h +++ b/drivers/pinctrl/core.h @@ -208,6 +208,15 @@ struct group_desc { void *data; }; +/* Convenience macro to define a generic pin group descriptor */ +#define PINCTRL_GROUP_DESC(_name, _pins, _num_pins, _data) \ +(struct group_desc) { \ + .name = _name, \ + .pins = _pins, \ + .num_pins = _num_pins, \ + .data = _data, \ +} + int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev); const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, From patchwork Wed Nov 22 16:35:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465216 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mAwxvBW+" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9325A10F1; Wed, 22 Nov 2023 08:52:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671928; x=1732207928; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=k/CuwaYQabHIX2TTMtkxSjWVlEzJjCHclcddt/a9src=; b=mAwxvBW+MkOP2UtA9f5BTJMiFv/wmyZD7Dy+IwGiiK4HXYQvBNAycwu+ AxLeafB4lN8LGbbxfWGJqAcIIGP3B8wfGqLxVRt2ntFRjtauGwvV2b5Fw 0LohdHY7lcVKFo9bnO80kK3X99qsplk57SAY15w29fmnWLqjl4lQPm3vO 68h1LWnhPRmuXxYWtVjUo5oDD9/dznKeKYspW9/8NRMQQjUEr4UwIYYoC qg44gLNFyxpOQ3uwtRRapocoGPHYnttrqtUdvrG3567cpyl0FyAYT0oob D6SHqRxGy0zA/417J3F4BgSqLSfIe2QiAQx/sBEKosfBj8JfG9eCcX087 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="5233425" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="5233425" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:51:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="857812956" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="857812956" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 22 Nov 2023 08:51:25 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 40214555; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 06/17] pinctrl: ingenic: Make use of PINCTRL_GROUP_DESC() Date: Wed, 22 Nov 2023 18:35:38 +0200 Message-ID: <20231122164040.2262742-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Make use of PINCTRL_GROUP_DESC() instead of open coding it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-ingenic.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index ee718f6e2556..393873de910a 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -83,15 +83,10 @@ #define JZ4730_PINS_PER_PAIRED_REG 16 #define INGENIC_PIN_GROUP_FUNCS(name, id, funcs) \ - { \ - name, \ - id##_pins, \ - ARRAY_SIZE(id##_pins), \ - funcs, \ - } + PINCTRL_GROUP_DESC(name, id##_pins, ARRAY_SIZE(id##_pins), funcs) #define INGENIC_PIN_GROUP(name, id, func) \ - INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func)) + PINCTRL_GROUP_DESC(name, id##_pins, ARRAY_SIZE(id##_pins), (void *)(func)) enum jz_version { ID_JZ4730, From patchwork Wed Nov 22 16:35:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465144 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Mzv8ibZ7" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDB7E10EC; Wed, 22 Nov 2023 08:41:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671264; x=1732207264; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3nCf9Nawx9DZLMwtP7gm5hKJWHmWiIVjJbmiWUav9q4=; b=Mzv8ibZ7wU2K+chK3WVkXM3uXSfRbrl5TPviLDsVA8GSAHPJvZ4APCcr P9KE/Dcx0nLm0WTMGpsbBw7lPyrAdZsDx681mr5y8EoVOiywD5W2tj+hP UJxKTdv+hYa8AzxzJUFf+dbXYwav5Xc8Unyh4DXDQ8JaPQg0GWU78mT7f 045NHekltEOLJKuQgg5NHfcwTBYeW7HdL7vw54+xfHc46CHJlHjjhW85G Q9Pol6mBWWvH6gaa7zuaTdB8v83H+EbjJWpn4OAsDt+x2PP6aL3fL8QYX MUoOzdByVUnZbZTJjSl9+Dn2AuyEhjkxluOw9VmWqFSNh+dJlIUHaFU8n w==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414286" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414286" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:41:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681574" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681574" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:40:55 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 4D097560; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 07/17] pinctrl: mediatek: Make use of PINCTRL_GROUP_DESC() Date: Wed, 22 Nov 2023 18:35:39 +0200 Message-ID: <20231122164040.2262742-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Make use of PINCTRL_GROUP_DESC() instead of open coding it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mediatek/pinctrl-moore.h | 7 +------ drivers/pinctrl/mediatek/pinctrl-paris.h | 7 +------ 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.h b/drivers/pinctrl/mediatek/pinctrl-moore.h index e1b4b82b9d3d..22ef1ffbcdcb 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.h +++ b/drivers/pinctrl/mediatek/pinctrl-moore.h @@ -38,12 +38,7 @@ } #define PINCTRL_PIN_GROUP(name, id) \ - { \ - name, \ - id##_pins, \ - ARRAY_SIZE(id##_pins), \ - id##_funcs, \ - } + PINCTRL_GROUP_DESC(name, id##_pins, ARRAY_SIZE(id##_pins), id##_funcs) int mtk_moore_pinctrl_probe(struct platform_device *pdev, const struct mtk_pin_soc *soc); diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h b/drivers/pinctrl/mediatek/pinctrl-paris.h index 8762ac599329..f208a904c4a8 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.h +++ b/drivers/pinctrl/mediatek/pinctrl-paris.h @@ -50,12 +50,7 @@ } #define PINCTRL_PIN_GROUP(name, id) \ - { \ - name, \ - id##_pins, \ - ARRAY_SIZE(id##_pins), \ - id##_funcs, \ - } + PINCTRL_GROUP_DESC(name, id##_pins, ARRAY_SIZE(id##_pins), id##_funcs) int mtk_paris_pinctrl_probe(struct platform_device *pdev); From patchwork Wed Nov 22 16:35:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465214 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QkMJVAU1" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57FDED40; Wed, 22 Nov 2023 08:51:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671916; x=1732207916; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d7RiC36q0FYTd81POcZES8vkSbp1GvRz+YFDhzV1grg=; b=QkMJVAU1GXt43bNVeFNBoWhjaSdVIy3l/C5431XVNDl51yJOx+Xy6+Hb RAj3lKxUYP2Gt70wiTI4MvMpv/A8hjlFAkwNnLirA2r5jxkJyFZcGo0+J GbZ5nWmRM90/AwxTMvHCUB+EMp3MR+YePseu1JRGlUeQZPFrOkFwWcCCj F7wKQCiKlkguux46+QGJfZGzQ0Bqz9BtMtRZ7MNNaKKfhxGrFz4uJ3k3K a2P5A4blETTfrms0Fs6uZgQ2IdXHouMQpmVtOMe+6T2AxCXz2h2cF/1FJ R6X/iT3TD8MK5BgBdHUf5I1503Hu6a2o5aJO9UBRydhaMEdR1ByFHbYYQ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="5233367" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="5233367" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:51:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="910887970" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="910887970" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2023 08:51:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5B248592; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 08/17] pinctrl: core: Embed struct pingroup into struct group_desc Date: Wed, 22 Nov 2023 18:35:40 +0200 Message-ID: <20231122164040.2262742-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 struct group_desc is a particular version of the struct pingroup with associated opaque data. Start switching pin control core and drivers to use it explicitly. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/core.c | 15 ++++++++++++--- drivers/pinctrl/core.h | 5 +++++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index c0354ea0597a..981e2e375a39 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -559,7 +559,10 @@ const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, if (!group) return NULL; - return group->name; + if (group->name) + return group->name; + + return group->grp.name; } EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); @@ -585,8 +588,14 @@ int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, return -EINVAL; } - *pins = group->pins; - *num_pins = group->num_pins; + if (group->pins) { + *pins = group->pins; + *num_pins = group->num_pins; + return 0; + } + + *pins = group->grp.pins; + *num_pins = group->grp.npins; return 0; } diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h index 179948e44016..7a21af2b437e 100644 --- a/drivers/pinctrl/core.h +++ b/drivers/pinctrl/core.h @@ -194,14 +194,18 @@ struct pinctrl_maps { #ifdef CONFIG_GENERIC_PINCTRL_GROUPS +#include + /** * struct group_desc - generic pin group descriptor + * @grp: generic data of the pin group (name and pins) * @name: name of the pin group * @pins: array of pins that belong to the group * @num_pins: number of pins in the group * @data: pin controller driver specific data */ struct group_desc { + struct pingroup grp; const char *name; int *pins; int num_pins; @@ -211,6 +215,7 @@ struct group_desc { /* Convenience macro to define a generic pin group descriptor */ #define PINCTRL_GROUP_DESC(_name, _pins, _num_pins, _data) \ (struct group_desc) { \ + .grp = PINCTRL_PINGROUP(_name, _pins, _num_pins), \ .name = _name, \ .pins = _pins, \ .num_pins = _num_pins, \ From patchwork Wed Nov 22 16:35:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465217 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="e0IfeYlX" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D71C1736; Wed, 22 Nov 2023 08:52:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671933; 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22 Nov 2023 08:51:25 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6F228623; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 09/17] pinctrl: bcm: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:41 +0200 Message-ID: <20231122164040.2262742-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/bcm/pinctrl-ns.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/bcm/pinctrl-ns.c b/drivers/pinctrl/bcm/pinctrl-ns.c index d099a7f25f64..6bb2b461950b 100644 --- a/drivers/pinctrl/bcm/pinctrl-ns.c +++ b/drivers/pinctrl/bcm/pinctrl-ns.c @@ -171,8 +171,8 @@ static int ns_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev, if (!group) return -EINVAL; - for (i = 0; i < group->num_pins; i++) - unset |= BIT(group->pins[i]); + for (i = 0; i < group->grp.npins; i++) + unset |= BIT(group->grp.pins[i]); tmp = readl(ns_pinctrl->base); tmp &= ~unset; From patchwork Wed Nov 22 16:35:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465145 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JCsoXkH1" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2AB1410F9; Wed, 22 Nov 2023 08:41:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671266; x=1732207266; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gmx9nuWChebe/DrHmc5bZCzd5Rp0oy/jq7NHLB+ivqw=; b=JCsoXkH1NQRWlgxiIXVudQEn8Na0a30IZDXP8K5hJV/CkrIQY66mKLJD 0MdrrY9oX9vItZ7yqTZD3T+duMjgnXRVi1e/FKuXcGOSHaUEiXhVuDFQF FmFGXvYHvvK0ExZCc5McrUSSeobATefSK5vq6uHE0CXRVw7mWEPhkZyxW HRr66bEdRnCoadMGtjIZHl5med/XsR7a/EfSjYEy1gQoWd0ECLk8ps3KB njS/nodS5lxGgGeYugctL0JYMxjGKgTt3jJHBt0JLP/Q8ikdbtVnR98Np 41UKH9nsr4tYbExuLBaRnU8Kn+X5LZIzO8ajUBEQv+6Z/zLyQ6lVEyuFv A==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414266" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414266" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:41:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681572" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681572" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:40:56 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 82CAB63E; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 10/17] pinctrl: equilibrium: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:42 +0200 Message-ID: <20231122164040.2262742-11-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-equilibrium.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c index 9202a60b4ec7..3e27b23d859c 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.c +++ b/drivers/pinctrl/pinctrl-equilibrium.c @@ -331,8 +331,8 @@ static int eqbr_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; pinmux = grp->data; - for (i = 0; i < grp->num_pins; i++) - eqbr_set_pin_mux(pctl, pinmux[i], grp->pins[i]); + for (i = 0; i < grp->grp.npins; i++) + eqbr_set_pin_mux(pctl, pinmux[i], grp->grp.pins[i]); return 0; } From patchwork Wed Nov 22 16:35:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465146 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="H645iWHb" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7566ED60; Wed, 22 Nov 2023 08:41:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671273; x=1732207273; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S9PopjMUnYzwjGKURdUp+ZGQEbM4U+H2UAWy5ZIaHFk=; b=H645iWHbv6zriE9LOPBuUXYnAC6E1qU11J1gb87n88gTxZKSQoFmJlou zfJ3wWGQINMypyhbMnl31NSHqRsE3YWjaWKse1IJoy1G6gSqgUzUZzoV6 6roiXR0AInponr7BnylD9bSBJevFXBd7jD+IOnu5oOP0rxo/BZxodSvbg 14q+QPfdgPTr+3txHGjnXgj3BoK3gpbMh4bf+7/Y9+6KFyC8cj/QnYsYL Zn8a7hAqT37CO9cSSvPffqa7F7CC0zNkoEenOIvhRjYka1iRJ/3GMttW4 Zujyaa/hYPBfyURrpz0PDd32lI25nxuqgg95A7G2aPXuZ7Q8ecSre42V2 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414328" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414328" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:41:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681647" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681647" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:41:05 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 927D66E3; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 11/17] pinctrl: imx: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:43 +0200 Message-ID: <20231122164040.2262742-12-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/freescale/pinctrl-imx.c | 44 ++++++++++++------------- 1 file changed, 21 insertions(+), 23 deletions(-) diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c index 9bc16943014f..680faa00b623 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx.c +++ b/drivers/pinctrl/freescale/pinctrl-imx.c @@ -42,7 +42,7 @@ static inline const struct group_desc *imx_pinctrl_find_group_by_name( for (i = 0; i < pctldev->num_groups; i++) { grp = pinctrl_generic_get_group(pctldev, i); - if (grp && !strcmp(grp->name, name)) + if (grp && !strcmp(grp->grp.name, name)) break; } @@ -79,9 +79,9 @@ static int imx_dt_node_to_map(struct pinctrl_dev *pctldev, } if (info->flags & IMX_USE_SCU) { - map_num += grp->num_pins; + map_num += grp->grp.npins; } else { - for (i = 0; i < grp->num_pins; i++) { + for (i = 0; i < grp->grp.npins; i++) { pin = &((struct imx_pin *)(grp->data))[i]; if (!(pin->conf.mmio.config & IMX_NO_PAD_CTL)) map_num++; @@ -109,7 +109,7 @@ static int imx_dt_node_to_map(struct pinctrl_dev *pctldev, /* create config map */ new_map++; - for (i = j = 0; i < grp->num_pins; i++) { + for (i = j = 0; i < grp->grp.npins; i++) { pin = &((struct imx_pin *)(grp->data))[i]; /* @@ -263,10 +263,10 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector, if (!func) return -EINVAL; - npins = grp->num_pins; + npins = grp->grp.npins; dev_dbg(ipctl->dev, "enable function %s group %s\n", - func->name, grp->name); + func->name, grp->grp.name); for (i = 0; i < npins; i++) { /* @@ -423,7 +423,7 @@ static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, if (!grp) return; - for (i = 0; i < grp->num_pins; i++) { + for (i = 0; i < grp->grp.npins; i++) { struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i]; name = pin_get_name(pctldev, pin->pin); @@ -510,6 +510,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np, u32 index) { const struct imx_pinctrl_soc_info *info = ipctl->info; + struct pingroup *pgrp = &grp->grp; struct imx_pin *pin; int size, pin_size; const __be32 *list; @@ -524,9 +525,6 @@ static int imx_pinctrl_parse_groups(struct device_node *np, else pin_size = FSL_PIN_SIZE; - /* Initialise group */ - grp->name = np->name; - /* * the binding format is fsl,pins = , * do sanity check and calculate pins number @@ -553,23 +551,24 @@ static int imx_pinctrl_parse_groups(struct device_node *np, return -EINVAL; } - grp->num_pins = size / pin_size; - grp->data = devm_kcalloc(ipctl->dev, - grp->num_pins, sizeof(struct imx_pin), - GFP_KERNEL); - grp->pins = devm_kcalloc(ipctl->dev, - grp->num_pins, sizeof(unsigned int), - GFP_KERNEL); - if (!grp->pins || !grp->data) + /* Initialise group */ + pgrp->npins = size / pin_size; + pgrp->pins = devm_kcalloc(ipctl->dev, pgrp->npins, sizeof(*pgrp->pins), GFP_KERNEL); + if (!pgrp->pins) + return -ENOMEM; + pgrp->name = np->name; + + grp->data = devm_kcalloc(ipctl->dev, pgrp->npins, sizeof(*pin), GFP_KERNEL); + if (!grp->data) return -ENOMEM; - for (i = 0; i < grp->num_pins; i++) { + for (i = 0; i < pgrp->npins; i++) { pin = &((struct imx_pin *)(grp->data))[i]; if (info->flags & IMX_USE_SCU) - info->imx_pinctrl_parse_pin(ipctl, &grp->pins[i], + info->imx_pinctrl_parse_pin(ipctl, &pgrp->pins[i], pin, &list); else - imx_pinctrl_parse_pin_mmio(ipctl, &grp->pins[i], + imx_pinctrl_parse_pin_mmio(ipctl, &pgrp->pins[i], pin, &list, np); } @@ -612,8 +611,7 @@ static int imx_pinctrl_parse_functions(struct device_node *np, i = 0; for_each_child_of_node(np, child) { - grp = devm_kzalloc(ipctl->dev, sizeof(struct group_desc), - GFP_KERNEL); + grp = devm_kzalloc(ipctl->dev, sizeof(*grp), GFP_KERNEL); if (!grp) { of_node_put(child); return -ENOMEM; From patchwork Wed Nov 22 16:35:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465212 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="a9ZmNybD" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FC09F9; 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a="910887955" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="910887955" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2023 08:51:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id AC5237AF; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 12/17] pinctrl: ingenic: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:44 +0200 Message-ID: <20231122164040.2262742-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-ingenic.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 393873de910a..6806fede5df4 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -3756,17 +3756,17 @@ static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; dev_dbg(pctldev->dev, "enable function %s group %s\n", - func->name, grp->name); + func->name, grp->grp.name); mode = (uintptr_t)grp->data; if (mode <= 3) { - for (i = 0; i < grp->num_pins; i++) - ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], mode); + for (i = 0; i < grp->grp.npins; i++) + ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], mode); } else { pin_modes = grp->data; - for (i = 0; i < grp->num_pins; i++) - ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]); + for (i = 0; i < grp->grp.npins; i++) + ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], pin_modes[i]); } return 0; @@ -4293,12 +4293,12 @@ static int __init ingenic_pinctrl_probe(struct platform_device *pdev) for (i = 0; i < chip_info->num_groups; i++) { const struct group_desc *group = &chip_info->groups[i]; + const struct pingroup *grp = &group->grp; - err = pinctrl_generic_add_group(jzpc->pctl, group->name, - group->pins, group->num_pins, group->data); + err = pinctrl_generic_add_group(jzpc->pctl, grp->name, grp->pins, grp->npins, + group->data); if (err < 0) { - dev_err(dev, "Failed to register group %s\n", - group->name); + dev_err(dev, "Failed to register group %s\n", grp->name); return err; } } From patchwork Wed Nov 22 16:35:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465147 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mEweqi9s" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D15810C7; Wed, 22 Nov 2023 08:41:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671275; x=1732207275; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2IJ5RkmvKb06y4Pls/nYVezIgr9GrpPlE4qXI9p0tOg=; b=mEweqi9sFj9kJx1OhGjlXbj2L+Z2b287QDX23g8ECuUAYiq+ogPd9IEU NiuEE0N2J8lto8tk+AEuDpU5kZRpmZqxh6Ppzw+sDxQtF55rULI/3YfVr fMHPtkAYW9BM6GeaLJwp2yCNd0BkvC7ArPWtKe0H3f1ghdLBiz4YzoeMw g1mVSZLr7kIzBp9ONdhQtxz0n0nSkOKjm9X9Kxjuanj16e5XaPwryC7SF uVkNowjx4bTC5c8ELKm3hKGmHvE1fg4F7p7lqmlRG7l5NG5oedDaDR6mA B1/BkDCvRgU1Ht+tH3OA2HhOIsbgABtjuTwc2WcMUB5GEeIwSGaP1Pzjd g==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414350" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414350" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:41:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681649" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681649" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:41:05 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id B90287E4; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 13/17] pinctrl: keembay: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:45 +0200 Message-ID: <20231122164040.2262742-14-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-keembay.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-keembay.c b/drivers/pinctrl/pinctrl-keembay.c index 152c35bce8ec..ace61f8e8936 100644 --- a/drivers/pinctrl/pinctrl-keembay.c +++ b/drivers/pinctrl/pinctrl-keembay.c @@ -945,7 +945,7 @@ static int keembay_set_mux(struct pinctrl_dev *pctldev, unsigned int fun_sel, return -EINVAL; /* Change modes for pins in the selected group */ - pin = *grp->pins; + pin = *grp->grp.pins; pin_mode = *(u8 *)(func->data); val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin); @@ -1528,12 +1528,11 @@ static int keembay_build_groups(struct keembay_pinctrl *kpc) /* Each pin is categorised as one group */ for (i = 0; i < kpc->ngroups; i++) { const struct pinctrl_pin_desc *pdesc = keembay_pins + i; - struct group_desc *kmb_grp = grp + i; + struct pingroup *pgrp = &grp[i].grp; - kmb_grp->name = pdesc->name; - kmb_grp->pins = (int *)&pdesc->number; - pinctrl_generic_add_group(kpc->pctrl, kmb_grp->name, - kmb_grp->pins, 1, NULL); + pgrp->name = pdesc->name; + pgrp->pins = (int *)&pdesc->number; + pinctrl_generic_add_group(kpc->pctrl, pgrp->name, pgrp->pins, 1, NULL); } return 0; From patchwork Wed Nov 22 16:35:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465215 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XjMO7sYC" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7C4DA2; Wed, 22 Nov 2023 08:51:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671916; x=1732207916; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=liPHDLuYbD94sAXW+HKE2PmyEtAsJEMqj1/hueiHOBE=; b=XjMO7sYC81KyqnSsw5QB8p42fyFjtcichmPfXyBTyPeAXCBB+/Vo8awy UhBM7PNCNgMkKCzw8trsTcEx8YPy+UMtf3QR/VVUb2Qi4cbLp7bsOHNvb U7incF+iSKWGgYG8nYatTXQG5ySqV0xJpqT1SkYVm5XEriRABhfKSlt6B mcy1x4yLZCBQGZ1Jk70Ei1tSAQSIkRZQ/tgBAWaLXyEpSbv4D9P9jbFAh 6k08ATRCoAD3FKrFg/V2z40xbcKiQDSoaQbUnFsqcqVjTIUO6FRtgsc8L n/QapkR6icu/jysB3eNaf0PSAj7KkrI00rIsJiBHY4uzX2DF19kUMSHfU A==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="5233337" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="5233337" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:51:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="910887968" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="910887968" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2023 08:51:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id C55678D6; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 14/17] pinctrl: mediatek: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:46 +0200 Message-ID: <20231122164040.2262742-15-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mediatek/pinctrl-moore.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c index c3d59eddd994..d972584c0519 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -56,12 +56,12 @@ static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; dev_dbg(pctldev->dev, "enable function %s group %s\n", - func->name, grp->name); + func->name, grp->grp.name); - for (i = 0; i < grp->num_pins; i++) { + for (i = 0; i < grp->grp.npins; i++) { const struct mtk_pin_desc *desc; int *pin_modes = grp->data; - int pin = grp->pins[i]; + int pin = grp->grp.pins[i]; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; if (!desc->name) @@ -602,13 +602,12 @@ static int mtk_build_groups(struct mtk_pinctrl *hw) for (i = 0; i < hw->soc->ngrps; i++) { const struct group_desc *group = hw->soc->grps + i; + const struct pingroup *grp = &group->grp; - err = pinctrl_generic_add_group(hw->pctrl, group->name, - group->pins, group->num_pins, + err = pinctrl_generic_add_group(hw->pctrl, grp->name, grp->pins, grp->npins, group->data); if (err < 0) { - dev_err(hw->dev, "Failed to register group %s\n", - group->name); + dev_err(hw->dev, "Failed to register group %s\n", grp->name); return err; } } From patchwork Wed Nov 22 16:35:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465211 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lmaeE/Wf" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B66D8E7; Wed, 22 Nov 2023 08:51:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671899; x=1732207899; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OXF8QWtk6BJLVhGwMk5+UIaDLR26JucJQ+nr7p9zeKQ=; b=lmaeE/WfOL4I1Q44fDWmIz22KfnnrQv/c7XR3+A92D/QfLk2QQcgSVQg Pl963GggqbpAmEZAPZX+aLOe7uGdX60Hk2Aai62ua+HITibI1V4TNUEF6 ZoZ3/qWo7lh2j04tQPcD/4C9sSAX3UuWKe/MEnALBqwncIj25wKC4DgBL 2VfiSFvbfFaAinVAp4O/pSpk9DMwXn2TmUBEJTe2M64258oppM/Lxg61m /iXia5XI2ZbKf1mGtEj37GXIJ4O4VWhp+3o7ydKoQgCTRs65MHxhG4JS5 CtvKbfgEzXa8sU2Zku/D+a2hwMCSEDtaMAlqRuVR1xixsH8w/hep5YNHo Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="396016625" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="396016625" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:51:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="837489025" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="837489025" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 22 Nov 2023 08:51:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id D20638FE; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 15/17] pinctrl: renesas: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:47 +0200 Message-ID: <20231122164040.2262742-16-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/renesas/pinctrl-rza1.c | 2 +- drivers/pinctrl/renesas/pinctrl-rza2.c | 10 +++++----- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 ++-- drivers/pinctrl/renesas/pinctrl-rzv2m.c | 4 ++-- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c index ab334de89b69..b03f22c54ca8 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza1.c +++ b/drivers/pinctrl/renesas/pinctrl-rza1.c @@ -1131,7 +1131,7 @@ static int rza1_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, return -EINVAL; mux_confs = (struct rza1_mux_conf *)func->data; - for (i = 0; i < grp->num_pins; ++i) { + for (i = 0; i < grp->grp.npins; ++i) { int ret; ret = rza1_pin_mux_single(rza1_pctl, &mux_confs[i]); diff --git a/drivers/pinctrl/renesas/pinctrl-rza2.c b/drivers/pinctrl/renesas/pinctrl-rza2.c index 990b96d45967..af689d7c117f 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza2.c +++ b/drivers/pinctrl/renesas/pinctrl-rza2.c @@ -447,15 +447,15 @@ static int rza2_set_mux(struct pinctrl_dev *pctldev, unsigned int selector, psel_val = func->data; - for (i = 0; i < grp->num_pins; ++i) { + for (i = 0; i < grp->grp.npins; ++i) { dev_dbg(priv->dev, "Setting P%c_%d to PSEL=%d\n", - port_names[RZA2_PIN_ID_TO_PORT(grp->pins[i])], - RZA2_PIN_ID_TO_PIN(grp->pins[i]), + port_names[RZA2_PIN_ID_TO_PORT(grp->grp.pins[i])], + RZA2_PIN_ID_TO_PIN(grp->grp.pins[i]), psel_val[i]); rza2_set_pin_function( priv->base, - RZA2_PIN_ID_TO_PORT(grp->pins[i]), - RZA2_PIN_ID_TO_PIN(grp->pins[i]), + RZA2_PIN_ID_TO_PORT(grp->grp.pins[i]), + RZA2_PIN_ID_TO_PIN(grp->grp.pins[i]), psel_val[i]); } diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 9de350ad7e7d..511247e70371 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -283,9 +283,9 @@ static int rzg2l_pinctrl_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; psel_val = func->data; - pins = group->pins; + pins = group->grp.pins; - for (i = 0; i < group->num_pins; i++) { + for (i = 0; i < group->grp.npins; i++) { unsigned int *pin_data = pctrl->desc.pins[pins[i]].drv_data; u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data); u32 pin = RZG2L_PIN_ID_TO_PIN(pins[i]); diff --git a/drivers/pinctrl/renesas/pinctrl-rzv2m.c b/drivers/pinctrl/renesas/pinctrl-rzv2m.c index 21d7d5ac8c4a..62f3924f5bea 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzv2m.c +++ b/drivers/pinctrl/renesas/pinctrl-rzv2m.c @@ -175,9 +175,9 @@ static int rzv2m_pinctrl_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; psel_val = func->data; - pins = group->pins; + pins = group->grp.pins; - for (i = 0; i < group->num_pins; i++) { + for (i = 0; i < group->grp.npins; i++) { dev_dbg(pctrl->dev, "port:%u pin: %u PSEL:%u\n", RZV2M_PIN_ID_TO_PORT(pins[i]), RZV2M_PIN_ID_TO_PIN(pins[i]), psel_val[i]); From patchwork Wed Nov 22 16:35:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465148 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eRvLkWgD" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9807B1711; Wed, 22 Nov 2023 08:41:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671282; x=1732207282; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7v2CAg5DroP23VK/yC7/YkMVF79slYQ+EVkLEfbZi+o=; b=eRvLkWgD55A3lR2H3RQvijRU+zMBl2J3pGjGIOCNPcebds4S+Xp/Ni4t 7JOXhCaKCmqpAtlF4f5HHNrH49jlyB3Ae5X7drEg6ekIZH/yiyURfQjL1 HXak57+OFObBKIb8eJfuScgeKi0iDG3wYDpXBMFgZsly20NywULgUfpJQ BawWE5Rhub0Rpznwpmv0JAS059gBw+ujvnu47hsOXahiJuJrQdGvmBNSM UjVZfkRMEG7xDgHKDGSzbAd2stRoF9d14nOdbDDCTGRphrXO8fAyphRgf FKoG4xrDG6ul3oefacjkJqX8QxsHrmNHw11k2+BazAqwXEt7ymjzELujZ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="456414396" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="456414396" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:41:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="884681699" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="884681699" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:41:13 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id DF13E9EF; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 16/17] pinctrl: starfive: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:48 +0200 Message-ID: <20231122164040.2262742-17-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c | 8 ++++---- drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c b/drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c index ea70b8c61679..21bfbbaede72 100644 --- a/drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jh7100.c @@ -654,7 +654,7 @@ static int starfive_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; pinmux = group->data; - for (i = 0; i < group->num_pins; i++) { + for (i = 0; i < group->grp.npins; i++) { u32 v = pinmux[i]; unsigned int gpio = starfive_pinmux_to_gpio(v); u32 dout = starfive_pinmux_to_dout(v); @@ -797,7 +797,7 @@ static int starfive_pinconf_group_get(struct pinctrl_dev *pctldev, if (!group) return -EINVAL; - return starfive_pinconf_get(pctldev, group->pins[0], config); + return starfive_pinconf_get(pctldev, group->grp.pins[0], config); } static int starfive_pinconf_group_set(struct pinctrl_dev *pctldev, @@ -876,8 +876,8 @@ static int starfive_pinconf_group_set(struct pinctrl_dev *pctldev, } } - for (i = 0; i < group->num_pins; i++) - starfive_padctl_rmw(sfp, group->pins[i], mask, value); + for (i = 0; i < group->grp.npins; i++) + starfive_padctl_rmw(sfp, group->grp.pins[i], mask, value); return 0; } diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c b/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c index 9d71e8c13310..60160965cd29 100644 --- a/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c @@ -307,7 +307,7 @@ static int jh7110_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; pinmux = group->data; - for (i = 0; i < group->num_pins; i++) { + for (i = 0; i < group->grp.npins; i++) { u32 v = pinmux[i]; if (info->jh7110_set_one_pin_mux) @@ -437,7 +437,7 @@ static int jh7110_pinconf_group_get(struct pinctrl_dev *pctldev, if (!group) return -EINVAL; - return jh7110_pinconf_get(pctldev, group->pins[0], config); + return jh7110_pinconf_get(pctldev, group->grp.pins[0], config); } static int jh7110_pinconf_group_set(struct pinctrl_dev *pctldev, @@ -508,8 +508,8 @@ static int jh7110_pinconf_group_set(struct pinctrl_dev *pctldev, } } - for (i = 0; i < group->num_pins; i++) - jh7110_padcfg_rmw(sfp, group->pins[i], mask, value); + for (i = 0; i < group->grp.npins; i++) + jh7110_padcfg_rmw(sfp, group->grp.pins[i], mask, value); return 0; } From patchwork Wed Nov 22 16:35:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13465149 X-Patchwork-Delegate: geert@linux-m68k.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nwADh+b9" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62E80D59; Wed, 22 Nov 2023 08:41:26 -0800 (PST) DKIM-Signature: v=1; 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d="scan'208";a="884681708" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 22 Nov 2023 08:41:14 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id EC530A04; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 17/17] pinctrl: core: Remove unused members from struct group_desc Date: Wed, 22 Nov 2023 18:35:49 +0200 Message-ID: <20231122164040.2262742-18-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 All drivers are converted to use embedded struct pingroup. Remove unused members from struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/core.c | 9 --------- drivers/pinctrl/core.h | 9 --------- 2 files changed, 18 deletions(-) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 981e2e375a39..d3458284b9de 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -559,9 +559,6 @@ const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, if (!group) return NULL; - if (group->name) - return group->name; - return group->grp.name; } EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); @@ -588,12 +585,6 @@ int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, return -EINVAL; } - if (group->pins) { - *pins = group->pins; - *num_pins = group->num_pins; - return 0; - } - *pins = group->grp.pins; *num_pins = group->grp.npins; diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h index 7a21af2b437e..7af74bfaff0e 100644 --- a/drivers/pinctrl/core.h +++ b/drivers/pinctrl/core.h @@ -199,16 +199,10 @@ struct pinctrl_maps { /** * struct group_desc - generic pin group descriptor * @grp: generic data of the pin group (name and pins) - * @name: name of the pin group - * @pins: array of pins that belong to the group - * @num_pins: number of pins in the group * @data: pin controller driver specific data */ struct group_desc { struct pingroup grp; - const char *name; - int *pins; - int num_pins; void *data; }; @@ -216,9 +210,6 @@ struct group_desc { #define PINCTRL_GROUP_DESC(_name, _pins, _num_pins, _data) \ (struct group_desc) { \ .grp = PINCTRL_PINGROUP(_name, _pins, _num_pins), \ - .name = _name, \ - .pins = _pins, \ - .num_pins = _num_pins, \ .data = _data, \ }