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([2804:7f0:b402:7782:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id v13-20020aa7808d000000b006cb9f436232sm6392316pff.114.2023.11.26.21.21.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Nov 2023 21:21:54 -0800 (PST) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, peter.maydell@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: thuth@redhat.com, gustavo.romero@linaro.org Subject: [PATCH 1/4] Add ivshmem-flat device Date: Mon, 27 Nov 2023 05:20:21 +0000 Message-Id: <20231127052024.435743-2-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127052024.435743-1-gustavo.romero@linaro.org> References: <20231127052024.435743-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::344; envelope-from=gustavo.romero@linaro.org; helo=mail-ot1-x344.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add a new device, ivshmem-flat, which is similar to the ivshmem PCI but does not require a PCI bus. It's meant to be used on machines like those with Cortex-M MCUs, which usually lack a PCI/PCIe bus, e.g. lm3s6965evb and mps2-an385. The device currently only supports the sysbus bus. The following is an example on how to create the ivshmem-flat device on a Stellaris machine: $ qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -chardev socket,path=/tmp/ivshmem_socket,id=ivf -device ivshmem-flat,x-irq-qompath=/machine/unattached/device[1]/nvic/unnamed-gpio-in[0],x-bus-qompath="/sysbus",chardev=ivf -kernel zephyr_qemu.elf The new device, just like the ivshmem PCI device, supports both peer notification via hardware interrupts and shared memory. The IRQ QOM path for the target machine can be determined by creating the VM without the ivshmem-flat device, going to the QEMU console and listing the QOM nodes with 'info qom-tree'. In the Stellaris example above the input IRQ is in the NVIC IC. The MMRs for status and control (notification) are mapped to the MMIO region at 0x400FF000 (default), whilst the shared memory region start is mapped at addr. 0x40100000 (default), but both addresses can be set when creating the device by using 'x-bus-address-{mmr,shmem}' options, respectively. The device shared memory size can be set using the 'shmem-size' option and it defaults to 4 MiB, which is the default size of shmem allocated by the ivshmem server. Signed-off-by: Gustavo Romero --- docs/system/devices/ivshmem-flat.rst | 89 +++++ hw/arm/mps2.c | 2 + hw/arm/stellaris.c | 5 +- hw/arm/virt.c | 2 + hw/core/sysbus-fdt.c | 1 + hw/misc/Kconfig | 5 + hw/misc/ivshmem-flat.c | 477 +++++++++++++++++++++++++++ hw/misc/meson.build | 2 + hw/misc/trace-events | 18 + include/hw/misc/ivshmem-flat.h | 72 ++++ 10 files changed, 672 insertions(+), 1 deletion(-) create mode 100644 docs/system/devices/ivshmem-flat.rst create mode 100644 hw/misc/ivshmem-flat.c create mode 100644 include/hw/misc/ivshmem-flat.h diff --git a/docs/system/devices/ivshmem-flat.rst b/docs/system/devices/ivshmem-flat.rst new file mode 100644 index 0000000000..a10446a18f --- /dev/null +++ b/docs/system/devices/ivshmem-flat.rst @@ -0,0 +1,89 @@ +Inter-VM Shared Memory Flat Device +---------------------------------- + +The ivshmem-flat device is meant to be used on machines that lack a PCI bus, +making them unsuitable for the use of the traditional ivshmem device modeled as +a PCI device. Machines like those with a Cortex-M MCU are good candidates to use +the ivshmem-flat device. Also, since the flat version maps the control and +status registers directly to the memory, it requires a quite tiny "device +driver" to interact with other VMs, which is useful in some RTOSes, like +Zephyr, which usually run on constrained resource targets. + +Similar to the ivshmem device, the ivshmem-flat device supports both peer +notification via HW interrupts and Inter-VM shared memory. This allows the +device to be used together with the traditional ivshmem, enabling communication +between, for instance, an aarch64 VM (using the traditional ivshmem device and +running Linux), and an arm VM (using the ivshmem-flat device and running Zephyr +instead). + +The ivshmem-flat device does not support the use of a ``memdev`` option (see +ivshmem.rst for more details). It relies on the ivshmem server to create and +distribute the proper shared memory file descriptor and the eventfd(s) to notify +(interrupt) the peers. Therefore, to use this device, it is always necessary to +have an ivshmem server up and running for proper device creation. + +Although the ivshmem-flat supports both peer notification (interrupts) and +shared memory, the interrupt mechanism is optional. If no input IRQ is +specified for the device it is disabled, preventing the VM from notifying or +being notified by other VMs (a warning will be displayed to the user to inform +the IRQ mechanism is disabled). The shared memory region is always present. + +The MMRs (INTRMASK, INTRSTATUS, IVPOSITION, and DOORBELL registers) offsets at +the MMR region, and their functions, follow the ivshmem spec, so they work +exactly as in the ivshmem PCI device (see ./specs/ivshmem-spec.txt). + + +Device Options +-------------- + +The only required options to create an ivshmem-flat device are: (a) the UNIX +socket where the ivshmem server is listening, usually ``/tmp/ivshmem_socket``; +and (b) the bus type to be used by the device, which currently only supports +"/sysbus" bus type. + +Example: + +.. parsed-literal:: + + |qemu-system-arm| -chardev socket,path=/tmp/ivshmem_socket,id=ivshmem_flat -device ivshmem-flat,x-bus-qompath="/sysbus",chardev=ivshmem_flat + +The other options are for fine tuning the device. + +``x-irq-qompath``. Used to inform the device which IRQ input line it can attach +to enable the notification mechanism (IRQ). The ivshmem-flat device currently +only supports notification via vector 0, ignoring other vectors. + +Two examples for different machines follow. + +Stellaris machine (``- machine lm3s6965evb``): + +:: + + x-irq-qompath=/machine/unattached/device[1]/nvic/unnamed-gpio-in[0] + +Arm mps2-an385 machine (``-machine mps2-an385``): + +:: + + x-irq-qompath=/machine/armv7m/nvic/unnamed-gpio-in[0] + +The available IRQ input lines on a given VM that the ivshmem-flat device can be +attached to can be inspected from the QEMU monitor (Ctrl-a + c) with: + +(qemu) info qom-tree + +``x-bus-address-mmr``. Allows changing the address where the MMRs are mapped +into the VM memory layout. Default is 0x400FF000, but this address might be +already taken on some VMs, hence it's necessary to adjust the MMR location on +some VMs. + + ``x-bus-address-shmem``. Allows changing the address where the shared memory +region is mapped into the VM memory layout. Default is 0x40100000, but this +address might be already taken on some VMs, hence it's necessary to adjust the +shared memory location. + +``shmem-size``. Allows changing the size (in bytes) of shared memroy region. +Default is 4 MiB, which is the same default value used by the ivshmem server, so +usually it's not necessary to change it. The size must match the size of the +shared memory reserverd and informed by the ivshmem server, otherwise device +creation fails. diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index d92fd60684..2bd0e6ba6e 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -474,6 +474,8 @@ static void mps2_class_init(ObjectClass *oc, void *data) mc->max_cpus = 1; mc->default_ram_size = 16 * MiB; mc->default_ram_id = "mps.ram"; + + machine_class_allow_dynamic_sysbus_dev(mc, "ivshmem-flat"); } static void mps2_an385_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index f7e99baf62..792b7b57c1 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -28,6 +28,7 @@ #include "hw/watchdog/cmsdk-apb-watchdog.h" #include "migration/vmstate.h" #include "hw/misc/unimp.h" +#include "hw/misc/ivshmem-flat.h" #include "hw/timer/stellaris-gptm.h" #include "hw/qdev-clock.h" #include "qom/object.h" @@ -720,7 +721,7 @@ static void stellaris_adc_fifo_write(StellarisADCState *s, int n, { int head; - /* TODO: Real hardware has limited size FIFOs. We have a full 16 entry + /* TODO: Real hardware has limited size FIFOs. We have a full 16 entry FIFO fir each sequencer. */ head = (s->fifo[n].state >> 4) & 0xf; if (s->fifo[n].state & STELLARIS_ADC_FIFO_FULL) { @@ -1344,6 +1345,8 @@ static void lm3s6965evb_class_init(ObjectClass *oc, void *data) mc->init = lm3s6965evb_init; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_IVSHMEM_FLAT); } static const TypeInfo lm3s6965evb_type = { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a13c658bbf..e26f9b54f8 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -80,6 +80,7 @@ #include "hw/virtio/virtio-iommu.h" #include "hw/char/pl011.h" #include "qemu/guest-random.h" +#include "hw/misc/ivshmem-flat.h" #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -2938,6 +2939,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE); machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM); + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_IVSHMEM_FLAT); #ifdef CONFIG_TPM machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); #endif diff --git a/hw/core/sysbus-fdt.c b/hw/core/sysbus-fdt.c index eebcd28f9a..af43b67577 100644 --- a/hw/core/sysbus-fdt.c +++ b/hw/core/sysbus-fdt.c @@ -495,6 +495,7 @@ static const BindingEntry bindings[] = { TYPE_BINDING(TYPE_TPM_TIS_SYSBUS, add_tpm_tis_fdt_node), #endif TYPE_BINDING(TYPE_RAMFB_DEVICE, no_fdt_node), + TYPE_BINDING("ivshmem-flat", no_fdt_node), TYPE_BINDING("", NULL), /* last element */ }; diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 6996d265e4..701df866ba 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -63,6 +63,11 @@ config IVSHMEM_DEVICE default y if PCI_DEVICES depends on PCI && LINUX && IVSHMEM && MSI_NONBROKEN +config IVSHMEM_FLAT_DEVICE + bool + default y + depends on LINUX && IVSHMEM + config ECCMEMCTL bool select ECC diff --git a/hw/misc/ivshmem-flat.c b/hw/misc/ivshmem-flat.c new file mode 100644 index 0000000000..31731a38cf --- /dev/null +++ b/hw/misc/ivshmem-flat.c @@ -0,0 +1,477 @@ +/* + * Inter-VM Shared Memory Flat Device + * + * SPDX-FileCopyrightText: 2023 Linaro Ltd. + * SPDX-FileContributor: Gustavo Romero + * SPDX-License-Identifier: GPL-2.0-or-later + * + */ + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "qemu/error-report.h" +#include "qemu/module.h" +#include "qapi/error.h" +#include "hw/irq.h" +#include "hw/qdev-properties-system.h" +#include "hw/sysbus.h" +#include "chardev/char-fe.h" +#include "exec/address-spaces.h" +#include "trace.h" + +#include "hw/misc/ivshmem-flat.h" + +static int64_t ivshmem_flat_recv_msg(IvshmemFTState *s, int *pfd) +{ + int64_t msg; + int n, ret; + + n = 0; + do { + ret = qemu_chr_fe_read_all(&s->server_chr, (uint8_t *)&msg + n, + sizeof(msg) - n); + if (ret < 0) { + if (ret == -EINTR) { + continue; + } + exit(1); + } + n += ret; + } while (n < sizeof(msg)); + + *pfd = qemu_chr_fe_get_msgfd(&s->server_chr); + return le64_to_cpu(msg); +} + +static void ivshmem_flat_irq_handler(void *opaque) +{ + VectorInfo *vi = opaque; + EventNotifier *e = &vi->event_notifier; + uint16_t vector_id; + const VectorInfo (*v)[64]; + + assert(e->initialized); + + vector_id = vi->id; + + /* + * The vector info struct is passed to the handler via the 'opaque' pointer. + * This struct pointer allows the retrieval of the vector ID and its + * associated event notifier. However, for triggering an interrupt using + * qemu_set_irq, it's necessary to also have a pointer to the device state, + * i.e., a pointer to the IvshmemFTState struct. Since the vector info + * struct is contained within the IvshmemFTState struct, its pointer can be + * used to obtain the pointer to IvshmemFTState through simple pointer math. + */ + v = (void *)(vi - vector_id); /* v = &IvshmemPeer->vector[0] */ + IvshmemPeer *own_peer = container_of(v, IvshmemPeer, vector); + IvshmemFTState *s = container_of(own_peer, IvshmemFTState, own); + + /* Clear event */ + if (!event_notifier_test_and_clear(e)) { + return; + } + + trace_ivshmem_flat_irq_handler(vector_id); + + /* + * Toggle device's output line, which is connected to interrupt controller, + * generating an interrupt request to the CPU. + */ + qemu_set_irq(s->irq, true); + qemu_set_irq(s->irq, false); +} + +static IvshmemPeer *ivshmem_flat_find_peer(IvshmemFTState *s, uint16_t peer_id) +{ + IvshmemPeer *peer; + + /* Own ID */ + if (s->own.id == peer_id) { + return &s->own; + } + + /* Peer ID */ + QTAILQ_FOREACH(peer, &s->peer, next) { + if (peer->id == peer_id) { + return peer; + } + } + + return NULL; +} + +static IvshmemPeer *ivshmem_flat_add_peer(IvshmemFTState *s, uint16_t peer_id) +{ + IvshmemPeer *new_peer; + + new_peer = g_malloc0(sizeof(*new_peer)); + new_peer->id = peer_id; + new_peer->vector_counter = 0; + + QTAILQ_INSERT_TAIL(&s->peer, new_peer, next); + + trace_ivshmem_flat_new_peer(peer_id); + + return new_peer; +} + +static void ivshmem_flat_remove_peer(IvshmemFTState *s, uint16_t peer_id) +{ + IvshmemPeer *peer; + + peer = ivshmem_flat_find_peer(s, peer_id); + assert(peer); + + QTAILQ_REMOVE(&s->peer, peer, next); + for (int n = 0; n < peer->vector_counter; n++) { + int efd; + efd = event_notifier_get_fd(&(peer->vector[n].event_notifier)); + close(efd); + } + + g_free(peer); +} + +static void ivshmem_flat_add_vector(IvshmemFTState *s, IvshmemPeer *peer, int vector_fd) +{ + if (peer->vector_counter >= IVSHMEM_MAX_VECTOR_NUM) { + trace_ivshmem_flat_add_vector_failure(peer->vector_counter, vector_fd, peer->id); + close(vector_fd); + + return; + } + + trace_ivshmem_flat_add_vector_success(peer->vector_counter, vector_fd, peer->id); + + /* + * Set vector ID and its associated eventfd notifier and add them to the + * peer. + */ + peer->vector[peer->vector_counter].id = peer->vector_counter; + g_unix_set_fd_nonblocking(vector_fd, true, NULL); + event_notifier_init_fd(&peer->vector[peer->vector_counter].event_notifier, vector_fd); + + /* + * If it's the device's own ID, register also the handler for the eventfd so + * the device can be notified by the other peers. + */ + if (peer == &s->own) { + qemu_set_fd_handler(vector_fd, ivshmem_flat_irq_handler, NULL, &peer->vector); + } + + peer->vector_counter++; +} + +static void ivshmem_flat_process_msg(IvshmemFTState *s, uint64_t msg, int fd) { + uint16_t peer_id; + IvshmemPeer *peer; + + peer_id = msg & 0xFFFF; + peer = ivshmem_flat_find_peer(s, peer_id); + + if (!peer) { + peer = ivshmem_flat_add_peer(s, peer_id); + } + + if (fd >= 0) { + ivshmem_flat_add_vector(s, peer, fd); + } else { /* fd == -1, which is received when peers disconnect. */ + ivshmem_flat_remove_peer(s, peer_id); + } +} + +static int ivshmem_flat_can_receive_data(void *opaque) +{ + IvshmemFTState *s = opaque; + + assert(s->msg_buffered_bytes < sizeof(s->msg_buf)); + return sizeof(s->msg_buf) - s->msg_buffered_bytes; +} + +static void ivshmem_flat_read_msg(void *opaque, const uint8_t *buf, int size) +{ + IvshmemFTState *s = opaque; + int fd; + int64_t msg; + + assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf)); + memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size); + s->msg_buffered_bytes += size; + if (s->msg_buffered_bytes < sizeof(s->msg_buf)) { + return; + } + msg = le64_to_cpu(s->msg_buf); + s->msg_buffered_bytes = 0; + + fd = qemu_chr_fe_get_msgfd(&s->server_chr); + + ivshmem_flat_process_msg(s, msg, fd); +} + +/* + * Message sequence from server on new connection: + * _____________________________________ + * |STEP| uint64_t msg | int fd | + * ------------------------------------- + * + * 0 PROTOCOL -1 \ + * 1 OWN PEER ID -1 |-- Header/Greeting + * 2 -1 shmem fd / + * + * 3 PEER IDx Other peer's Vector 0 eventfd + * 4 PEER IDx Other peer's Vector 1 eventfd + * . . + * . . + * . . + * N PEER IDy Other peer's Vector 0 eventfd + * N+1 PEER IDy Other peer's Vector 1 eventfd + * . . + * . . + * . . + * + * ivshmem_flat_recv_msg() calls return 'msg' and 'fd'. + * + * See ./docs/specs/ivshmem-spec.txt for details on the protocol. + */ +static void ivshmem_flat_realize(DeviceState *dev, Error **errp) { + IvshmemFTState *s = IVSHMEM_FLAT(dev); + + int64_t protocol_version, msg; + int fd, shmem_fd, vector_fd; + uint16_t peer_id; + + /* Input IRQ line, in the IRQ controller or CPU. */ + Object *oirq; + bool ambiguous = false; + + /* Device requires sysbus. */ + if (s->bus_qompath) { + if (strcmp(s->bus_qompath, "/sysbus")) { + error_setg(errp, "ivshmem-flat requires '/sysbus' bus."); + return; + } + } else { + error_setg(errp, "Bus not specified. Use 'x-bus-qompath' to specify the bus type."); + return; + } + + /* Check for input IRQ line, if it's provided, connect it. */ + if (s->irq_qompath) { + oirq = object_resolve_path_type(s->irq_qompath, TYPE_IRQ, &ambiguous); + if (ambiguous) { + error_setg(errp, "Specified IRQ is ambiguous. Can't create ivshmem-flat device."); + return; + } + + if (!oirq) { + error_setg(errp, "Can't resolve IRQ QOM path."); + return; + } else { + trace_ivshmem_flat_irq_resolved(s->irq_qompath); + } + + /* Connect device out irq line to interrupt controller input irq line. */ + qdev_connect_gpio_out_named(dev, "irq-output", 0, (qemu_irq)(oirq)); + + if (qemu_irq_is_connected((qemu_irq)(oirq))) { + trace_ivshmem_flat_irq_connected(); + } + } else { + /* + * If input IRQ is not provided, warn user the device won't be able to trigger any + * interrupts. + */ + warn_report("Input IRQ not specified, device won't be able to handle IRQs!"); + } + + /* Check ivshmem server connection. */ + if (!qemu_chr_fe_backend_connected(&s->server_chr)) { + error_setg(errp, "ivshmem server socket not specified or incorret. Can't create device.\n"); + return; + } + + /* Step 0 */ + protocol_version = ivshmem_flat_recv_msg(s, &fd); + + /* Step 1 */ + msg = ivshmem_flat_recv_msg(s, &vector_fd); + peer_id = 0xFFFF & msg; + s->own.id = peer_id; + s->own.vector_counter = 0; + + trace_ivshmem_flat_proto_ver_own_id(protocol_version, s->own.id); + + /* Step 2 */ + msg = ivshmem_flat_recv_msg(s, &shmem_fd); + /* Map shmem fd and MMRs into memory regions. */ + if (msg == -1 && shmem_fd >= 0) { + struct stat fdstat; + + if (fstat(shmem_fd, &fdstat) != 0) { + error_setg(errp, "Could not determine shmem fd size. Can't create device!"); + + return; + } + trace_ivshmem_flat_shmem_size(fdstat.st_size); + + /* Shmem size provided by the ivshmem server must be equal to device's shmem size. */ + if (fdstat.st_size != s->shmem_size) { + error_setg(errp, "Can't map shmem fd: shmem size different from device size!"); + return; + } else { + trace_ivshmem_flat_shmem_addr(shmem_fd, s->bus_address_shmem); + memory_region_init_ram_from_fd(&s->shmem, OBJECT(s), "ivshmem-shmem", fdstat.st_size, + RAM_SHARED, shmem_fd, 0, NULL); + memory_region_add_subregion(get_system_memory(), s->bus_address_shmem, &s->shmem); + + trace_ivshmem_flat_mmr_addr(s->bus_address_mmr); + sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, s->bus_address_mmr); + } + } + + /* + * Beyond step 2 ivshmem_process_msg, called by ivshmem_flat_read_msg handler -- when data is + * available on the server socket -- will handle the additional messages that will be generated + * by the server as peers connect or disconnect. + */ + qemu_chr_fe_set_handlers(&s->server_chr, ivshmem_flat_can_receive_data, ivshmem_flat_read_msg, + NULL, NULL, s, NULL, true); +} + +static uint64_t ivshmem_flat_iomem_read(void *opaque, hwaddr offset, unsigned size) +{ + IvshmemFTState *s = opaque; + uint32_t ret; + + trace_ivshmem_flat_read_mmr(offset); + + switch (offset) + { + case INTMASK: + ret = 0; /* Ignore read since all bits are reserved in rev 1. */ + break; + case INTSTATUS: + ret = 0; /* Ignore read since all bits are reserved in rev 1. */ + break; + case IVPOSITION: + ret = s->own.id; + break; + case DOORBELL: + trace_ivshmem_flat_read_mmr_doorbell(); /* DOORBELL is write-only */ + ret = 0; + break; + default: + /* Should never reach out here due to iomem map range being exact. */ + trace_ivshmem_flat_read_write_mmr_invalid(offset); + ret = 0; + } + + return ret; +} + +static int ivshmem_flat_interrupt_peer(IvshmemFTState *s, uint16_t peer_id, uint16_t vector_id) +{ + IvshmemPeer *peer; + + peer = ivshmem_flat_find_peer(s, peer_id); + if (!peer) { + trace_ivshmem_flat_interrupt_invalid_peer(peer_id); + return 1; + } + + event_notifier_set(&(peer->vector[vector_id].event_notifier)); + + return 0; +} + +static void ivshmem_flat_iomem_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) +{ + IvshmemFTState *s = opaque; + uint16_t peer_id = (value >> 16) & 0xFFFF; + uint16_t vector_id = value & 0xFFFF; + + trace_ivshmem_flat_write_mmr(offset); + + switch (offset) { + case INTMASK: + break; + case INTSTATUS: + break; + case IVPOSITION: + break; + case DOORBELL: + trace_ivshmem_flat_interrupt_peer(peer_id, vector_id); + ivshmem_flat_interrupt_peer(s, peer_id, vector_id); + break; + default: + /* Should never reach out here due to iomem map range being exact. */ + trace_ivshmem_flat_read_write_mmr_invalid(offset); + break; + } + + return; +} + +static const MemoryRegionOps ivshmem_flat_ops = { + .read = ivshmem_flat_iomem_read, + .write = ivshmem_flat_iomem_write, + .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { /* Read/write aligned at 32 bits. */ + .min_access_size = 4, + .max_access_size = 4, + }, +}; + +static void ivshmem_flat_instance_init(Object *obj) +{ + DeviceState *dev = DEVICE(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + IvshmemFTState *s = IVSHMEM_FLAT(obj); + + /* Init mem region for 4 MMRs (ivshmem_registers), 32 bits each => 16 bytes (0x10) */ + memory_region_init_io(&s->iomem, obj, &ivshmem_flat_ops, s, "ivshmem-mmr", 0x10); + sysbus_init_mmio(sbd, &s->iomem); + + /* Create one output IRQ that will be connect to the machine's interrupt controller. */ + qdev_init_gpio_out_named(dev, &s->irq, "irq-output", 1); + + QTAILQ_INIT(&s->peer); +} + +static Property ivshmem_flat_props[] = { + DEFINE_PROP_CHR("chardev", IvshmemFTState, server_chr), + DEFINE_PROP_UINT32("shmem-size", IvshmemFTState, shmem_size, 4194304), /* 4 MiB */ + DEFINE_PROP_STRING("x-irq-qompath", IvshmemFTState, irq_qompath), + DEFINE_PROP_STRING("x-bus-qompath", IvshmemFTState, bus_qompath), + DEFINE_PROP_UINT64("x-bus-address-mmr", IvshmemFTState, bus_address_mmr, 0x400FF000), + DEFINE_PROP_UINT64("x-bus-address-shmem", IvshmemFTState, bus_address_shmem, 0x40100000), + DEFINE_PROP_END_OF_LIST(), +}; + +static void ivshmem_flat_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->hotpluggable = true; + dc->user_creatable = true; + dc->realize = ivshmem_flat_realize; + + set_bit(DEVICE_CATEGORY_MISC, dc->categories); + device_class_set_props(dc, ivshmem_flat_props); +} + +static const TypeInfo ivshmem_flat_info = { + .name = TYPE_IVSHMEM_FLAT, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(IvshmemFTState), + .instance_init = ivshmem_flat_instance_init, + .class_init = ivshmem_flat_class_init, +}; + +static void ivshmem_flat_register_types(void) +{ + type_register_static(&ivshmem_flat_info); +} + +type_init(ivshmem_flat_register_types); diff --git a/hw/misc/meson.build b/hw/misc/meson.build index d9a370c1de..7b03fc1345 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -36,7 +36,9 @@ system_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.c')) subdir('macio') +# ivshmem devices system_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem.c')) +system_ss.add(when: 'CONFIG_IVSHMEM_FLAT_DEVICE', if_true: files('ivshmem-flat.c')) system_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c')) system_ss.add(when: 'CONFIG_ALLWINNER_A10_CCM', if_true: files('allwinner-a10-ccm.c')) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index e8b2be14c0..19a75c4d45 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -301,3 +301,21 @@ virt_ctrl_instance_init(void *dev) "ctrl: %p" lasi_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" lasi_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" lasi_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" + +# ivshmem-flat.c +ivshmem_flat_irq_handler(uint16_t vector_id) "Caught interrupt request: vector %d" +ivshmem_flat_new_peer(uint16_t peer_id) "New peer ID: %d" +ivshmem_flat_add_vector_failure(uint16_t vector_id, uint32_t vector_fd, uint16_t peer_id) "Failed to add vector %d (fd = %d) to peer ID %d, maximum number of vectors reached" +ivshmem_flat_add_vector_success(uint16_t vector_id, uint32_t vector_fd, uint16_t peer_id) "Successful addition of vector %d (fd = %d) to peer ID %d" +ivshmem_flat_irq_resolved(const char *irq_qompath) "IRQ QOM path '%s' correctly resolved" +ivshmem_flat_irq_connected(void) "Device IRQ output line connected to Interrupt Controller IRQ input line" +ivshmem_flat_proto_ver_own_id(uint64_t proto_ver, uint16_t peer_id) "Protocol Version = %lx, Own Peer ID = %d" +ivshmem_flat_shmem_size(uint64_t size) "Shmem fd total size is %ld byte(s)" +ivshmem_flat_shmem_addr(uint32_t fd, uint64_t addr) "Mapping shmem fd (%d) @ %#lx" +ivshmem_flat_mmr_addr(uint64_t addr) "Mapping MMRs @ %#lx" +ivshmem_flat_read_mmr(uint64_t addr_offset) "Read access at offset %ld" +ivshmem_flat_read_mmr_doorbell(void) "DOORBELL register is write-only!" +ivshmem_flat_read_write_mmr_invalid(uint64_t addr_offset) "No ivshmem register mapped at offset %ld" +ivshmem_flat_interrupt_invalid_peer(uint16_t peer_id) "Can't interrupt non-existing peer %d" +ivshmem_flat_write_mmr(uint64_t addr_offset) "Write access at offset %ld" +ivshmem_flat_interrupt_peer(uint16_t peer_id, uint16_t vector_id) "Interrupting peer ID %d, vector %d..." diff --git a/include/hw/misc/ivshmem-flat.h b/include/hw/misc/ivshmem-flat.h new file mode 100644 index 0000000000..2f6f7462f6 --- /dev/null +++ b/include/hw/misc/ivshmem-flat.h @@ -0,0 +1,72 @@ +/* + * Inter-VM Shared Memory Flat Device + * + * SPDX-FileCopyrightText: 2023 Linaro Ltd. + * SPDX-FileContributor: Gustavo Romero + * SPDX-License-Identifier: GPL-2.0-or-later + * + */ + +#ifndef IVSHMEM_FLAT_H +#define IVSHMEM_FLAT_H + +#define IVSHMEM_MAX_VECTOR_NUM 64 + +#define TYPE_IVSHMEM_FLAT "ivshmem-flat" +typedef struct IvshmemFTState IvshmemFTState; + +DECLARE_INSTANCE_CHECKER(IvshmemFTState, IVSHMEM_FLAT, TYPE_IVSHMEM_FLAT) + +/* Ivshmem registers. See ./docs/specs/ivshmem-spec.txt for details. */ +enum ivshmem_registers { + INTMASK = 0, + INTSTATUS = 4, + IVPOSITION = 8, + DOORBELL = 12, +}; + +typedef struct VectorInfo { + EventNotifier event_notifier; + uint16_t id; +} VectorInfo; + +typedef struct IvshmemPeer { + QTAILQ_ENTRY(IvshmemPeer) next; + VectorInfo vector[IVSHMEM_MAX_VECTOR_NUM]; + int vector_counter; + uint16_t id; +} IvshmemPeer; + +struct IvshmemFTState { + SysBusDevice parent_obj; + + uint64_t msg_buf; + int msg_buffered_bytes; + + QTAILQ_HEAD(, IvshmemPeer) peer; + IvshmemPeer own; + + CharBackend server_chr; + + char *bus_qompath; + + /* IRQ */ + qemu_irq irq; + char *irq_qompath; + + /* MMRs */ + MemoryRegion iomem; + uint64_t bus_address_mmr; + uint32_t intmask; + uint32_t intstatus; + uint32_t ivposition; + uint32_t doorbell; + + /* Shared memory */ + MemoryRegion shmem; + int shmem_fd; + uint32_t shmem_size; + uint64_t bus_address_shmem; +}; + +#endif /* IVSHMEM_FLAT_H */ From patchwork Mon Nov 27 05:20:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 13469071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E150C4167B for ; Mon, 27 Nov 2023 05:23:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r7U4P-0004SW-89; Mon, 27 Nov 2023 00:22:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r7U4L-0004SG-Ud for qemu-devel@nongnu.org; Mon, 27 Nov 2023 00:22:06 -0500 Received: from mail-oa1-x41.google.com ([2001:4860:4864:20::41]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r7U4J-0008BG-Lg for qemu-devel@nongnu.org; Mon, 27 Nov 2023 00:22:05 -0500 Received: by mail-oa1-x41.google.com with SMTP id 586e51a60fabf-1fa25d9cddbso914344fac.1 for ; Sun, 26 Nov 2023 21:22:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701062522; x=1701667322; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ypraAgK9dC15p7zOrjfOuMTYBF2BK9MBqFt+ed7oWgM=; b=R7A17RlpFU7UTMgVmxPNs2lW1MMuAoQUIyPlTCU8Df7cIZpOmyCgNRZtHGpDs5fmiJ CtW0pdYGUFGlYp0zNRHQY66sHrwvjevkA5g+bsLYVQlUwzW7fvQf9jM5AjgeyOjcKBf1 +OMqqEEKFPyMIIPMmUUEOicHaaeBTNwENofIZlgLUgaCigH9K6kTx1rDjHB/4j5OYaHV BS1HxLkfp1o9XX/4d5/1qGkWfP6Xg0Po04bJv5CWzWeX0Fmobt6ajj1kgwhenFhpp0aQ V4HuWzohecyzvEWEpX6jpdYKw7PEi9+7D3KI/XzlEDHEak4j/qSzg7kQMd70X3vvpKA/ e1gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701062522; x=1701667322; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ypraAgK9dC15p7zOrjfOuMTYBF2BK9MBqFt+ed7oWgM=; b=P8DfBpnc92Zrx7HTWHmsOGABTw4Xt7Timpq/+QQTIUbw+VDaj3iGAYAiKSn5TZUnbF zLOO/hgFEW992P20J+QZRSlvBSklB8pz4ujAu/GydhRwcGbBIdkMLO1gn3PZgbmkPO/t NYySWc2nCc9PX3Q20AAdOFIHrxPAeuBI6XEkCc1UQbxqrd83VXJ6TBTixTfhXdEvxdZF pNTtArATtJAs5DuguYG2OEfbBcNRTOwghA1DXzgp2NBO5Qy3vz8F11+xj0EVjvEES+AI deCoBXKDDY/XhCZj4o0KkuHkY39694YwFSTgs3DeA6hAacWc4ddCPB0Abo4Ak3wEYhvY QmKg== X-Gm-Message-State: AOJu0YxV1PVpIyTrGXorP0ljF1HOjjjgkB3/ROm7r2mn9qEFss58Z3DM TjhjfC74IfYapLuH/Od4r8zCW40gFeIMXhaOuoGQZBiZSpM= X-Google-Smtp-Source: AGHT+IEJXPnNwsS9hPgkcShoAP8RyLu76biS1bieAnxmTqyUu0NXJcEaEaP8fEKtNl9FNKhPkzL8GA== X-Received: by 2002:a05:6870:4712:b0:1f5:c37c:ac37 with SMTP id b18-20020a056870471200b001f5c37cac37mr13667136oaq.30.1701062521454; Sun, 26 Nov 2023 21:22:01 -0800 (PST) Received: from amd.. ([2804:7f0:b402:7782:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id v13-20020aa7808d000000b006cb9f436232sm6392316pff.114.2023.11.26.21.21.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Nov 2023 21:22:00 -0800 (PST) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, peter.maydell@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: thuth@redhat.com, gustavo.romero@linaro.org Subject: [PATCH 2/4] tests/qtest: Reorganize common code in ivshmem-test Date: Mon, 27 Nov 2023 05:20:22 +0000 Message-Id: <20231127052024.435743-3-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127052024.435743-1-gustavo.romero@linaro.org> References: <20231127052024.435743-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::41; envelope-from=gustavo.romero@linaro.org; helo=mail-oa1-x41.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This commit reorganizes the ivshmem-test qtest by moving common structs, functions, and code that can be utilized by other ivshmem qtests into two new files: ivshmem-utils.h and ivshmem-utils.c. Enum Reg, struct ServerThread, and mktempshm() have been relocated to these new files. Two new functions have been introduced to handle the ivshmem server start/stop: test_ivshmem_server_{start,stop}. To accommodate the new way for starting/stopping the ivshmem server, struct ServerThread now includes two new members: 'server', previously present but not a member of any struct; and 'status', a new member of a new type, ServerStartStatus, used to track and handle service termination properly. Additionally, a new function, mktempsocket(), has been added to help create a unix socket filename, similar to what mktempshm() does for the creation of a shm file. Finally, the ivshmem-test qtest has been adapted to use the new ivhsmem utils. Adjustments in that sense have also been made to meson.build; also 'rt' have been removed as a lib dependency for ivhsmem-test.c. Two lines unrelated to these changes have had their line indentation also fixed in meson.build. Signed-off-by: Gustavo Romero --- tests/qtest/ivshmem-test.c | 113 ++------------------------ tests/qtest/ivshmem-utils.c | 155 ++++++++++++++++++++++++++++++++++++ tests/qtest/ivshmem-utils.h | 56 +++++++++++++ tests/qtest/meson.build | 6 +- 4 files changed, 221 insertions(+), 109 deletions(-) create mode 100644 tests/qtest/ivshmem-utils.c create mode 100644 tests/qtest/ivshmem-utils.h diff --git a/tests/qtest/ivshmem-test.c b/tests/qtest/ivshmem-test.c index 9bf8e78df6..5ce43e2f76 100644 --- a/tests/qtest/ivshmem-test.c +++ b/tests/qtest/ivshmem-test.c @@ -3,17 +3,17 @@ * * Copyright (c) 2014 SUSE LINUX Products GmbH * Copyright (c) 2015 Red Hat, Inc. + * Copyright (c) 2023 Linaro Ltd. * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. */ -#include "qemu/osdep.h" -#include -#include "contrib/ivshmem-server/ivshmem-server.h" +#include "ivshmem-utils.h" #include "libqos/libqos-pc.h" #include "libqos/libqos-spapr.h" -#include "libqtest.h" + +static ServerThread thread; #define TMPSHMSIZE (1 << 20) static char *tmpshm; @@ -45,13 +45,6 @@ typedef struct _IVState { QPCIDevice *dev; } IVState; -enum Reg { - INTRMASK = 0, - INTRSTATUS = 4, - IVPOSITION = 8, - DOORBELL = 12, -}; - static const char* reg2str(enum Reg reg) { switch (reg) { case INTRMASK: @@ -241,54 +234,6 @@ static void test_ivshmem_pair(void) g_free(data); } -typedef struct ServerThread { - GThread *thread; - IvshmemServer *server; - int pipe[2]; /* to handle quit */ -} ServerThread; - -static void *server_thread(void *data) -{ - ServerThread *t = data; - IvshmemServer *server = t->server; - - while (true) { - fd_set fds; - int maxfd, ret; - - FD_ZERO(&fds); - FD_SET(t->pipe[0], &fds); - maxfd = t->pipe[0] + 1; - - ivshmem_server_get_fds(server, &fds, &maxfd); - - ret = select(maxfd, &fds, NULL, NULL, NULL); - - if (ret < 0) { - if (errno == EINTR) { - continue; - } - - g_critical("select error: %s\n", strerror(errno)); - break; - } - if (ret == 0) { - continue; - } - - if (FD_ISSET(t->pipe[0], &fds)) { - break; - } - - if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) { - g_critical("ivshmem_server_handle_fds() failed\n"); - break; - } - } - - return NULL; -} - static void setup_vm_with_server(IVState *s, int nvectors) { char *cmd; @@ -304,27 +249,12 @@ static void setup_vm_with_server(IVState *s, int nvectors) static void test_ivshmem_server(void) { - g_autoptr(GError) err = NULL; IVState state1, state2, *s1, *s2; - ServerThread thread; - IvshmemServer server; int ret, vm1, vm2; int nvectors = 2; guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND; - ret = ivshmem_server_init(&server, tmpserver, tmpshm, true, - TMPSHMSIZE, nvectors, - g_test_verbose()); - g_assert_cmpint(ret, ==, 0); - - ret = ivshmem_server_start(&server); - g_assert_cmpint(ret, ==, 0); - - thread.server = &server; - g_unix_open_pipe(thread.pipe, FD_CLOEXEC, &err); - g_assert_no_error(err); - thread.thread = g_thread_new("ivshmem-server", server_thread, &thread); - g_assert(thread.thread != NULL); + test_ivshmem_server_start(&thread, tmpserver, tmpshm, nvectors); setup_vm_with_server(&state1, nvectors); s1 = &state1; @@ -367,15 +297,7 @@ static void test_ivshmem_server(void) cleanup_vm(s2); cleanup_vm(s1); - if (qemu_write_full(thread.pipe[1], "q", 1) != 1) { - g_error("qemu_write_full: %s", g_strerror(errno)); - } - - g_thread_join(thread.thread); - - ivshmem_server_close(&server); - close(thread.pipe[1]); - close(thread.pipe[0]); + test_ivshmem_server_stop(&thread); } static void test_ivshmem_hotplug_q35(void) @@ -454,31 +376,10 @@ static void cleanup(void) static void abrt_handler(void *data) { + test_ivshmem_server_stop(&thread); cleanup(); } -static gchar *mktempshm(int size, int *fd) -{ - while (true) { - gchar *name; - - name = g_strdup_printf("/qtest-%u-%u", getpid(), g_test_rand_int()); - *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL, - S_IRWXU|S_IRWXG|S_IRWXO); - if (*fd > 0) { - g_assert(ftruncate(*fd, size) == 0); - return name; - } - - g_free(name); - - if (errno != EEXIST) { - perror("shm_open"); - return NULL; - } - } -} - int main(int argc, char **argv) { int ret, fd; diff --git a/tests/qtest/ivshmem-utils.c b/tests/qtest/ivshmem-utils.c new file mode 100644 index 0000000000..5fd8bb76ee --- /dev/null +++ b/tests/qtest/ivshmem-utils.c @@ -0,0 +1,155 @@ +/* + * Common utilities for testing ivshmem devices + * + * SPDX-FileCopyrightText: 2012 SUSE LINUX Products GmbH + * SPDX-FileCopyrightText: 2021 Red Hat, Inc. + * SPDX-FileCopyrightText: 2023 Linaro Ltd. + * SPDX-License-Identifier: GPL-2.0-or-later + * + */ + +#include "ivshmem-utils.h" + +gchar *mktempshm(int size, int *fd) +{ + while (true) { + /* Relative path to the shm filesystem, e.g. '/dev/shm'. */ + gchar *shm_rel_path; + + shm_rel_path = g_strdup_printf("/ivshmem_qtest-%u-%u", getpid(), + g_test_rand_int()); + *fd = shm_open(shm_rel_path, O_CREAT|O_RDWR|O_EXCL, + S_IRWXU|S_IRWXG|S_IRWXO); + if (*fd > 0) { + g_assert(ftruncate(*fd, size) == 0); + return shm_rel_path; + } + + g_free(shm_rel_path); + + if (errno != EEXIST) { + perror("shm_open"); + return NULL; + } + } +} + +gchar *mktempsocket(void) +{ + gchar *server_socket_path; + + server_socket_path = g_strdup_printf("/tmp/ivshmem_socket_qtest-%u-%u", + getpid(), g_test_rand_int()); + return server_socket_path; +} + +static void *server_thread(void *data) +{ + ServerThread *t = data; + IvshmemServer *server = &t->server; + + while (true) { + fd_set fds; + int maxfd, ret; + + FD_ZERO(&fds); + FD_SET(t->pipe[0], &fds); + maxfd = t->pipe[0] + 1; + + ivshmem_server_get_fds(server, &fds, &maxfd); + + ret = select(maxfd, &fds, NULL, NULL, NULL); + + if (ret < 0) { + if (errno == EINTR) { + continue; + } + + g_critical("select error: %s\n", strerror(errno)); + break; + } + if (ret == 0) { + continue; + } + + if (FD_ISSET(t->pipe[0], &fds)) { + break; + } + + if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) { + g_critical("ivshmem_server_handle_fds() failed\n"); + break; + } + } + + return NULL; +} + +void test_ivshmem_server_start(ServerThread *thread, + const char *server_socket_path, + const char *shm_rel_path, unsigned num_vectors) +{ + g_autoptr(GError) err = NULL; + int ret; + struct stat shm_st; + char *shm_path; + + g_assert(thread != NULL); + g_assert(server_socket_path != NULL); + g_assert_cmpint(num_vectors, >, 0); + g_assert(shm_rel_path != NULL); + + /* + * Find out shm size. shm_open() deals with relative paths but stat() needs + * the full path to the shm file. + */ + shm_path = g_strdup_printf("/dev/shm%s", shm_rel_path); + ret = stat(shm_path, &shm_st); + g_assert_cmpint(ret, ==, 0); + g_assert_cmpint(shm_st.st_size, >, 0); + + ret = ivshmem_server_init(&thread->server, server_socket_path, shm_rel_path, + true, shm_st.st_size, num_vectors, g_test_verbose()); + g_assert_cmpint(ret, ==, 0); + ret = ivshmem_server_start(&thread->server); + g_assert_cmpint(ret, ==, 0); + thread->status = SERVER; + + g_unix_open_pipe(thread->pipe, FD_CLOEXEC, &err); + g_assert_no_error(err); + thread->status |= PIPE; + + thread->thread = g_thread_new("ivshmem-server", server_thread, thread); + g_assert(thread->thread != NULL); + thread->status |= THREAD; +} + +void test_ivshmem_server_stop(ServerThread *thread) +{ + /* + * This function can be called any time on a test error/abort (e.g., it can + * be called from the abort handler), including from the + * test_ivshmem_server_start(). Therefore, the start steps (server started, + * pipe created, and thread created) are tracked when the server starts and + * then checked below accordingly for proper termination. + */ + + if (thread->status & THREAD) { + /* Ask to exit from thread. */ + if (qemu_write_full(thread->pipe[1], "q", 1) != 1) { + g_error("qemu_write_full: %s", g_strerror(errno)); + } + + /* Wait thread to exit. */ + g_thread_join(thread->thread); + } + + if (thread->status & PIPE) { + close(thread->pipe[1]); + close(thread->pipe[0]); + } + + if (thread->status & SERVER) { + ivshmem_server_close(&thread->server); + } +} diff --git a/tests/qtest/ivshmem-utils.h b/tests/qtest/ivshmem-utils.h new file mode 100644 index 0000000000..c43661caac --- /dev/null +++ b/tests/qtest/ivshmem-utils.h @@ -0,0 +1,56 @@ +/* + * Common utilities for testing ivshmem devices + * + * SPDX-FileCopyrightText: 2012 SUSE LINUX Products GmbH + * SPDX-FileCopyrightText: 2021 Red Hat, Inc. + * SPDX-FileCopyrightText: 2023 Linaro Ltd. + * SPDX-License-Identifier: GPL-2.0-or-later + * + */ + +#ifndef QTEST_IVSHMEM_UTILS_H +#define QTEST_IVSHMEM_UTILS_H + +#include "qemu/osdep.h" +#include +#include "contrib/ivshmem-server/ivshmem-server.h" +#include "libqtest.h" + +enum Reg { + INTRMASK = 0, + INTRSTATUS = 4, + IVPOSITION = 8, + DOORBELL = 12, +}; + +enum ServerStartStatus { + SERVER = 1, /* Ivshmem server started */ + THREAD = 2, /* Thread for monitoring fds created */ + PIPE = 4, /* Pipe created */ +}; + +typedef struct ServerThread { + GThread *thread; + IvshmemServer server; + /* + * Pipe is used to communicate with the thread, asking it to terminate on + * receiving 'q'. + */ + int pipe[2]; + /* + * Server statuses are used to keep track of thread/server/pipe start since + * test_ivshmem_server_stop can be called at any time on a test error, + * even from test_ivshmem_server_start itself, therefore, they are used for + * proper service termination. + */ + enum ServerStartStatus status; +} ServerThread; + +gchar *mktempshm(int size, int *fd); +gchar *mktempsocket(void); +void test_ivshmem_server_start(ServerThread *thread, + const char *server_socket_path, + const char *shm_rel_path, unsigned num_vectors); +void test_ivshmem_server_stop(ServerThread *thread); + +#endif /* QTEST_IVSHMEM_UTILS_H */ diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index b071d400b3..b6c4ca937c 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -55,9 +55,9 @@ qtests_i386 = \ (config_all_devices.has_key('CONFIG_PVPANIC_ISA') ? ['pvpanic-test'] : []) + \ (config_all_devices.has_key('CONFIG_PVPANIC_PCI') ? ['pvpanic-pci-test'] : []) + \ (config_all_devices.has_key('CONFIG_HDA') ? ['intel-hda-test'] : []) + \ - (config_all_devices.has_key('CONFIG_I82801B11') ? ['i82801b11-test'] : []) + \ + (config_all_devices.has_key('CONFIG_I82801B11') ? ['i82801b11-test'] : []) + \ (config_all_devices.has_key('CONFIG_IOH3420') ? ['ioh3420-test'] : []) + \ - (config_all_devices.has_key('CONFIG_LPC_ICH9') ? ['lpc-ich9-test'] : []) + \ + (config_all_devices.has_key('CONFIG_LPC_ICH9') ? ['lpc-ich9-test'] : []) + \ (config_all_devices.has_key('CONFIG_USB_UHCI') ? ['usb-hcd-uhci-test'] : []) + \ (config_all_devices.has_key('CONFIG_USB_UHCI') and \ config_all_devices.has_key('CONFIG_USB_EHCI') ? ['usb-hcd-ehci-test'] : []) + \ @@ -305,7 +305,7 @@ qtests = { 'cdrom-test': files('boot-sector.c'), 'dbus-vmstate-test': files('migration-helpers.c') + dbus_vmstate1, 'erst-test': files('erst-test.c'), - 'ivshmem-test': [rt, '../../contrib/ivshmem-server/ivshmem-server.c'], + 'ivshmem-test': ['ivshmem-utils.c', '../../contrib/ivshmem-server/ivshmem-server.c'], 'migration-test': migration_files, 'pxe-test': files('boot-sector.c'), 'qos-test': [chardev, io, qos_test_ss.apply(config_host, strict: false).sources()], From patchwork Mon Nov 27 05:20:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 13469070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86B75C4167B for ; Mon, 27 Nov 2023 05:22:59 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r7U4T-0004T2-Cb; Mon, 27 Nov 2023 00:22:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r7U4Q-0004So-6V for qemu-devel@nongnu.org; Mon, 27 Nov 2023 00:22:10 -0500 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r7U4N-0008BT-7C for qemu-devel@nongnu.org; Mon, 27 Nov 2023 00:22:09 -0500 Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-6cbda959062so3186424b3a.1 for ; Sun, 26 Nov 2023 21:22:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701062525; x=1701667325; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/qrtP7sSfrEUApSD9rVL4Ayre6N/0rnGZosMCQPlDJ4=; b=ys4ZIn6sU9h8vUIG4Dg+b1+Xd7BQI3LIMFQkDdL78BpP6AAGqny0tCztuS4m3A8Otb zwF2lLd3gcXIEHZOfkbQMQfH+AolN8IgpyB2aMreHBl5PTc+H2giLGp2xNIpdpu5EDZP TVKXHsLTPiDk6/1wFJaFoO2lxA917y7YDw1fFYQTjH5z+2CVpn2kJ+R2tL0iPPLYVwtR EplK6SQIJoQJWcYiao+GI+RXF5p9O0C6UFTSfAK/cs1joUo/Api54uNpH7hxPN2BBDk1 xIolke+od981fngQInSznVdVKGK6ZL9cP4feq5iJfReCkV9Q/hEiFCPtag/U14wOH9A4 YzsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701062525; x=1701667325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/qrtP7sSfrEUApSD9rVL4Ayre6N/0rnGZosMCQPlDJ4=; b=w2OdXiE6tVpuTYgUIkpf5uQ96BKncdKYMzc+qlKzsJMQL+LMXoQuvFajN+0T2i1HbT jmbIwalJWShOQEQEqhFC3WLnzjnKqBgyY9ThpfowrhW5JkPgj2vbfyAUeYLfE5Yd8RI4 zAZM6xoyAn1V8f2137jGwMVstS3odil9KPgr9YVJdODvuCBmmM5pHxNidJoewboh8cXU eq4dlqQ2fgOeG/2uT8CJ7Kb7uQwYOdm5elFEcgiJcJgdR3Q2qmYfEyJY4oFl4/H9aVkk zRNW24s/6uGO0aoHTpbry1JA2t4Y9MJ1l7lyKKZptkrH5DI8H8MuJzc9x40ppmayLLw5 kJiw== X-Gm-Message-State: AOJu0YwzNBFF7ix4Se2E+1uamdaj2Zmh4x9/m0O94XUgmyyeVsSFArK7 TFh7WQdJfINGzY3zuP51ugxe8mNNLRnXeZcvu5Lic3MU X-Google-Smtp-Source: AGHT+IEG61OU1PAzpK47lBZ3EsdKXPYIO2Ty4+TEtxXX12gpkvEBAVK5PivvUQO/NpcksWKNCoywHw== X-Received: by 2002:a05:6a00:1483:b0:6cb:6c9b:8892 with SMTP id v3-20020a056a00148300b006cb6c9b8892mr12541721pfu.29.1701062525527; Sun, 26 Nov 2023 21:22:05 -0800 (PST) Received: from amd.. ([2804:7f0:b402:7782:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id v13-20020aa7808d000000b006cb9f436232sm6392316pff.114.2023.11.26.21.22.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Nov 2023 21:22:05 -0800 (PST) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, peter.maydell@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: thuth@redhat.com, gustavo.romero@linaro.org Subject: [PATCH 3/4] tests/qtest: Add ivshmem-flat test Date: Mon, 27 Nov 2023 05:20:23 +0000 Message-Id: <20231127052024.435743-4-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127052024.435743-1-gustavo.romero@linaro.org> References: <20231127052024.435743-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=gustavo.romero@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add qtest for the ivshmem-flat device. Based-on: <20231113230149.321304-1-gustavo.romero@linaro.org> Signed-off-by: Gustavo Romero --- tests/qtest/ivshmem-flat-test.c | 319 ++++++++++++++++++++++++++++++++ tests/qtest/meson.build | 2 + 2 files changed, 321 insertions(+) create mode 100644 tests/qtest/ivshmem-flat-test.c diff --git a/tests/qtest/ivshmem-flat-test.c b/tests/qtest/ivshmem-flat-test.c new file mode 100644 index 0000000000..7a4547637c --- /dev/null +++ b/tests/qtest/ivshmem-flat-test.c @@ -0,0 +1,319 @@ +/* + * Inter-VM Shared Memory Flat Device qtests + * + * SPDX-FileCopyrightText: 2023 Linaro Ltd. + * SPDX-FileContributor: Gustavo Romero + * SPDX-License-Identifier: GPL-2.0-or-later + * + */ + +#include "ivshmem-utils.h" + +#define IVSHMEM_FLAT_MMR_ADDR 0x400FF000 +#define IVSHMEM_FLAT_SHM_ADDR 0x40100000 +#define SHM_SIZE 131072 /* 128k */ + +static ServerThread thread; + +uint32_t *shm_ptr; +char *shm_rel_path; +char *server_socket_path; + +static void cleanup(void) +{ + if (shm_ptr) { + munmap(shm_ptr, SHM_SIZE); + shm_ptr = NULL; + } + + if (shm_rel_path) { + shm_unlink(shm_rel_path); + shm_rel_path = NULL; + } + + if (server_socket_path) { + unlink(server_socket_path); + server_socket_path = NULL; + } +} + +static void abort_handler(void *data) +{ + test_ivshmem_server_stop(&thread); + cleanup(); +} + +/* + * Check if exactly 1 positive pulse (low->high->low) on 'irq' IRQ line happens + * in 'timeout' second(s). 'irq' must be intercepted using qtest_irq_intercept_* + * before this function can be used on it. It returns 0 when pulse is detected, + * otherwise 1. + */ +static int test_ivshmem_flat_irq_positive_pulse(QTestState *qts, int irq, + int timeout) +{ + uint64_t num_raises = 0; + uint64_t num_lows = 0; + uint64_t end_time; + + end_time = g_get_monotonic_time() + timeout * G_TIME_SPAN_SECOND; + do { + if ((num_raises = qtest_get_irq_raised_counter(qts, 0))) { + num_lows = qtest_get_irq_lowered_counter(qts, 0); + /* Check for 1 raise and 1 low IRQ event. */ + if (num_raises == num_lows && num_lows == 1) { + return 0; + } else { + g_message("%s: Timeout expired", __func__); + return 1; + } + } + qtest_clock_step(qts, 10000); + } while (g_get_monotonic_time() < end_time); + + return 1; +} + +static inline uint32_t read_reg(QTestState *qts, enum Reg reg) +{ + uint32_t v; + + qtest_memread(qts, IVSHMEM_FLAT_MMR_ADDR + reg, &v, sizeof(v)); + + return v; +} + +static inline void write_reg(QTestState *qts, enum Reg reg, uint32_t v) +{ + qtest_memwrite(qts, IVSHMEM_FLAT_MMR_ADDR + reg, &v, sizeof(v)); +} + +/* + * Setup a test VM with ivshmem-flat device attached, IRQ properly set, and + * connected to the ivshmem-server. + */ +static QTestState *setup_vm(void) +{ + QTestState *qts; + const char *cmd_line; + + cmd_line = g_strdup_printf("-machine lm3s6965evb " + "-chardev socket,path=%s,id=ivshm " + "-device ivshmem-flat,chardev=ivshm," + "x-irq-qompath='/machine/unattached/device[1]/nvic/unnamed-gpio-in[0]'," + "x-bus-qompath='/sysbus',shmem-size=%d", + server_socket_path, SHM_SIZE); + qts = qtest_init(cmd_line); + + return qts; +} + +static void test_ivshmem_flat_irq(void) +{ + QTestState *vm_state; + uint16_t own_id; + + vm_state = setup_vm(); + + qtest_irq_intercept_out_named(vm_state, + "/machine/peripheral-anon/device[0]", + "irq-output"); + + /* IVPOSTION has the device's own ID distributed by the ivshmem-server. */ + own_id = read_reg(vm_state, IVPOSITION); + + /* Make device notify itself. */ + write_reg(vm_state, DOORBELL, (own_id << 16) | 0 /* vector 0 */); + + /* + * Check intercepted device's IRQ output line. Named IRQ line 'irq-output' + * was associated to qtest IRQ 0 and after self notification qtest IRQ 0 + * must be toggled by the device. The test fails if no toggling is detected + * in 2 seconds. + */ + g_assert(test_ivshmem_flat_irq_positive_pulse(vm_state, 0, 2) == 0); + + qtest_quit(vm_state); +} + +static void test_ivshmem_flat_shm_write(void) +{ + QTestState *vm_state; + int num_elements, i; + uint32_t *data; + + vm_state = setup_vm(); + + /* Prepare test data with random values. */ + data = g_malloc(SHM_SIZE); + num_elements = SHM_SIZE/sizeof(*data); + for (i = 0; i < num_elements; i++) { + data[i] = g_test_rand_int(); + } + + /* + * Write test data to VM address IVSHMEM_FLAT_SHM_ADDR, where the shared + * memory region is located. + */ + qtest_memwrite(vm_state, IVSHMEM_FLAT_SHM_ADDR, data, SHM_SIZE); + + /* + * Since the shared memory fd is mmapped into this test process VMA at + * shm_ptr, every byte written by the VM in its shared memory region should + * also be available in the test process via shm_ptr. Thus, data in shm_ptr + * is compared back against the original test data. + */ + for (i = 0; i < num_elements; i++) { + g_assert_cmpint(shm_ptr[i], ==, data[i]); + } + + qtest_quit(vm_state); +} + +static void test_ivshmem_flat_shm_read(void) +{ + QTestState *vm_state; + int num_elements, i; + uint32_t *data; + uint32_t v; + + vm_state = setup_vm(); + + /* Prepare test data with random values. */ + data = g_malloc(SHM_SIZE); + num_elements = SHM_SIZE/sizeof(*data); + for (i = 0; i < num_elements; i++) { + data[i] = g_test_rand_int(); + } + + /* + * Copy test data to the shared memory region so it can be read from the VM + * (IVSHMEM_FLAT_SHM_ADDR location). + */ + memcpy(shm_ptr, data, SHM_SIZE); + + /* Check data */ + for (i = 0; i < num_elements; i++) { + qtest_memread(vm_state, IVSHMEM_FLAT_SHM_ADDR + i * sizeof(v), &v, + sizeof(v)); + g_assert_cmpint(v, ==, data[i]); + } + + qtest_quit(vm_state); +} + +static void test_ivshmem_flat_shm_pair(void) +{ + QTestState *vm0_state, *vm1_state; + uint16_t vm0_peer_id, vm1_peer_id; + int num_elements, i; + uint32_t *data; + uint32_t v; + + vm0_state = setup_vm(); + vm1_state = setup_vm(); + + /* Get peer ID for the VM so it can be used for one notify each other. */ + vm0_peer_id = read_reg(vm0_state, IVPOSITION); + vm1_peer_id = read_reg(vm1_state, IVPOSITION); + + /* Observe vm1 IRQ output line first. */ + qtest_irq_intercept_out_named(vm1_state, + "/machine/peripheral-anon/device[0]", + "irq-output"); + + /* Notify (interrupt) VM1 from VM0. */ + write_reg(vm0_state, DOORBELL, (vm1_peer_id << 16) | 0 /* vector 0 */); + + /* Check if VM1 IRQ output line is toggled after notification from VM0. */ + g_assert(test_ivshmem_flat_irq_positive_pulse(vm1_state, 0, 2) == 0); + + /* Secondly, observe VM0 IRQ output line first. */ + qtest_irq_intercept_out_named(vm0_state, + "/machine/peripheral-anon/device[0]", + "irq-output"); + + /* ... and do the opposite: notify (interrupt) VM0 from VM1. */ + write_reg(vm1_state, DOORBELL, (vm0_peer_id << 16) | 0 /* vector 0 */); + + /* Check if VM0 IRQ output line is toggled after notification from VM0. */ + g_assert(test_ivshmem_flat_irq_positive_pulse(vm0_state, 0, 2) == 0); + + /* Prepare test data with random values. */ + data = g_malloc(SHM_SIZE); + num_elements = SHM_SIZE/sizeof(*data); + for (i = 0; i < num_elements; i++) { + data[i] = g_test_rand_int(); + } + + /* Write test data on VM0. */ + qtest_memwrite(vm0_state, IVSHMEM_FLAT_SHM_ADDR, data, SHM_SIZE); + + /* Check test data on VM1. */ + for (i = 0; i < num_elements; i++) { + qtest_memread(vm1_state, IVSHMEM_FLAT_SHM_ADDR + i * sizeof(v), &v, + sizeof(v)); + g_assert_cmpint(v, ==, data[i]); + } + + /* Prepare new test data with random values. */ + for (i = 0; i < num_elements; i++) { + data[i] = g_test_rand_int(); + } + + /* Write test data on VM1. */ + qtest_memwrite(vm1_state, IVSHMEM_FLAT_SHM_ADDR, data, SHM_SIZE); + + /* Check test data on VM0. */ + for (i = 0; i < num_elements; i++) { + qtest_memread(vm0_state, IVSHMEM_FLAT_SHM_ADDR + i * sizeof(v), &v, + sizeof(v)); + g_assert_cmpint(v, ==, data[i]); + } + + qtest_quit(vm0_state); + qtest_quit(vm1_state); +} + +int main(int argc, char *argv[]) +{ + int shm_fd, r; + + g_test_init(&argc, &argv, NULL); + + /* If test fails, stop server, cleanup socket and shm files. */ + qtest_add_abrt_handler(abort_handler, NULL); + + shm_rel_path = mktempshm(SHM_SIZE, &shm_fd); + g_assert(shm_rel_path); + + /* + * Map shm to this test's VMA so it's possible to read/write from/to it. For + * VMs with the ivhsmem-flat device attached, this region will also be + * mapped in their own memory layout, at IVSHMEM_FLAT_SHM_ADDR (default). + */ + shm_ptr = mmap(0, SHM_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, shm_fd, 0); + g_assert(shm_ptr != MAP_FAILED); + + server_socket_path = mktempsocket(); + /* It never fails, so no assert(). */ + + /* + * Currently, ivshmem-flat device only supports notification via 1 vector, + * i.e. vector 0. + */ + test_ivshmem_server_start(&thread, server_socket_path, shm_rel_path, 1); + + /* Register tests. */ + qtest_add_func("/ivshmem-flat/irq", test_ivshmem_flat_irq); + qtest_add_func("/ivshmem-flat/shm-write", test_ivshmem_flat_shm_write); + qtest_add_func("/ivshmem-flat/shm-read", test_ivshmem_flat_shm_read); + qtest_add_func("/ivshmem-flat/pair", test_ivshmem_flat_shm_pair); + + r = g_test_run(); + + test_ivshmem_server_stop(&thread); + cleanup(); + + return r; +} diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index b6c4ca937c..e7475c7e23 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -195,6 +195,7 @@ qtests_aspeed = \ 'aspeed_smc-test', 'aspeed_gpio-test'] qtests_arm = \ + (config_all_devices.has_key('CONFIG_IVSHMEM_FLAT_DEVICE') ? ['ivshmem-flat-test'] : []) + \ (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \ (config_all_devices.has_key('CONFIG_CMSDK_APB_TIMER') ? ['cmsdk-apb-timer-test'] : []) + \ @@ -306,6 +307,7 @@ qtests = { 'dbus-vmstate-test': files('migration-helpers.c') + dbus_vmstate1, 'erst-test': files('erst-test.c'), 'ivshmem-test': ['ivshmem-utils.c', '../../contrib/ivshmem-server/ivshmem-server.c'], + 'ivshmem-flat-test': ['ivshmem-utils.c', '../../contrib/ivshmem-server/ivshmem-server.c'], 'migration-test': migration_files, 'pxe-test': files('boot-sector.c'), 'qos-test': [chardev, io, qos_test_ss.apply(config_host, strict: false).sources()], From patchwork Mon Nov 27 05:20:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 13469072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 104F9C07D5A for ; Mon, 27 Nov 2023 05:23:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r7U4Z-0004UK-Ah; Mon, 27 Nov 2023 00:22:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r7U4V-0004TV-Qp for qemu-devel@nongnu.org; Mon, 27 Nov 2023 00:22:16 -0500 Received: from mail-oi1-x235.google.com ([2607:f8b0:4864:20::235]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r7U4T-0008Bk-QM for qemu-devel@nongnu.org; Mon, 27 Nov 2023 00:22:15 -0500 Received: by mail-oi1-x235.google.com with SMTP id 5614622812f47-3b861a3be3eso827775b6e.0 for ; Sun, 26 Nov 2023 21:22:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701062532; x=1701667332; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IRRD/Ekj0h83Op/FvtNapJt01xEZPwiTxtAfYesAOBw=; b=hX4y2CqS4ZShaGLUK3HOoE8HWu7vZ781OdDo331QES3bq2j3ekTQAioqi22wf8Lqvu Fv8nLIeMe8iRb+p2wN7/wfwxsVZ+1P6usCORLsF91zR5cq286E6dUrtTzm7DK/htc14N 55ejupTkD2lwQKe+T3Ehv+/JrSCOMJr2nRo25F0iins0ykSQs7dQoICdGPnhdcn/sKZf 7B3eqYgKxhVCMdbDBMMANxh4rjxHXHAmkzyCf26whYactrk3iwzz7faovlOnzXQGZo0p jOO0PoiW672qgGhWznzvx0XFDK3p2QrvpEn4vkjXrmHtDcXOj2v+KPQzFvTR0Yk2pbfj NNMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701062532; x=1701667332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IRRD/Ekj0h83Op/FvtNapJt01xEZPwiTxtAfYesAOBw=; b=Ov8W5XQRgIevQm0TZBbJyQNBNSYxyE10RDBLhIne5lo6b0AIPjNv/vaTLociYjzNvD W9cJc9RqZZo5FLP2L0fj5hm+MSRErrHM7OySHquwAd8f93MXhTvIYANJk0uithPt/tty u/7RWh648ci4SCQJywkuxoiNgHysj07AFqvPE5VOLZBBlWpnbuqdebAtghCIKfcki3/M COxTENpukF4s4MeIsTDzK62TlvLmAVbXu9Ugodm+AIQuWmlIZ/O3bfHg+pyKuXYPz+Fh qPcta0xON8NTcyUP6pb2bpfnNL1faO9NbwxwSPsOhM0MAe2MWzmtYefo8+XN5KA6uwL1 CVMg== X-Gm-Message-State: AOJu0Yxin/TcqzpxDmkuTOOSM35u6k0YHRkqi5KbYBgJlE9gIp5bCL2q OTHF1aFp8cJT4b4pIB4Tc0NQ9MgSP1F+UFeRYL5AnsLd X-Google-Smtp-Source: AGHT+IGoHhUmlmRE4sSolDjV0Xe1Kz7BdtC+Cnd0gjEuyIlrTDrEt8fOSdHpwDRD1pWAm1EJd1Vqeg== X-Received: by 2002:a05:6808:2115:b0:3b2:dd87:fc with SMTP id r21-20020a056808211500b003b2dd8700fcmr14613191oiw.2.1701062532036; Sun, 26 Nov 2023 21:22:12 -0800 (PST) Received: from amd.. ([2804:7f0:b402:7782:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id v13-20020aa7808d000000b006cb9f436232sm6392316pff.114.2023.11.26.21.22.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Nov 2023 21:22:11 -0800 (PST) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, peter.maydell@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: thuth@redhat.com, gustavo.romero@linaro.org Subject: [PATCH 4/4] hw/misc/ivshmem: Rename ivshmem to ivshmem-pci Date: Mon, 27 Nov 2023 05:20:24 +0000 Message-Id: <20231127052024.435743-5-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127052024.435743-1-gustavo.romero@linaro.org> References: <20231127052024.435743-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::235; envelope-from=gustavo.romero@linaro.org; helo=mail-oi1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Because now there is also an MMIO ivshmem device (ivshmem-flat.c), and ivshmem.c is a PCI specific implementation, rename it to ivshmem-pci.c. Signed-off-by: Gustavo Romero Reviewed-by: Philippe Mathieu-Daudé --- hw/misc/{ivshmem.c => ivshmem-pci.c} | 0 hw/misc/meson.build | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename hw/misc/{ivshmem.c => ivshmem-pci.c} (100%) diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem-pci.c similarity index 100% rename from hw/misc/ivshmem.c rename to hw/misc/ivshmem-pci.c diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 7b03fc1345..6f0a7c31cd 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -37,7 +37,7 @@ system_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.c')) subdir('macio') # ivshmem devices -system_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem.c')) +system_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem-pci.c')) system_ss.add(when: 'CONFIG_IVSHMEM_FLAT_DEVICE', if_true: files('ivshmem-flat.c')) system_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c'))