From patchwork Tue Nov 28 02:54:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baochen Qiang X-Patchwork-Id: 13470465 X-Patchwork-Delegate: kvalo@adurom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="e512bmAU" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C58D5BD for ; Mon, 27 Nov 2023 18:55:03 -0800 (PST) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AS0NTvF019760; Tue, 28 Nov 2023 02:54:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=rIW3Rw3NKTsnVifloDxgmuLkl37xQyfmBmHOLPHTjzg=; b=e512bmAUl4bRzGYYbMlfUyXcrTX7guFvMWH2QTqyWlpPYDDSZ5S0wwzGenT4bD4MLiOk PN5JRgJDCi3PRVqF5eriSU3D8MXLQW+jcdkerQ2uy3wVGlGyqVQbUpc3XgYYqP+9vxDl HO1YcAcj4mw8HzUGhV7JgzsDukzKv4StcMobo3B4bFmdqhcF6B0HH0SXhtLjPB2tJ9vw yqtlFPshDpEO/yVe2FTnyRNqpNut2H96YPwaum3OCwqYpds/dW+AHF/1R+REec36ZvL4 /DgG31aA9cAaJw4/YL1PV3yH/5klpwZWfNkxQSzXft3ZLdoX6vNi8GNTXUk4vpzfm2er nQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3umt6323ab-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Nov 2023 02:54:57 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AS2suE2019618 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Nov 2023 02:54:56 GMT Received: from bqiang-SFF.qca.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 27 Nov 2023 18:54:55 -0800 From: Baochen Qiang To: CC: Subject: [PATCH 1/3] wifi: ath12k: fix wrong definitions of hal_reo_update_rx_queue Date: Tue, 28 Nov 2023 10:54:38 +0800 Message-ID: <20231128025440.46988-2-quic_bqiang@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231128025440.46988-1-quic_bqiang@quicinc.com> References: <20231128025440.46988-1-quic_bqiang@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YaEMebpBWvRJfpnMj0SWXVfX21c7HI0l X-Proofpoint-ORIG-GUID: YaEMebpBWvRJfpnMj0SWXVfX21c7HI0l X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-28_01,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 mlxlogscore=737 bulkscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 clxscore=1015 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311280021 Some fields of hal_reo_update_rx_queue structure are wrongly defined, so fix it. Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4 Signed-off-by: Baochen Qiang --- drivers/net/wireless/ath/ath12k/hal_desc.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/hal_desc.h b/drivers/net/wireless/ath/ath12k/hal_desc.h index 6c17adc6d60b..ec204939e50c 100644 --- a/drivers/net/wireless/ath/ath12k/hal_desc.h +++ b/drivers/net/wireless/ath/ath12k/hal_desc.h @@ -2500,13 +2500,13 @@ struct hal_rx_reo_queue { #define HAL_REO_UPD_RX_QUEUE_INFO1_PN_HANDLE_ENABLE BIT(30) #define HAL_REO_UPD_RX_QUEUE_INFO1_IGNORE_AMPDU_FLG BIT(31) -#define HAL_REO_UPD_RX_QUEUE_INFO2_BA_WINDOW_SIZE GENMASK(7, 0) -#define HAL_REO_UPD_RX_QUEUE_INFO2_PN_SIZE GENMASK(9, 8) -#define HAL_REO_UPD_RX_QUEUE_INFO2_SVLD BIT(10) -#define HAL_REO_UPD_RX_QUEUE_INFO2_SSN GENMASK(22, 11) -#define HAL_REO_UPD_RX_QUEUE_INFO2_SEQ_2K_ERR BIT(23) -#define HAL_REO_UPD_RX_QUEUE_INFO2_PN_ERR BIT(24) -#define HAL_REO_UPD_RX_QUEUE_INFO2_PN_VALID BIT(25) +#define HAL_REO_UPD_RX_QUEUE_INFO2_BA_WINDOW_SIZE GENMASK(9, 0) +#define HAL_REO_UPD_RX_QUEUE_INFO2_PN_SIZE GENMASK(11, 10) +#define HAL_REO_UPD_RX_QUEUE_INFO2_SVLD BIT(12) +#define HAL_REO_UPD_RX_QUEUE_INFO2_SSN GENMASK(24, 13) +#define HAL_REO_UPD_RX_QUEUE_INFO2_SEQ_2K_ERR BIT(25) +#define HAL_REO_UPD_RX_QUEUE_INFO2_PN_ERR BIT(26) +#define HAL_REO_UPD_RX_QUEUE_INFO2_PN_VALID BIT(27) struct hal_reo_update_rx_queue { struct hal_reo_cmd_hdr cmd; From patchwork Tue Nov 28 02:54:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baochen Qiang X-Patchwork-Id: 13470463 X-Patchwork-Delegate: kvalo@adurom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="TvFAwpHq" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCE311B4 for ; Mon, 27 Nov 2023 18:55:02 -0800 (PST) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AS0Lvp6018767; Tue, 28 Nov 2023 02:54:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=jFfxbUKDNZR0heLrwBzO6lF1GFRgVK6qkg+YMCfKunk=; b=TvFAwpHqYS2KX9mqxLAPStr09mYpJgQdtDB+K7/Ht8k+aXFIZ+Pfajv0GbtPczzF2fwW iXntegD5EetHM0qEW+H7xOVXC5Ud4Z0NYXVZmlfoksPYsO0uW86aniM6ewNj/+8Sf4Bo UVEevT4xB1apCwWieZSC7pt3fmsUJvdfeFel/20eXXUdX5ceMNOz5icczdHtOhfzVFQb RtCP96cncJmeogVIIssRiG3T86OBeuxCXA1/ewNYJuRzTtfnRn01BNacveNI7ZZ53lVx RBOas+TQZorHDBQYF6ZPZwLnuDkOmTOK7mewjjJAtbnMGS/nsO2EAgoj3BV8cLiv698e Fg== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3umt9c24mc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Nov 2023 02:54:58 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AS2swvu019621 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Nov 2023 02:54:58 GMT Received: from bqiang-SFF.qca.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 27 Nov 2023 18:54:57 -0800 From: Baochen Qiang To: CC: Subject: [PATCH 2/3] wifi: ath12k: add support for BA1024 Date: Tue, 28 Nov 2023 10:54:39 +0800 Message-ID: <20231128025440.46988-3-quic_bqiang@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231128025440.46988-1-quic_bqiang@quicinc.com> References: <20231128025440.46988-1-quic_bqiang@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: XTVDYWS1nINOuXMUVGZUrqizg-fJHXpz X-Proofpoint-ORIG-GUID: XTVDYWS1nINOuXMUVGZUrqizg-fJHXpz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-28_01,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 phishscore=0 suspectscore=0 adultscore=0 impostorscore=0 mlxlogscore=921 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311280021 Currently the maximum block ACK window size supported is 256. This results in that, when connected to an AP which supports larger BA sizes like BA512 or BA1024, only BA256 is established, leading to a lower peak throughput. So add support for BA1024, this is doen by allocating a larger REO queue and advertising IEEE80211_MAX_AMPDU_BUF_EHT support to MAC80211. Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4 Signed-off-by: Baochen Qiang --- drivers/net/wireless/ath/ath12k/dp.h | 2 +- drivers/net/wireless/ath/ath12k/hal_desc.h | 28 ++++++++++++++++++++++ drivers/net/wireless/ath/ath12k/hal_rx.c | 11 ++++++--- drivers/net/wireless/ath/ath12k/mac.c | 2 +- 4 files changed, 38 insertions(+), 5 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/dp.h b/drivers/net/wireless/ath/ath12k/dp.h index 61f765432516..50db1403ebce 100644 --- a/drivers/net/wireless/ath/ath12k/dp.h +++ b/drivers/net/wireless/ath/ath12k/dp.h @@ -145,7 +145,7 @@ struct ath12k_pdev_dp { #define DP_RX_HASH_ENABLE 1 /* Enable hash based Rx steering */ -#define DP_BA_WIN_SZ_MAX 256 +#define DP_BA_WIN_SZ_MAX 1024 #define DP_TCL_NUM_RING_MAX 4 diff --git a/drivers/net/wireless/ath/ath12k/hal_desc.h b/drivers/net/wireless/ath/ath12k/hal_desc.h index ec204939e50c..f12977aa6afe 100644 --- a/drivers/net/wireless/ath/ath12k/hal_desc.h +++ b/drivers/net/wireless/ath/ath12k/hal_desc.h @@ -2517,6 +2517,34 @@ struct hal_reo_update_rx_queue { __le32 pn[4]; } __packed; +struct hal_rx_reo_queue_1k { + struct hal_desc_header desc_hdr; + __le32 rx_bitmap_319_288; + __le32 rx_bitmap_351_320; + __le32 rx_bitmap_383_352; + __le32 rx_bitmap_415_384; + __le32 rx_bitmap_447_416; + __le32 rx_bitmap_479_448; + __le32 rx_bitmap_511_480; + __le32 rx_bitmap_543_512; + __le32 rx_bitmap_575_544; + __le32 rx_bitmap_607_576; + __le32 rx_bitmap_639_608; + __le32 rx_bitmap_671_640; + __le32 rx_bitmap_703_672; + __le32 rx_bitmap_735_704; + __le32 rx_bitmap_767_736; + __le32 rx_bitmap_799_768; + __le32 rx_bitmap_831_800; + __le32 rx_bitmap_863_832; + __le32 rx_bitmap_895_864; + __le32 rx_bitmap_927_896; + __le32 rx_bitmap_959_928; + __le32 rx_bitmap_991_960; + __le32 rx_bitmap_1023_992; + __le32 reserved[8]; +} __packed; + #define HAL_REO_UNBLOCK_CACHE_INFO0_UNBLK_CACHE BIT(0) #define HAL_REO_UNBLOCK_CACHE_INFO0_RESOURCE_IDX GENMASK(2, 1) diff --git a/drivers/net/wireless/ath/ath12k/hal_rx.c b/drivers/net/wireless/ath/ath12k/hal_rx.c index f6afbd8196bf..6fa874a93d3a 100644 --- a/drivers/net/wireless/ath/ath12k/hal_rx.c +++ b/drivers/net/wireless/ath/ath12k/hal_rx.c @@ -688,23 +688,28 @@ void ath12k_hal_reo_update_rx_reo_queue_status(struct ath12k_base *ab, u32 ath12k_hal_reo_qdesc_size(u32 ba_window_size, u8 tid) { - u32 num_ext_desc; + u32 num_ext_desc, num_1k_desc = 0; if (ba_window_size <= 1) { if (tid != HAL_DESC_REO_NON_QOS_TID) num_ext_desc = 1; else num_ext_desc = 0; + } else if (ba_window_size <= 105) { num_ext_desc = 1; } else if (ba_window_size <= 210) { num_ext_desc = 2; - } else { + } else if (ba_window_size <= 256) { num_ext_desc = 3; + } else { + num_ext_desc = 10; + num_1k_desc = 1; } return sizeof(struct hal_rx_reo_queue) + - (num_ext_desc * sizeof(struct hal_rx_reo_queue_ext)); + (num_ext_desc * sizeof(struct hal_rx_reo_queue_ext)) + + (num_1k_desc * sizeof(struct hal_rx_reo_queue_1k)); } void ath12k_hal_reo_qdesc_setup(struct hal_rx_reo_queue *qdesc, diff --git a/drivers/net/wireless/ath/ath12k/mac.c b/drivers/net/wireless/ath/ath12k/mac.c index fc0d14ea328e..3cfb17f71aa6 100644 --- a/drivers/net/wireless/ath/ath12k/mac.c +++ b/drivers/net/wireless/ath/ath12k/mac.c @@ -7474,7 +7474,7 @@ static int __ath12k_mac_register(struct ath12k *ar) ar->hw->queues = ATH12K_HW_MAX_QUEUES; ar->hw->wiphy->tx_queue_len = ATH12K_QUEUE_LEN; ar->hw->offchannel_tx_hw_queue = ATH12K_HW_MAX_QUEUES - 1; - ar->hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; + ar->hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_EHT; ar->hw->vif_data_size = sizeof(struct ath12k_vif); ar->hw->sta_data_size = sizeof(struct ath12k_sta); From patchwork Tue Nov 28 02:54:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baochen Qiang X-Patchwork-Id: 13470464 X-Patchwork-Delegate: kvalo@adurom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="DLKOaju+" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE5571AE for ; Mon, 27 Nov 2023 18:55:03 -0800 (PST) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AS0QAMX028995; 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Tue, 28 Nov 2023 02:54:59 GMT Received: from bqiang-SFF.qca.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 27 Nov 2023 18:54:58 -0800 From: Baochen Qiang To: CC: Subject: [PATCH 3/3] wifi: ath12k: change MAC buffer ring size to 2048 Date: Tue, 28 Nov 2023 10:54:40 +0800 Message-ID: <20231128025440.46988-4-quic_bqiang@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231128025440.46988-1-quic_bqiang@quicinc.com> References: <20231128025440.46988-1-quic_bqiang@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Uzu5Qg-63h2WfkfCpBnrIEIndOt3bdyP X-Proofpoint-GUID: Uzu5Qg-63h2WfkfCpBnrIEIndOt3bdyP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-28_01,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=841 priorityscore=1501 spamscore=0 impostorscore=0 adultscore=0 mlxscore=0 phishscore=0 suspectscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311280021 For WCN7850, there is a SRNG named MAC buffer ring, i.e., dp->rx_mac_buf_ring. During initialization, it is setup by host and then under control of firmware. During RX process, firmware fetches buffers from dp->rx_refill_buf_ring to fill that MAC buffer ring, and those buffers are taken by RXDMA to carry real WLAN frames received from air. Currently a low RX throughput is observed. Checking firmware log, lots of errors are reported by MAC buffer ring, complaining that it is running out of buffers, which further indicates that RXDMA is suffering from starvation. Currently the size of dp->rx_mac_buf_ring is configured as 1024. After changing it to 2048, those error messages are reduced, and a 6.4% increase is seen in peak throughput. Note that 2048 is an empirical value. It is chosen here because the RX throughput meets our expectation after the change. This change only applies to WCN7850 since other chips don't have a MAC buffer ring. Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0-03427-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1.15378.4 Signed-off-by: Baochen Qiang --- drivers/net/wireless/ath/ath12k/dp.h | 1 + drivers/net/wireless/ath/ath12k/dp_rx.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/ath/ath12k/dp.h b/drivers/net/wireless/ath/ath12k/dp.h index 50db1403ebce..ce55cb550379 100644 --- a/drivers/net/wireless/ath/ath12k/dp.h +++ b/drivers/net/wireless/ath/ath12k/dp.h @@ -165,6 +165,7 @@ struct ath12k_pdev_dp { #define DP_REO_CMD_RING_SIZE 128 #define DP_REO_STATUS_RING_SIZE 2048 #define DP_RXDMA_BUF_RING_SIZE 4096 +#define DP_RX_MAC_BUF_RING_SIZE 2048 #define DP_RXDMA_REFILL_RING_SIZE 2048 #define DP_RXDMA_ERR_DST_RING_SIZE 1024 #define DP_RXDMA_MON_STATUS_RING_SIZE 1024 diff --git a/drivers/net/wireless/ath/ath12k/dp_rx.c b/drivers/net/wireless/ath/ath12k/dp_rx.c index 9f831e3971f9..f6fbe867bbd4 100644 --- a/drivers/net/wireless/ath/ath12k/dp_rx.c +++ b/drivers/net/wireless/ath/ath12k/dp_rx.c @@ -4110,7 +4110,7 @@ int ath12k_dp_rx_alloc(struct ath12k_base *ab) ret = ath12k_dp_srng_setup(ab, &dp->rx_mac_buf_ring[i], HAL_RXDMA_BUF, 1, - i, 1024); + i, DP_RX_MAC_BUF_RING_SIZE); if (ret) { ath12k_warn(ab, "failed to setup rx_mac_buf_ring %d\n", i);