From patchwork Wed Nov 29 06:58:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13472315 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="cEftS8JL" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 334681BF1; Tue, 28 Nov 2023 22:58:46 -0800 (PST) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AT6TTHb029884; Wed, 29 Nov 2023 06:58:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=x4YrQBxlgo74+8dfHQMB7xkk9dQGsKXRq+NiTEsXrhM=; b=cEftS8JLm2fPIxYR+4qkMZtsS4Jq6z710swjrOozbQJJtQrW++nq1UXrmiE21eUOHKYI HLJ29Pox4ckKdN9dVfr/gorQwNzGhLbyJ6NOg/NjwB33N3EcU8H5zgICqseN+Nz1Y68o WIoPiHiW/FbIH3UGSNMyDJk2nBjkDCg3pu8Ih59vNSvGcuuXNs/LPq4kGGn7l9hh/3lo HUv9rITV2sPOST/4b5K8J9Z6usZc2XWAm0tOtguzZrUppGdIBcocAyW2oSbLasLvskW3 r1oFkWlQV3KduKspMbrwzVX3L9/pTCtA2vzd754+HClFe8D2wHxmp5S8VbrbNZ2YgMg5 LQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3up02xr2ut-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Nov 2023 06:58:42 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AT6wfO7027435 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Nov 2023 06:58:41 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 28 Nov 2023 22:58:38 -0800 From: Komal Bajaj To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Komal Bajaj , Krzysztof Kozlowski Subject: [PATCH v7 1/3] dt-bindings: arm: qcom: Add QCM6490 IDP and QCS6490 RB3Gen2 board Date: Wed, 29 Nov 2023 12:28:14 +0530 Message-ID: <20231129065816.26409-2-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231129065816.26409-1-quic_kbajaj@quicinc.com> References: <20231129065816.26409-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: bINyUZ5AhL6I18D6lOtNw1rmDrbvA1i- X-Proofpoint-GUID: bINyUZ5AhL6I18D6lOtNw1rmDrbvA1i- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-29_03,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=812 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311290049 Document the qcom,qcm6490-idp and qcs6490-rb3gen2 boards. qcm6490-idp based off qcm6490 SoC derived from sc7280 meant for various form factor including IoT and qcs6490-rb3gen2 based off qcs6490 SoC derivative of qcm6490 without internal modem. Co-developed by: Naina Mehta Signed-off by: Naina Mehta Signed-off-by: Komal Bajaj Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.42.0 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 7f80f48a0954..d384182ce3cd 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -397,6 +397,8 @@ properties: - items: - enum: - fairphone,fp5 + - qcom,qcm6490-idp + - qcom,qcs6490-rb3gen2 - const: qcom,qcm6490 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform From patchwork Wed Nov 29 06:58:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13472316 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="QHp2L2AO" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAEE31FDA; Tue, 28 Nov 2023 22:58:51 -0800 (PST) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AT5tsdS011930; Wed, 29 Nov 2023 06:58:48 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=Q2Kq8q6gh7P2DebT7nwv4Nw8XpZ3IBF8CvrvZhe2p2s=; b=QHp2L2AOB4u83zCVulXId9+r7tF1XZV1F3WTEqI4GQe3lj5Iioi3wOOoEpcnIK5WBDZ2 yfHzDRLHa62PMyf12uwTvmKqgZcE8rUK04odRnJ4knMl1Yov63BJ2vhDvPuzwOMpx/K+ 8KrXDjTQ/KgfLiffe3sRJ64AlUueI4xjpuMHGZbh6p+8dgD0Z9TxoO9VJJy5/nAuXhiy G6cXCUtoELM9K+oYtEKfBgnu0j25PMfXC3B1lRoV6SahRLvNjlWVnVMSEP982SphQbhO 380PqokGVuoZHPYuAovnGmsdeovrU1eJfpQt0MA9Te5FhI696DEMv2at3yj+FT4W9V3A gw== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3unjdtj3av-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Nov 2023 06:58:47 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AT6wk1Z017068 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 29 Nov 2023 06:58:46 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 28 Nov 2023 22:58:42 -0800 From: Komal Bajaj To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Komal Bajaj , "Caleb Connolly" Subject: [PATCH v7 2/3] arm64: dts: qcom: Add base qcm6490 idp board dts Date: Wed, 29 Nov 2023 12:28:15 +0530 Message-ID: <20231129065816.26409-3-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231129065816.26409-1-quic_kbajaj@quicinc.com> References: <20231129065816.26409-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ___upEBiRlHIcWfmmqT1mMOidl_3r7oQ X-Proofpoint-ORIG-GUID: ___upEBiRlHIcWfmmqT1mMOidl_3r7oQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-29_03,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 mlxscore=0 mlxlogscore=930 impostorscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311290049 Add DTS for Qualcomm IDP platform using QCM6490 SoC. This adds debug uart, eMMC and usb support along with regulators found on this board. Signed-off-by: Komal Bajaj Reviewed-by: Konrad Dybcio Reviewed-by: Caleb Connolly --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 465 +++++++++++++++++++++++ 2 files changed, 466 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcm6490-idp.dts -- 2.42.0 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index d6cb840b7050..77babebe4904 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -87,6 +87,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb dtb-$(CONFIG_ARCH_QCOM) += qcm6490-fairphone-fp5.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts new file mode 100644 index 000000000000..2a5631b0fa40 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts @@ -0,0 +1,465 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include +#include "sc7280.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" +#include "pmk8350.dtsi" + +/delete-node/ &ipa_fw_mem; +/delete-node/ &rmtfs_mem; +/delete-node/ &video_mem; +/delete-node/ &wlan_ce_mem; +/delete-node/ &xbl_mem; + +/ { + model = "Qualcomm Technologies, Inc. QCM6490 IDP"; + compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; + chassis-type = "embedded"; + + aliases { + serial0 = &uart5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + xbl_mem: xbl@80700000 { + reg = <0x0 0x80700000 0x0 0x100000>; + no-map; + }; + + cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { + reg = <0x0 0x81800000 0x0 0x1e00000>; + no-map; + }; + + camera_mem: camera@84300000 { + reg = <0x0 0x84300000 0x0 0x500000>; + no-map; + }; + + wpss_mem: wpss@84800000 { + reg = <0x0 0x84800000 0x0 0x1900000>; + no-map; + }; + + adsp_mem: adsp@86100000 { + reg = <0x0 0x86100000 0x0 0x2800000>; + no-map; + }; + + cdsp_mem: cdsp@88900000 { + reg = <0x0 0x88900000 0x0 0x1e00000>; + no-map; + }; + + video_mem: video@8a700000 { + reg = <0x0 0x8a700000 0x0 0x700000>; + no-map; + }; + + cvp_mem: cvp@8ae00000 { + reg = <0x0 0x8ae00000 0x0 0x500000>; + no-map; + }; + + ipa_fw_mem: ipa-fw@8b300000 { + reg = <0x0 0x8b300000 0x0 0x10000>; + no-map; + }; + + ipa_gsi_mem: ipa-gsi@8b310000 { + reg = <0x0 0x8b310000 0x0 0xa000>; + no-map; + }; + + gpu_microcode_mem: gpu-microcode@8b31a000 { + reg = <0x0 0x8b31a000 0x0 0x2000>; + no-map; + }; + + mpss_mem: mpss@8b800000 { + reg = <0x0 0x8b800000 0x0 0xf600000>; + no-map; + }; + + tz_stat_mem: tz-stat@c0000000 { + reg = <0x0 0xc0000000 0x0 0x100000>; + no-map; + }; + + tags_mem: tags@c0100000 { + reg = <0x0 0xc0100000 0x0 0x1200000>; + no-map; + }; + + qtee_mem: qtee@c1300000 { + reg = <0x0 0xc1300000 0x0 0x500000>; + no-map; + }; + + trusted_apps_mem: trusted_apps@c1800000 { + reg = <0x0 0xc1800000 0x0 0x1c00000>; + no-map; + }; + + debug_vm_mem: debug-vm@d0600000 { + reg = <0x0 0xd0600000 0x0 0x100000>; + no-map; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <4350000>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; + vdd-l2-l7-supply = <&vreg_bob_3p296>; + vdd-l3-supply = <&vreg_s2b_0p876>; + vdd-l5-supply = <&vreg_s2b_0p876>; + vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; + vdd-l8-supply = <&vreg_s7b_0p972>; + vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; + vdd-l13-supply = <&vreg_s7b_0p972>; + vdd-l14-l16-supply = <&vreg_s8b_1p272>; + + vreg_s1b_1p872: smps1 { + regulator-min-microvolt = <1840000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s2b_0p876: smps2 { + regulator-min-microvolt = <570070>; + regulator-max-microvolt = <1050000>; + }; + + vreg_s7b_0p972: smps7 { + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s8b_1p272: smps8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = ; + }; + + vreg_l1b_0p912: ldo1 { + regulator-min-microvolt = <825000>; + regulator-max-microvolt = <925000>; + regulator-initial-mode = ; + }; + + vreg_l2b_3p072: ldo2 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l3b_0p504: ldo3 { + regulator-min-microvolt = <312000>; + regulator-max-microvolt = <910000>; + regulator-initial-mode = ; + }; + + vreg_l4b_0p752: ldo4 { + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <820000>; + regulator-initial-mode = ; + }; + + reg_l5b_0p752: ldo5 { + regulator-min-microvolt = <552000>; + regulator-max-microvolt = <832000>; + regulator-initial-mode = ; + }; + + vreg_l6b_1p2: ldo6 { + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + }; + + vreg_l7b_2p952: ldo7 { + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8b_0p904: ldo8 { + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + }; + + vreg_l9b_1p2: ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l11b_1p504: ldo11 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l12b_0p751: ldo12 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = ; + }; + + vreg_l13b_0p53: ldo13 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = ; + }; + + vreg_l14b_1p08: ldo14 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l15b_0p765: ldo15 { + regulator-min-microvolt = <765000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = ; + }; + + vreg_l16b_1p1: ldo16 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + }; + + vreg_l17b_1p7: ldo17 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = ; + }; + + vreg_l18b_1p8: ldo18 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l19b_1p8: ldo19 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + vdd-l1-l12-supply = <&vreg_s1b_1p872>; + vdd-l2-l8-supply = <&vreg_s1b_1p872>; + vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob_3p296>; + vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; + vdd-l10-supply = <&vreg_s7b_0p972>; + vdd-bob-supply = <&vph_pwr>; + + vreg_s1c_2p19: smps1 { + regulator-min-microvolt = <2190000>; + regulator-max-microvolt = <2210000>; + }; + + vreg_s2c_0p752: smps2 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <800000>; + }; + + vreg_s5c_0p752: smps5 { + regulator-min-microvolt = <465000>; + regulator-max-microvolt = <1050000>; + }; + + vreg_s7c_0p752: smps7 { + regulator-min-microvolt = <465000>; + regulator-max-microvolt = <800000>; + }; + + vreg_s9c_1p084: smps9 { + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p62: ldo2 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l3c_2p8: ldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3540000>; + regulator-initial-mode = ; + }; + + vreg_l4c_1p62: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p62: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l6c_2p96: ldo6 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p62: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p96: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <35440000>; + regulator-initial-mode = ; + }; + + vreg_l10c_0p88: ldo10 { + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + }; + + vreg_l11c_2p8: ldo11 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l12c_1p65: ldo12 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l13c_2p7: ldo13 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_bob_3p296: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + }; + }; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&sdhc_1 { + non-removable; + no-sd; + no-sdio; + + vmmc-supply = <&vreg_l7b_2p952>; + vqmmc-supply = <&vreg_l19b_1p8>; + + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <32 2>, /* ADSP */ + <48 4>; /* NFC */ +}; + +&uart5 { + compatible = "qcom,geni-debug-uart"; + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l10c_0p88>; + vdda33-supply = <&vreg_l2b_3p072>; + vdda18-supply = <&vreg_l1c_1p8>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l6b_1p2>; + vdda-pll-supply = <&vreg_l1b_0p912>; + + status = "okay"; +}; + +&wifi { + memory-region = <&wlan_fw_mem>; +}; From patchwork Wed Nov 29 06:58:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13472317 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="MbknvEfS" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A24B1BC1; Tue, 28 Nov 2023 22:59:36 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AT4pAvj006778; Wed, 29 Nov 2023 06:59:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; 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Wed, 29 Nov 2023 06:58:52 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 28 Nov 2023 22:58:47 -0800 From: Komal Bajaj To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Komal Bajaj , "Naina Mehta" , Caleb Connolly Subject: [PATCH v7 3/3] arm64: dts: qcom: Add base qcs6490-rb3gen2 board dts Date: Wed, 29 Nov 2023 12:28:16 +0530 Message-ID: <20231129065816.26409-4-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231129065816.26409-1-quic_kbajaj@quicinc.com> References: <20231129065816.26409-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 0HiWjyrEA3BvRBRh_qnErCeuYa2Z2Z13 X-Proofpoint-ORIG-GUID: 0HiWjyrEA3BvRBRh_qnErCeuYa2Z2Z13 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-29_04,2023-11-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 phishscore=0 adultscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 suspectscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311290050 Add DTS for Qualcomm qcs6490-rb3gen2 board which uses QCS6490 SoC. This adds debug uart and usb support along with regulators found on this board. Co-developed-by: Naina Mehta Signed-off-by: Naina Mehta Signed-off-by: Komal Bajaj Reviewed-by: Konrad Dybcio Reviewed-by: Caleb Connolly --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 452 +++++++++++++++++++ 2 files changed, 453 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts -- 2.42.0 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 77babebe4904..4c0f9e4a2e5b 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -90,6 +90,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-fairphone-fp5.dtb dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb2210-rb1.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb4210-rb2.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts new file mode 100644 index 000000000000..0beab54c051e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -0,0 +1,452 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +/* PM7250B is configured to use SID8/9 */ +#define PM7250B_SID 8 +#define PM7250B_SID1 9 + +#include +#include "sc7280.dtsi" +#include "pm7250b.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" +#include "pmk8350.dtsi" + +/delete-node/ &ipa_fw_mem; +/delete-node/ &remoteproc_mpss; +/delete-node/ &rmtfs_mem; +/delete-node/ &video_mem; +/delete-node/ &wlan_ce_mem; +/delete-node/ &xbl_mem; + +/ { + model = "Qualcomm Technologies, Inc. Robotics RB3gen2"; + compatible = "qcom,qcs6490-rb3gen2", "qcom,qcm6490"; + chassis-type = "embedded"; + + aliases { + serial0 = &uart5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + xbl_mem: xbl@80700000 { + reg = <0x0 0x80700000 0x0 0x100000>; + no-map; + }; + + cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { + reg = <0x0 0x81800000 0x0 0x1e00000>; + no-map; + }; + + camera_mem: camera@84300000 { + reg = <0x0 0x84300000 0x0 0x500000>; + no-map; + }; + + wpss_mem: wpss@84800000 { + reg = <0x0 0x84800000 0x0 0x1900000>; + no-map; + }; + + adsp_mem: adsp@86100000 { + reg = <0x0 0x86100000 0x0 0x2800000>; + no-map; + }; + + cdsp_mem: cdsp@88900000 { + reg = <0x0 0x88900000 0x0 0x1e00000>; + no-map; + }; + + video_mem: video@8a700000 { + reg = <0x0 0x8a700000 0x0 0x700000>; + no-map; + }; + + cvp_mem: cvp@8ae00000 { + reg = <0x0 0x8ae00000 0x0 0x500000>; + no-map; + }; + + ipa_fw_mem: ipa-fw@8b300000 { + reg = <0x0 0x8b300000 0x0 0x10000>; + no-map; + }; + + ipa_gsi_mem: ipa-gsi@8b310000 { + reg = <0x0 0x8b310000 0x0 0xa000>; + no-map; + }; + + gpu_microcode_mem: gpu-microcode@8b31a000 { + reg = <0x0 0x8b31a000 0x0 0x2000>; + no-map; + }; + + tz_stat_mem: tz-stat@c0000000 { + reg = <0x0 0xc0000000 0x0 0x100000>; + no-map; + }; + + tags_mem: tags@c0100000 { + reg = <0x0 0xc0100000 0x0 0x1200000>; + no-map; + }; + + qtee_mem: qtee@c1300000 { + reg = <0x0 0xc1300000 0x0 0x500000>; + no-map; + }; + + trusted_apps_mem: trusted_apps@c1800000 { + reg = <0x0 0xc1800000 0x0 0x1c00000>; + no-map; + }; + + debug_vm_mem: debug-vm@d0600000 { + reg = <0x0 0xd0600000 0x0 0x100000>; + no-map; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <4350000>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm7325-rpmh-regulators"; + qcom,pmic-id = "b"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; + vdd-l2-l7-supply = <&vreg_bob_3p296>; + vdd-l3-supply = <&vreg_s2b_0p876>; + vdd-l5-supply = <&vreg_s2b_0p876>; + vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; + vdd-l8-supply = <&vreg_s7b_0p972>; + vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; + vdd-l13-supply = <&vreg_s7b_0p972>; + vdd-l14-l16-supply = <&vreg_s8b_1p272>; + + vreg_s1b_1p872: smps1 { + regulator-min-microvolt = <1840000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s2b_0p876: smps2 { + regulator-min-microvolt = <570070>; + regulator-max-microvolt = <1050000>; + }; + + vreg_s7b_0p972: smps7 { + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + }; + + vreg_s8b_1p272: smps8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-initial-mode = ; + }; + + vreg_l1b_0p912: ldo1 { + regulator-min-microvolt = <825000>; + regulator-max-microvolt = <925000>; + regulator-initial-mode = ; + }; + + vreg_l2b_3p072: ldo2 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l3b_0p504: ldo3 { + regulator-min-microvolt = <312000>; + regulator-max-microvolt = <910000>; + regulator-initial-mode = ; + }; + + vreg_l4b_0p752: ldo4 { + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <820000>; + regulator-initial-mode = ; + }; + + reg_l5b_0p752: ldo5 { + regulator-min-microvolt = <552000>; + regulator-max-microvolt = <832000>; + regulator-initial-mode = ; + }; + + vreg_l6b_1p2: ldo6 { + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + }; + + vreg_l7b_2p952: ldo7 { + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8b_0p904: ldo8 { + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + }; + + vreg_l9b_1p2: ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l11b_1p504: ldo11 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l12b_0p751: ldo12 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = ; + }; + + vreg_l13b_0p53: ldo13 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <824000>; + regulator-initial-mode = ; + }; + + vreg_l14b_1p08: ldo14 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l15b_0p765: ldo15 { + regulator-min-microvolt = <765000>; + regulator-max-microvolt = <1020000>; + regulator-initial-mode = ; + }; + + vreg_l16b_1p1: ldo16 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + }; + + vreg_l17b_1p7: ldo17 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = ; + }; + + vreg_l18b_1p8: ldo18 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l19b_1p8: ldo19 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm8350c-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + vdd-s7-supply = <&vph_pwr>; + vdd-s8-supply = <&vph_pwr>; + vdd-s9-supply = <&vph_pwr>; + vdd-s10-supply = <&vph_pwr>; + vdd-l1-l12-supply = <&vreg_s1b_1p872>; + vdd-l2-l8-supply = <&vreg_s1b_1p872>; + vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob_3p296>; + vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; + vdd-l10-supply = <&vreg_s7b_0p972>; + vdd-bob-supply = <&vph_pwr>; + + vreg_s1c_2p19: smps1 { + regulator-min-microvolt = <2190000>; + regulator-max-microvolt = <2210000>; + }; + + vreg_s2c_0p752: smps2 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <800000>; + }; + + vreg_s5c_0p752: smps5 { + regulator-min-microvolt = <465000>; + regulator-max-microvolt = <1050000>; + }; + + vreg_s7c_0p752: smps7 { + regulator-min-microvolt = <465000>; + regulator-max-microvolt = <800000>; + }; + + vreg_s9c_1p084: smps9 { + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p62: ldo2 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l3c_2p8: ldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3540000>; + regulator-initial-mode = ; + }; + + vreg_l4c_1p62: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p62: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l6c_2p96: ldo6 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p62: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l9c_2p96: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <35440000>; + regulator-initial-mode = ; + }; + + vreg_l10c_0p88: ldo10 { + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + }; + + vreg_l11c_2p8: ldo11 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l12c_1p65: ldo12 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l13c_2p7: ldo13 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_bob_3p296: bob { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3960000>; + }; + }; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <32 2>, /* ADSP */ + <48 4>; /* NFC */ +}; + +&uart5 { + compatible = "qcom,geni-debug-uart"; + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l10c_0p88>; + vdda33-supply = <&vreg_l2b_3p072>; + vdda18-supply = <&vreg_l1c_1p8>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l6b_1p2>; + vdda-pll-supply = <&vreg_l1b_0p912>; + + status = "okay"; +}; + +&wifi { + memory-region = <&wlan_fw_mem>; +};