From patchwork Thu Nov 30 16:11:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13474686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9FB5C4167B for ; Thu, 30 Nov 2023 16:12:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=yoFBS5EeAwIx58G0HmBY1o7eYlTrarKgFBTMY88gpWQ=; b=XS3FXugaLB0k0W NU/1ftCz+w263N/lZonrlwV/yzj/Iec80weFghZYM4bSSIMurkq/usGulZ9inZO2P/lzDMnQhQ4QR LbGhsUAyCqAN7fBg1PcDJWo28oYQQM5D+ZHK/GEnhfRt7jYtAcUQ2DV6ev9+J8l4QAVBf04+nEWy0 aY6/3vMa33Q0QLG8gR9kcVa/3ylJhGYBcuT6qnSN7ppTSmiadsV7BRBztH2wd7WcDLr4CED/rnf6H 62Txp+arIER6nN4JfFDDl5r/mRKjWQBTMij0tTT31Emo5hMbvOKaY5358h0R3rrNYG0ZxTIGMAkYJ l2ejc2DdgymcMJaNIapg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r8jdz-00BISl-2R; Thu, 30 Nov 2023 16:12:03 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r8jdw-00BIS5-27 for linux-riscv@lists.infradead.org; Thu, 30 Nov 2023 16:12:02 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by ams.source.kernel.org (Postfix) with ESMTP id 6E9FDB83C36; Thu, 30 Nov 2023 16:11:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E6BF3C433C9; Thu, 30 Nov 2023 16:11:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701360717; bh=vgls5aAlR31WZeeFitudv2gLn3KRn15unDZWj9i/v9g=; h=From:To:Cc:Subject:Date:From; b=qpFBB3YyXinuwQ+7fxRfXLLxKE0ptbNJCoa58UsrfVolYTGrIN1Pq9t4kjnmzbAHV bWQPN7icrc7LX8RweUK5aEZ8opCL1tGDyvFbhxkAGA8ZSpb8SzCCkGb4HBuk6znZmO 2adWWVogvmoQGNt2U0+c8jk98xkl87kJ8b44LsD0o8aAPdFeNkFUqB555ynQ+jWdhG cy5dVleeSgOvGWrVqSgZDEP/ueHS7LEWExLonaqssLT8PTbm5GMMG6zRIzFKN2hIrW DAmLMyyC+/qA1VrgqwObv6RHEa3mRsYY8PpvpeysPkQcRzyDBrNUZjICwA7onqEwQh WPofq+wUXfGwA== From: Conor Dooley To: linux-riscv@lists.infradead.org Cc: conor@kernel.org, Conor Dooley , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Walker Chen , JeeHeng Sia , Leyfoon Tan Subject: [PATCH v1] riscv: dts: starfive: move timebase-frequency to .dtsi Date: Thu, 30 Nov 2023 16:11:28 +0000 Message-Id: <20231130-bobbing-valid-b97f26fe8edc@spud> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3135; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=UAAVjF121WPRFea5qRuZ2irQEO1X8uw6HeaKklYIqBU=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKkZW3TOhG9ZnWv8re2Ju/KbiwqCtQG/lmyyaJXdO/3bn xOCvjP9OkpZGMQ4GGTFFFkSb/e1SK3/47LDuectzBxWJpAhDFycAjCRjAcMf/iuWffPjtxU3cd9 N3zyZtWHfUpdCbK2Fs/frk9RPli32Zfhf4r2nG9fpHmOTkrxrO1xYTKdyat5KOTL291Oja2JahF 1PAA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231130_081201_015147_75DF6800 X-CRM114-Status: GOOD ( 13.84 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley Properties fixed by the SoC should be defined in the $soc.dtsi, and the timebase-frequency is not sourced directly from an off-chip oscillator. Signed-off-by: Conor Dooley --- I actually have no idea whether this is true or not, I asked on the jh8100 series but only got an answer for that SoC and not the existing ones. I'm hoping that a patch envokes more of a reaction! CC: Emil Renner Berthing CC: Conor Dooley CC: Rob Herring CC: Krzysztof Kozlowski CC: Paul Walmsley CC: Palmer Dabbelt CC: linux-riscv@lists.infradead.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: Walker Chen CC: JeeHeng Sia CC: Leyfoon Tan --- arch/riscv/boot/dts/starfive/jh7100-common.dtsi | 4 ---- arch/riscv/boot/dts/starfive/jh7100.dtsi | 1 + .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ---- arch/riscv/boot/dts/starfive/jh7110.dtsi | 1 + 4 files changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi index b93ce351a90f..214f27083d7b 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -19,10 +19,6 @@ chosen { stdout-path = "serial0:115200n8"; }; - cpus { - timebase-frequency = <6250000>; - }; - memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x2 0x0>; diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index e68cafe7545f..c50b32424721 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -16,6 +16,7 @@ / { cpus { #address-cells = <1>; #size-cells = <0>; + timebase-frequency = <6250000>; U74_0: cpu@0 { compatible = "sifive,u74-mc", "riscv"; diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index b89e9791efa7..7873c7ffde4d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -26,10 +26,6 @@ chosen { stdout-path = "serial0:115200n8"; }; - cpus { - timebase-frequency = <4000000>; - }; - memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0x1 0x0>; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 45213cdf50dc..ee7d4bb1f537 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -18,6 +18,7 @@ / { cpus { #address-cells = <1>; #size-cells = <0>; + timebase-frequency = <4000000>; S7_0: cpu@0 { compatible = "sifive,s7", "riscv";