From patchwork Mon Dec 4 00:47:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477690 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4054AC4167B for ; Mon, 4 Dec 2023 00:51:08 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8A-0004hi-He; Sun, 03 Dec 2023 19:48:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x87-0004gz-5N for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:11 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x85-000163-NK for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650887; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Lp1q/BWuHKtsyc0Pp2ZWNDYZQcuu4upOXCfcp+F1D/g=; b=STXXCL4PytPGZn0/TOXM4PAFSUIIOzU3ipdoneQ4CXGL0mibxVYJS5aEjZ8vQ/0a7e2D21 W1oHCQKQgoN2QTqP+NoZA4MajC2L+9JotT0w/uqSQE7blIESn3gz46D4yZqxGkEGzaVav0 4BBOtpKH6vJ+Kr1W+XGnUXCbFqQFJqY= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-630-MLlmBdKgObKt-2QwCgrLaQ-1; Sun, 03 Dec 2023 19:47:59 -0500 X-MC-Unique: MLlmBdKgObKt-2QwCgrLaQ-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id EA2013C0E64C; Mon, 4 Dec 2023 00:47:57 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 277DF492BE0; Mon, 4 Dec 2023 00:47:49 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 1/9] machine: Use error handling when CPU type is checked Date: Mon, 4 Dec 2023 10:47:18 +1000 Message-ID: <20231204004726.483558-2-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Functions that use an Error **errp parameter to return errors should not also report them to the user, because reporting is the caller's job. The principle is violated by machine_run_board_init() because it calls error_report(), error_printf(), and exit(1) when the machine doesn't support the requested CPU type. Clean this up by using error_setg() and error_append_hint() instead. No functional change, as the only caller passes &error_fatal. Suggested-by: Igor Mammedov Signed-off-by: Gavin Shan Reviewed-by: Markus Armbruster --- v9: Improved change log (Markus) --- hw/core/machine.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 0c17398141..bde7f4af6d 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1466,15 +1466,16 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error * if (!machine_class->valid_cpu_types[i]) { /* The user specified CPU is not valid */ - error_report("Invalid CPU type: %s", machine->cpu_type); - error_printf("The valid types are: %s", - machine_class->valid_cpu_types[0]); + error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); + error_append_hint(errp, "The valid types are: %s", + machine_class->valid_cpu_types[0]); for (i = 1; machine_class->valid_cpu_types[i]; i++) { - error_printf(", %s", machine_class->valid_cpu_types[i]); + error_append_hint(errp, ", %s", + machine_class->valid_cpu_types[i]); } - error_printf("\n"); - exit(1); + error_append_hint(&errp, "\n"); + return; } } From patchwork Mon Dec 4 00:47:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477684 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 15DCCC4167B for ; Mon, 4 Dec 2023 00:49:27 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8I-0004lB-VE; Sun, 03 Dec 2023 19:48:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8C-0004ij-Fi for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:18 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x89-0001Ln-8e for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650892; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JpQAZaaun9SVQ9B+FBUJtZTWNDdCbSbBhnHehUA4e3s=; b=SiXQfmvkfJtBqNnPfkVRkoYahLj8SyqKGV7437FYQ92Pes1uJMNiBLtgn2qfhDv39w2M10 Tbz6XdMIdrMNV/fC2o2KwczX0sM031xO4vmm+sagI/LlWCJQprmIdGn9O/jY0yGoZKLL/u Zd+jXP5sj7tXAuxDfeUNx1p/9caapD4= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-463-Ce4Rt8oBP12oZ4iJ6jq7JA-1; Sun, 03 Dec 2023 19:48:07 -0500 X-MC-Unique: Ce4Rt8oBP12oZ4iJ6jq7JA-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id E3BBB185A782; Mon, 4 Dec 2023 00:48:05 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6B1F3492BE0; Mon, 4 Dec 2023 00:47:58 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 2/9] machine: Introduce helper is_cpu_type_supported() Date: Mon, 4 Dec 2023 10:47:19 +1000 Message-ID: <20231204004726.483558-3-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The logic, to check if the specified CPU type is supported in machine_run_board_init(), is independent enough. Factor it out into helper is_cpu_type_supported(). machine_run_board_init() looks a bit clean with this. Since we're here, @machine_class is renamed to @mc to avoid multiple line spanning of code. The comments are tweaked a bit either. No functional change intended. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé --- hw/core/machine.c | 83 +++++++++++++++++++++++++---------------------- 1 file changed, 45 insertions(+), 38 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index bde7f4af6d..1797e002f9 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1387,13 +1387,53 @@ out: return r; } +static bool is_cpu_type_supported(const MachineState *machine, Error **errp) +{ + MachineClass *mc = MACHINE_GET_CLASS(machine); + ObjectClass *oc = object_class_by_name(machine->cpu_type); + CPUClass *cc; + int i; + + /* + * Check if the user specified CPU type is supported when the valid + * CPU types have been determined. Note that the user specified CPU + * type is provided through '-cpu' option. + */ + if (mc->valid_cpu_types && machine->cpu_type) { + for (i = 0; mc->valid_cpu_types[i]; i++) { + if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { + break; + } + } + + /* The user specified CPU type isn't valid */ + if (!mc->valid_cpu_types[i]) { + error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); + error_append_hint(errp, "The valid types are: %s", + mc->valid_cpu_types[0]); + for (i = 1; mc->valid_cpu_types[i]; i++) { + error_append_hint(errp, ", %s", mc->valid_cpu_types[i]); + } + + error_append_hint(errp, "\n"); + return false; + } + } + + /* Check if CPU type is deprecated and warn if so */ + cc = CPU_CLASS(oc); + if (cc && cc->deprecation_note) { + warn_report("CPU model %s is deprecated -- %s", + machine->cpu_type, cc->deprecation_note); + } + + return true; +} void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) { ERRP_GUARD(); MachineClass *machine_class = MACHINE_GET_CLASS(machine); - ObjectClass *oc = object_class_by_name(machine->cpu_type); - CPUClass *cc; /* This checkpoint is required by replay to separate prior clock reading from the other reads, because timer polling functions query @@ -1448,42 +1488,9 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error * machine->ram = machine_consume_memdev(machine, machine->memdev); } - /* If the machine supports the valid_cpu_types check and the user - * specified a CPU with -cpu check here that the user CPU is supported. - */ - if (machine_class->valid_cpu_types && machine->cpu_type) { - int i; - - for (i = 0; machine_class->valid_cpu_types[i]; i++) { - if (object_class_dynamic_cast(oc, - machine_class->valid_cpu_types[i])) { - /* The user specified CPU is in the valid field, we are - * good to go. - */ - break; - } - } - - if (!machine_class->valid_cpu_types[i]) { - /* The user specified CPU is not valid */ - error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); - error_append_hint(errp, "The valid types are: %s", - machine_class->valid_cpu_types[0]); - for (i = 1; machine_class->valid_cpu_types[i]; i++) { - error_append_hint(errp, ", %s", - machine_class->valid_cpu_types[i]); - } - - error_append_hint(&errp, "\n"); - return; - } - } - - /* Check if CPU type is deprecated and warn if so */ - cc = CPU_CLASS(oc); - if (cc && cc->deprecation_note) { - warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, - cc->deprecation_note); + /* Check if the CPU type is supported */ + if (!is_cpu_type_supported(machine, errp)) { + return; } if (machine->cgs) { From patchwork Mon Dec 4 00:47:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66A33C07E97 for ; Mon, 4 Dec 2023 00:51:09 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8R-0004o2-Bd; Sun, 03 Dec 2023 19:48:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8J-0004lC-52 for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:25 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8H-0001ba-63 for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650900; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W+sBfUbkBu8GbdgecjTf7+hqFuVu0mmAyZFP7UyKFg4=; b=Yz43JpFpbR8+rqafW9VRJNhcYTANWuD7vTsD8Mnd7AxoLi2LKul7+l8KfG9y3bPKcQtI3f D+6y5HJxT/mTmOT55l5UrE/TWHzWuqL0SBrLoTwV0ROCNBx7E5QsBXeArFFhPaIl1pmTEC Cd2/rfLRl2Zr6stj4zo+XUEztVY5kSg= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-378-wjT2K2WkO3Wz5g1HrKdYmQ-1; Sun, 03 Dec 2023 19:48:15 -0500 X-MC-Unique: wjT2K2WkO3Wz5g1HrKdYmQ-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id C4265811E7B; Mon, 4 Dec 2023 00:48:13 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7793C492BE0; Mon, 4 Dec 2023 00:48:06 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 3/9] machine: Improve is_cpu_type_supported() Date: Mon, 4 Dec 2023 10:47:20 +1000 Message-ID: <20231204004726.483558-4-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org It's no sense to check the CPU type when mc->valid_cpu_types[0] is NULL, which is a program error. Raise an assert on this. A precise hint for the error message is given when mc->valid_cpu_types[0] is the only valid entry. Besides, enumeration on mc->valid_cpu_types[0] when we have mutiple valid entries there is avoided to increase the code readability, as suggested by Philippe Mathieu-Daudé. Besides, @cc comes from machine->cpu_type or mc->default_cpu_type. For the later case, it can be NULL and it's also a program error. We should use assert() in this case. Signed-off-by: Gavin Shan v9: assert(mc->valid_cpu_types[0] != NULL) (Phil) assert(cc != NULL); (Phil) --- hw/core/machine.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 1797e002f9..4ae9aaee8e 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1400,6 +1400,7 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp) * type is provided through '-cpu' option. */ if (mc->valid_cpu_types && machine->cpu_type) { + assert(mc->valid_cpu_types[0] != NULL); for (i = 0; mc->valid_cpu_types[i]; i++) { if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { break; @@ -1409,20 +1410,27 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp) /* The user specified CPU type isn't valid */ if (!mc->valid_cpu_types[i]) { error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); - error_append_hint(errp, "The valid types are: %s", - mc->valid_cpu_types[0]); - for (i = 1; mc->valid_cpu_types[i]; i++) { - error_append_hint(errp, ", %s", mc->valid_cpu_types[i]); + if (!mc->valid_cpu_types[1]) { + error_append_hint(errp, "The only valid type is: %s\n", + mc->valid_cpu_types[0]); + } else { + error_append_hint(errp, "The valid types are: "); + for (i = 0; mc->valid_cpu_types[i]; i++) { + error_append_hint(errp, "%s%s", + mc->valid_cpu_types[i], + mc->valid_cpu_types[i + 1] ? ", " : ""); + } + error_append_hint(errp, "\n"); } - error_append_hint(errp, "\n"); return false; } } /* Check if CPU type is deprecated and warn if so */ cc = CPU_CLASS(oc); - if (cc && cc->deprecation_note) { + assert(cc != NULL); + if (cc->deprecation_note) { warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, cc->deprecation_note); } From patchwork Mon Dec 4 00:47:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477689 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1FE67C4167B for ; Mon, 4 Dec 2023 00:51:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8T-0004ok-0I; Sun, 03 Dec 2023 19:48:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8R-0004nd-1s for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:31 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8P-0001oF-34 for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650908; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gpbV82qGBKd5oIHMbMKLl4F0HFwfyL0yOGTqandIxRk=; b=SEXWI5Cw/0kBT5EIvCGCv+3VnnpkeM09b2HnSFeH1qv7xeaJAyvIqsdUqexTa3zOJ7P3tp VT/fwdCNuw9zlMK02yr+qNl/3DTcjj/o8V46Bxl/NdNUghrNbPau8H/4HCA8hPodKjVk3X G5CpOHjo2E6Ne5pDkFJWnDh65AIaexs= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-524-3_JiSl4pNEqPU4ewERfprA-1; Sun, 03 Dec 2023 19:48:23 -0500 X-MC-Unique: 3_JiSl4pNEqPU4ewERfprA-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 17B3A185A780; Mon, 4 Dec 2023 00:48:22 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5C624492BE0; Mon, 4 Dec 2023 00:48:14 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 4/9] machine: Print CPU model name instead of CPU type Date: Mon, 4 Dec 2023 10:47:21 +1000 Message-ID: <20231204004726.483558-5-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The names of supported CPU models instead of CPU types should be printed when the user specified CPU type isn't supported, to be consistent with the output from '-cpu ?'. Correct the error messages to print CPU model names instead of CPU type names. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé --- hw/core/machine.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 4ae9aaee8e..bc9c3e7dcd 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1409,15 +1409,19 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp) /* The user specified CPU type isn't valid */ if (!mc->valid_cpu_types[i]) { - error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); + g_autofree char *requested = cpu_model_from_type(machine->cpu_type); + error_setg(errp, "Invalid CPU model: %s", requested); if (!mc->valid_cpu_types[1]) { - error_append_hint(errp, "The only valid type is: %s\n", - mc->valid_cpu_types[0]); + g_autofree char *model = cpu_model_from_type( + mc->valid_cpu_types[0]); + error_append_hint(errp, "The only valid type is: %s\n", model); } else { - error_append_hint(errp, "The valid types are: "); + error_append_hint(errp, "The valid models are: "); for (i = 0; mc->valid_cpu_types[i]; i++) { + g_autofree char *model = cpu_model_from_type( + mc->valid_cpu_types[i]); error_append_hint(errp, "%s%s", - mc->valid_cpu_types[i], + model, mc->valid_cpu_types[i + 1] ? ", " : ""); } error_append_hint(errp, "\n"); From patchwork Mon Dec 4 00:47:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFC31C4167B for ; Mon, 4 Dec 2023 00:50:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8f-00054I-Lp; Sun, 03 Dec 2023 19:48:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8Y-0004tC-T8 for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:39 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8X-0001pH-HP for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650916; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d7NYObB3HzjLGvBykfZzqKbWPtYH6Ie46SXcxizf7tY=; b=in7wNlwh1BBfC9aLDk+oYvIUmdP5BLXOF42oa6XPa9HTwvmEHqbR6IzbjOY3O/YKRmId/o QnOSwuxOFqxBgfblYxvtW6XpN5EopKwYa9K/GtV7hIgMGuA5YAi3GphGmsrrzbCPjl779e 6x09Ah2lNFmfXI8RDJdtuaN6V1lptyc= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-49-HliDh_PwNhe64Uoz8Rrj8g-1; Sun, 03 Dec 2023 19:48:31 -0500 X-MC-Unique: HliDh_PwNhe64Uoz8Rrj8g-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 4E23285A5B5; Mon, 4 Dec 2023 00:48:30 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A50B5492BE0; Mon, 4 Dec 2023 00:48:22 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 5/9] hw/arm/virt: Hide host CPU model for tcg Date: Mon, 4 Dec 2023 10:47:22 +1000 Message-ID: <20231204004726.483558-6-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The 'host' CPU model isn't available until KVM or HVF is enabled. For example, the following error messages are seen when the guest is started with option '-cpu cortex-a8' on tcg after the next commit is applied to check the CPU type in machine_run_board_init(). ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \ assertion failed: (model != NULL) Bail out! ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \ assertion failed: (model != NULL) Aborted (core dumped) Hide 'host' CPU model until KVM or HVF is enabled. With this applied, the valid CPU models can be shown. qemu-system-aarch64: Invalid CPU type: cortex-a8 The valid types are: cortex-a7, cortex-a15, cortex-a35, \ cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \ neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53, \ cortex-a57, max Signed-off-by: Gavin Shan Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index be2856c018..668c0d3194 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -220,7 +220,9 @@ static const char *valid_cpus[] = { #endif ARM_CPU_TYPE_NAME("cortex-a53"), ARM_CPU_TYPE_NAME("cortex-a57"), +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) ARM_CPU_TYPE_NAME("host"), +#endif ARM_CPU_TYPE_NAME("max"), }; From patchwork Mon Dec 4 00:47:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477687 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E88C6C10DC3 for ; Mon, 4 Dec 2023 00:50:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8h-00059d-Cg; Sun, 03 Dec 2023 19:48:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8f-00054a-NN for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:45 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8d-0001pv-O5 for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650923; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/Jgzcsw4wi9TdGHuAd1FUF0BAgtVYLmWUIhdAchC7Ww=; b=RshPAJqZJzKae3ODNcfAvVgVc73Fp+yvm5v9Q2QgfPtWE/60YcuXVXcf7YSUe7/jsav3Sw 7VfJLcueyIltZZKOmfHjZQOwTHBoDvtquLOuySZdKrIQ3vHwPMsL365Vi1tNPLHwnWrUNv Jth5yNg7y9WXQcPpJoH7xGPtjS5P+kw= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-423-0U6QGPH_Pkq9WXrnNUqvGw-1; Sun, 03 Dec 2023 19:48:39 -0500 X-MC-Unique: 0U6QGPH_Pkq9WXrnNUqvGw-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id AFA7E8007B3; Mon, 4 Dec 2023 00:48:38 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E0168492BE0; Mon, 4 Dec 2023 00:48:30 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 6/9] hw/arm/virt: Check CPU type in machine_run_board_init() Date: Mon, 4 Dec 2023 10:47:23 +1000 Message-ID: <20231204004726.483558-7-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do the check by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/arm/virt.c | 62 +++++++++++++++++++-------------------------------- 1 file changed, 23 insertions(+), 39 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 668c0d3194..04f9f5fa56 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -204,40 +204,6 @@ static const int a15irqmap[] = { [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */ }; -static const char *valid_cpus[] = { -#ifdef CONFIG_TCG - ARM_CPU_TYPE_NAME("cortex-a7"), - ARM_CPU_TYPE_NAME("cortex-a15"), - ARM_CPU_TYPE_NAME("cortex-a35"), - ARM_CPU_TYPE_NAME("cortex-a55"), - ARM_CPU_TYPE_NAME("cortex-a72"), - ARM_CPU_TYPE_NAME("cortex-a76"), - ARM_CPU_TYPE_NAME("cortex-a710"), - ARM_CPU_TYPE_NAME("a64fx"), - ARM_CPU_TYPE_NAME("neoverse-n1"), - ARM_CPU_TYPE_NAME("neoverse-v1"), - ARM_CPU_TYPE_NAME("neoverse-n2"), -#endif - ARM_CPU_TYPE_NAME("cortex-a53"), - ARM_CPU_TYPE_NAME("cortex-a57"), -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) - ARM_CPU_TYPE_NAME("host"), -#endif - ARM_CPU_TYPE_NAME("max"), -}; - -static bool cpu_type_valid(const char *cpu) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) { - if (strcmp(cpu, valid_cpus[i]) == 0) { - return true; - } - } - return false; -} - static void create_randomness(MachineState *ms, const char *node) { struct { @@ -2041,11 +2007,6 @@ static void machvirt_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; unsigned int max_cpus = machine->smp.max_cpus; - if (!cpu_type_valid(machine->cpu_type)) { - error_report("mach-virt: CPU type %s not supported", machine->cpu_type); - exit(1); - } - possible_cpus = mc->possible_cpu_arch_ids(machine); /* @@ -2939,6 +2900,28 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + static const char * const valid_cpu_types[] = { +#ifdef CONFIG_TCG + ARM_CPU_TYPE_NAME("cortex-a7"), + ARM_CPU_TYPE_NAME("cortex-a15"), + ARM_CPU_TYPE_NAME("cortex-a35"), + ARM_CPU_TYPE_NAME("cortex-a55"), + ARM_CPU_TYPE_NAME("cortex-a72"), + ARM_CPU_TYPE_NAME("cortex-a76"), + ARM_CPU_TYPE_NAME("cortex-a710"), + ARM_CPU_TYPE_NAME("a64fx"), + ARM_CPU_TYPE_NAME("neoverse-n1"), + ARM_CPU_TYPE_NAME("neoverse-v1"), + ARM_CPU_TYPE_NAME("neoverse-n2"), +#endif + ARM_CPU_TYPE_NAME("cortex-a53"), + ARM_CPU_TYPE_NAME("cortex-a57"), +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) + ARM_CPU_TYPE_NAME("host"), +#endif + ARM_CPU_TYPE_NAME("max"), + NULL + }; mc->init = machvirt_init; /* Start with max_cpus set to 512, which is the maximum supported by KVM. @@ -2965,6 +2948,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) #else mc->default_cpu_type = ARM_CPU_TYPE_NAME("max"); #endif + mc->valid_cpu_types = valid_cpu_types; mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; mc->kvm_type = virt_kvm_type; assert(!mc->get_hotplug_handler); From patchwork Mon Dec 4 00:47:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42C5CC10F05 for ; Mon, 4 Dec 2023 00:51:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x8s-0005lO-LF; Sun, 03 Dec 2023 19:48:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8q-0005YV-G0 for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:56 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8o-0001rE-QH for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:48:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=i8Sp/8SK4743lQGwgH+4VWrbTnWzFB9u/QLRM/j3xU8=; b=Xcn9hrGtaa476BCFD3Yq5HgHEX9I+VVBuqamfsE/GsPtFowYfjVRlK6je2SGWSVQrfae1M jpTqq5LuRSHL3kJV3KTCZa5EFsNbuGXBdgc5gz1qJDNFcva+pWKzLR+9K9H0Mm7Mbm46k4 +bPpL5RoPsfxD+UyMq0yNdxl42viF3c= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-694-3U4DFAOQM6yVAvagJvXCfA-1; Sun, 03 Dec 2023 19:48:47 -0500 X-MC-Unique: 3U4DFAOQM6yVAvagJvXCfA-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id C6D5738C6161; Mon, 4 Dec 2023 00:48:46 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 303B5492BE0; Mon, 4 Dec 2023 00:48:38 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 7/9] hw/arm/sbsa-ref: Check CPU type in machine_run_board_init() Date: Mon, 4 Dec 2023 10:47:24 +1000 Message-ID: <20231204004726.483558-8-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do it by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Leif Lindholm Reviewed-by: Richard Henderson --- hw/arm/sbsa-ref.c | 36 ++++++++++-------------------------- 1 file changed, 10 insertions(+), 26 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index f3c9704693..477dca0637 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -145,27 +145,6 @@ static const int sbsa_ref_irqmap[] = { [SBSA_GWDT_WS0] = 16, }; -static const char * const valid_cpus[] = { - ARM_CPU_TYPE_NAME("cortex-a57"), - ARM_CPU_TYPE_NAME("cortex-a72"), - ARM_CPU_TYPE_NAME("neoverse-n1"), - ARM_CPU_TYPE_NAME("neoverse-v1"), - ARM_CPU_TYPE_NAME("neoverse-n2"), - ARM_CPU_TYPE_NAME("max"), -}; - -static bool cpu_type_valid(const char *cpu) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) { - if (strcmp(cpu, valid_cpus[i]) == 0) { - return true; - } - } - return false; -} - static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) { uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER; @@ -733,11 +712,6 @@ static void sbsa_ref_init(MachineState *machine) const CPUArchIdList *possible_cpus; int n, sbsa_max_cpus; - if (!cpu_type_valid(machine->cpu_type)) { - error_report("sbsa-ref: CPU type %s not supported", machine->cpu_type); - exit(1); - } - if (kvm_enabled()) { error_report("sbsa-ref: KVM is not supported for this machine"); exit(1); @@ -898,10 +872,20 @@ static void sbsa_ref_instance_init(Object *obj) static void sbsa_ref_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a57"), + ARM_CPU_TYPE_NAME("cortex-a72"), + ARM_CPU_TYPE_NAME("neoverse-n1"), + ARM_CPU_TYPE_NAME("neoverse-v1"), + ARM_CPU_TYPE_NAME("neoverse-n2"), + ARM_CPU_TYPE_NAME("max"), + NULL, + }; mc->init = sbsa_ref_init; mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1"); + mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = 512; mc->pci_allow_0_address = true; mc->minimum_page_bits = 12; From patchwork Mon Dec 4 00:47:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477688 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 294F2C4167B for ; Mon, 4 Dec 2023 00:50:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x9D-0006RV-3t; Sun, 03 Dec 2023 19:49:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8z-00069W-Mi for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:49:06 -0500 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x8w-0001sA-7s for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:49:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650941; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JLiUCgwXtj6Utf2Ug+t9g0+q+oyiiqO7qitdLg4LXlw=; b=H0WRgahd+LK+AWfEmlQPdPkUBaUmCLU7drdHGGvUV/qpxTqlbvdzF2NTblNrt+FOj3HhvN 2uU9DY7NgWaNOO5h2OaznaZhz99uf+cfuLqe1i9b3E6TTpO2VqamVgj8Qms+OlBWTOqyus BAt3Pn01FjOyB2auhOXdjK1biYPGPq0= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-606-knXx8Z2TOsmwHYaWdMAIKg-1; Sun, 03 Dec 2023 19:48:56 -0500 X-MC-Unique: knXx8Z2TOsmwHYaWdMAIKg-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 5BDF11C060EA; Mon, 4 Dec 2023 00:48:55 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 517DD492BE0; Mon, 4 Dec 2023 00:48:47 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 8/9] hw/arm: Check CPU type in machine_run_board_init() Date: Mon, 4 Dec 2023 10:47:25 +1000 Message-ID: <20231204004726.483558-9-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do it by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/bananapi_m2u.c | 12 ++++++------ hw/arm/cubieboard.c | 12 ++++++------ hw/arm/mps2-tz.c | 26 ++++++++++++++++++++------ hw/arm/mps2.c | 26 ++++++++++++++++++++------ hw/arm/msf2-som.c | 12 ++++++------ hw/arm/musca.c | 12 +++++------- hw/arm/npcm7xx_boards.c | 12 +++++------- hw/arm/orangepi.c | 12 ++++++------ 8 files changed, 74 insertions(+), 50 deletions(-) diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c index 8f24b18d8c..0a4b6f29b1 100644 --- a/hw/arm/bananapi_m2u.c +++ b/hw/arm/bananapi_m2u.c @@ -71,12 +71,6 @@ static void bpim2u_init(MachineState *machine) exit(1); } - /* Only allow Cortex-A7 for this board */ - if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) { - error_report("This board can only be used with cortex-a7 CPU"); - exit(1); - } - r40 = AW_R40(object_new(TYPE_AW_R40)); object_property_add_child(OBJECT(machine), "soc", OBJECT(r40)); object_unref(OBJECT(r40)); @@ -133,12 +127,18 @@ static void bpim2u_init(MachineState *machine) static void bpim2u_machine_init(MachineClass *mc) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a7"), + NULL + }; + mc->desc = "Bananapi M2U (Cortex-A7)"; mc->init = bpim2u_init; mc->min_cpus = AW_R40_NUM_CPUS; mc->max_cpus = AW_R40_NUM_CPUS; mc->default_cpus = AW_R40_NUM_CPUS; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_ram_id = "bpim2u.ram"; } diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index 29146f5018..b976727eef 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -52,12 +52,6 @@ static void cubieboard_init(MachineState *machine) exit(1); } - /* Only allow Cortex-A8 for this board */ - if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a8")) != 0) { - error_report("This board can only be used with cortex-a8 CPU"); - exit(1); - } - a10 = AW_A10(object_new(TYPE_AW_A10)); object_property_add_child(OBJECT(machine), "soc", OBJECT(a10)); object_unref(OBJECT(a10)); @@ -114,8 +108,14 @@ static void cubieboard_init(MachineState *machine) static void cubieboard_machine_init(MachineClass *mc) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a8"), + NULL + }; + mc->desc = "cubietech cubieboard (Cortex-A8)"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->init = cubieboard_init; mc->block_default_type = IF_IDE; diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 668db5ed61..5d8cdc1a4c 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -813,12 +813,6 @@ static void mps2tz_common_init(MachineState *machine) int num_ppcs; int i; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - if (machine->ram_size != mc->default_ram_size) { char *sz = size_to_str(mc->default_ram_size); error_report("Invalid RAM size, should be %s", sz); @@ -1318,6 +1312,10 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m33"), + NULL + }; mc->desc = "ARM MPS2 with AN505 FPGA image for Cortex-M33"; mc->default_cpus = 1; @@ -1325,6 +1323,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN505; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045050; mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */ mmc->apb_periph_frq = mmc->sysclk_frq; @@ -1347,6 +1346,10 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m33"), + NULL + }; mc->desc = "ARM MPS2 with AN521 FPGA image for dual Cortex-M33"; mc->default_cpus = 2; @@ -1354,6 +1357,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN521; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045210; mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */ mmc->apb_periph_frq = mmc->sysclk_frq; @@ -1376,6 +1380,10 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m33"), + NULL + }; mc->desc = "ARM MPS3 with AN524 FPGA image for dual Cortex-M33"; mc->default_cpus = 2; @@ -1383,6 +1391,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN524; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045240; mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */ mmc->apb_periph_frq = mmc->sysclk_frq; @@ -1410,6 +1419,10 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m55"), + NULL + }; mc->desc = "ARM MPS3 with AN547 FPGA image for Cortex-M55"; mc->default_cpus = 1; @@ -1417,6 +1430,7 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN547; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m55"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41055470; mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */ mmc->apb_periph_frq = 25 * 1000 * 1000; /* 25MHz */ diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 292a180ad2..bd873cc5de 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -142,12 +142,6 @@ static void mps2_common_init(MachineState *machine) QList *oscclk; int i; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - if (machine->ram_size != mc->default_ram_size) { char *sz = size_to_str(mc->default_ram_size); error_report("Invalid RAM size, should be %s", sz); @@ -484,10 +478,15 @@ static void mps2_an385_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m3"), + NULL + }; mc->desc = "ARM MPS2 with AN385 FPGA image for Cortex-M3"; mmc->fpga_type = FPGA_AN385; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41043850; mmc->psram_base = 0x21000000; mmc->ethernet_base = 0x40200000; @@ -498,10 +497,15 @@ static void mps2_an386_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m4"), + NULL + }; mc->desc = "ARM MPS2 with AN386 FPGA image for Cortex-M4"; mmc->fpga_type = FPGA_AN386; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41043860; mmc->psram_base = 0x21000000; mmc->ethernet_base = 0x40200000; @@ -512,10 +516,15 @@ static void mps2_an500_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m7"), + NULL + }; mc->desc = "ARM MPS2 with AN500 FPGA image for Cortex-M7"; mmc->fpga_type = FPGA_AN500; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m7"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045000; mmc->psram_base = 0x60000000; mmc->ethernet_base = 0xa0000000; @@ -526,10 +535,15 @@ static void mps2_an511_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); MPS2MachineClass *mmc = MPS2_MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m3"), + NULL + }; mc->desc = "ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3"; mmc->fpga_type = FPGA_AN511; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045110; mmc->psram_base = 0x21000000; mmc->ethernet_base = 0x40200000; diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index 7b3106c790..eb74b23797 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -55,12 +55,6 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) MemoryRegion *ddr = g_new(MemoryRegion, 1); Clock *m3clk; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE, &error_fatal); memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); @@ -106,9 +100,15 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) static void emcraft_sf2_machine_init(MachineClass *mc) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m3"), + NULL + }; + mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)"; mc->init = emcraft_sf2_s2s010_init; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types = valid_cpu_types; } DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 6eeee57c9d..770ec1a15c 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -355,7 +355,6 @@ static void musca_init(MachineState *machine) { MuscaMachineState *mms = MUSCA_MACHINE(machine); MuscaMachineClass *mmc = MUSCA_MACHINE_GET_CLASS(mms); - MachineClass *mc = MACHINE_GET_CLASS(machine); MemoryRegion *system_memory = get_system_memory(); DeviceState *ssedev; DeviceState *dev_splitter; @@ -366,12 +365,6 @@ static void musca_init(MachineState *machine) assert(mmc->num_irqs <= MUSCA_NUMIRQ_MAX); assert(mmc->num_mpcs <= MUSCA_MPC_MAX); - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - mms->sysclk = clock_new(OBJECT(machine), "SYSCLK"); clock_set_hz(mms->sysclk, SYSCLK_FRQ); mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK"); @@ -604,11 +597,16 @@ static void musca_init(MachineState *machine) static void musca_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m33"), + NULL + }; mc->default_cpus = 2; mc->min_cpus = mc->default_cpus; mc->max_cpus = mc->default_cpus; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mc->init = musca_init; } diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index 2aef579aac..2999b8b96d 100644 --- a/hw/arm/npcm7xx_boards.c +++ b/hw/arm/npcm7xx_boards.c @@ -121,15 +121,8 @@ static NPCM7xxState *npcm7xx_create_soc(MachineState *machine, uint32_t hw_straps) { NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine); - MachineClass *mc = MACHINE_CLASS(nmc); Object *obj; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with %s", - mc->default_cpu_type); - exit(1); - } - obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc", &error_abort, NULL); object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort); @@ -463,12 +456,17 @@ static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type) static void npcm7xx_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; mc->no_floppy = 1; mc->no_cdrom = 1; mc->no_parallel = 1; mc->default_ram_id = "ram"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types = valid_cpu_types; } /* diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index f3784d45ca..77e328191d 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -49,12 +49,6 @@ static void orangepi_init(MachineState *machine) exit(1); } - /* Only allow Cortex-A7 for this board */ - if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) { - error_report("This board can only be used with cortex-a7 CPU"); - exit(1); - } - h3 = AW_H3(object_new(TYPE_AW_H3)); object_property_add_child(OBJECT(machine), "soc", OBJECT(h3)); object_unref(OBJECT(h3)); @@ -111,6 +105,11 @@ static void orangepi_init(MachineState *machine) static void orangepi_machine_init(MachineClass *mc) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a7"), + NULL + }; + mc->desc = "Orange Pi PC (Cortex-A7)"; mc->init = orangepi_init; mc->block_default_type = IF_SD; @@ -119,6 +118,7 @@ static void orangepi_machine_init(MachineClass *mc) mc->max_cpus = AW_H3_NUM_CPUS; mc->default_cpus = AW_H3_NUM_CPUS; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_ram_id = "orangepi.ram"; } From patchwork Mon Dec 4 00:47:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13477685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF4C7C4167B for ; Mon, 4 Dec 2023 00:49:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r9x9O-0006tz-8p; Sun, 03 Dec 2023 19:49:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x99-0006Ni-0U for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:49:17 -0500 Received: from us-smtp-delivery-124.mimecast.com ([216.145.221.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r9x96-0001ul-QI for qemu-devel@nongnu.org; Sun, 03 Dec 2023 19:49:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1701650951; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JVyfjLzyQs0XZ2Tf2HNNgNKUbfHJiHRiECV6o6YVcyQ=; b=L4dq9BQWD9X3Jo49kGboLw0qCbUYxbKELsiK6sW3s7sVboNDrojs1T4lMyACCPRctmnS+H BSlS2qgygX/wsQZvZCrY776B2FHgxvpaOwl4pw6sOwTPg7XhdLjajtcZvmuFXNvxGA3s3B DPpYkufTmMIjYOEIw6fKfLkLRp2eX2g= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-2-8Ayeq6h7MLm6Im-iWCNtyA-1; Sun, 03 Dec 2023 19:49:05 -0500 X-MC-Unique: 8Ayeq6h7MLm6Im-iWCNtyA-1 Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id B4DFE8314FD; Mon, 4 Dec 2023 00:49:03 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.61]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D0C4E492BE0; Mon, 4 Dec 2023 00:48:55 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, imammedo@redhat.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, armbru@redhat.com, wangyanan55@huawei.com, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, shan.gavin@gmail.com Subject: [PATCH v9 9/9] hw/riscv/shakti_c: Check CPU type in machine_run_board_init() Date: Mon, 4 Dec 2023 10:47:26 +1000 Message-ID: <20231204004726.483558-10-gshan@redhat.com> In-Reply-To: <20231204004726.483558-1-gshan@redhat.com> References: <20231204004726.483558-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass client-ip=216.145.221.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do it by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé --- hw/riscv/shakti_c.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c index 12ea74b032..3888034c2b 100644 --- a/hw/riscv/shakti_c.c +++ b/hw/riscv/shakti_c.c @@ -28,7 +28,6 @@ #include "exec/address-spaces.h" #include "hw/riscv/boot.h" - static const struct MemmapEntry { hwaddr base; hwaddr size; @@ -47,12 +46,6 @@ static void shakti_c_machine_state_init(MachineState *mstate) ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate); MemoryRegion *system_memory = get_system_memory(); - /* Allow only Shakti C CPU for this platform */ - if (strcmp(mstate->cpu_type, TYPE_RISCV_CPU_SHAKTI_C) != 0) { - error_report("This board can only be used with Shakti C CPU"); - exit(1); - } - /* Initialize SoC */ object_initialize_child(OBJECT(mstate), "soc", &sms->soc, TYPE_RISCV_SHAKTI_SOC); @@ -82,9 +75,15 @@ static void shakti_c_machine_instance_init(Object *obj) static void shakti_c_machine_class_init(ObjectClass *klass, void *data) { MachineClass *mc = MACHINE_CLASS(klass); + static const char * const valid_cpu_types[] = { + RISCV_CPU_TYPE_NAME("shakti-c"), + NULL + }; + mc->desc = "RISC-V Board compatible with Shakti SDK"; mc->init = shakti_c_machine_state_init; mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C; + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_id = "riscv.shakti.c.ram"; }