From patchwork Thu Dec 14 15:02:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 13493169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DEBE2C4332F for ; Thu, 14 Dec 2023 15:03:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=b+IrxvqkMswX72UF33mFvVpbIGDQwpHbUNEiOtrwnKY=; b=GtQFrgVwGDJefC +UAD4OYFXQHcWz9uV1rZ1pCpqRyjE/+7UVR+QH9UeFoqNtuuEhN1eqQQE3UtgsnqFW78oae9qKfx3 Mh5JmLwZFo/6i0cOHpy7w1/G/cVPxplXfhdpVEirfJ1Duq/qQwvap/s0xsMdRTmjllv40whL01C4f G0v0YL3T9t4h594YvucUww7Hqt2lcNnY7u6eltU9u4cXErWnL5V99HeTK0ZqRE/bcIUGuN0pJIeOy Klx0tQIJUh44bJ584q90Yv9foh4060i19zf/KyQDhQOgBX2Qzwg9y5ZPYvEDJ5LtYgY8aBkqL4pYp dvb5jmdBtecYsBgx2tlg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rDnEm-000c6X-36; Thu, 14 Dec 2023 15:02:56 +0000 Received: from mx1.tq-group.com ([93.104.207.81]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rDnEe-000c0L-2K for linux-arm-kernel@lists.infradead.org; Thu, 14 Dec 2023 15:02:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1702566168; x=1734102168; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ntZXZCgAo08DHpFb/9nNhS/xpUgp98Z+o0yfQiEXmaI=; b=BbFilNgnjPPXtdZypgmbK5icc9XE4uBY0V2MPkji/b6DU3C1Sxw3q+Ax Dc6RkzizlNZoLPiUgJJaYgVbzMHGzsv7FJ5iimr52MgxeBsQER2VMJRMw rqyWY+kH+tYgKvjgNan+zW6gg+XOo3H7SYQNn0SrFIaHWuZIRBmW7Mkrz WGRMOQBP2CjO8dOf0KYXVKmxbxaSscCgMwAxqDS5UI/SSw64aVMf/FfLQ wA50ve3DMqxUwfBaRCtm2wipD6bbhYpid8AJmiUHbCj70I2mbUGWiMvJz vAtArdRzlG0aiBZJIggtNxTKoxY+eXY2OjS75yswIwMPpf8N82PUiC7wk A==; X-IronPort-AV: E=Sophos;i="6.04,275,1695679200"; d="scan'208";a="34513397" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 14 Dec 2023 16:02:44 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 24A03280084; Thu, 14 Dec 2023 16:02:44 +0100 (CET) From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/5] arm64: dts: imx8qxp: Add ACM input clock gates Date: Thu, 14 Dec 2023 16:02:39 +0100 Message-Id: <20231214150243.1991532-2-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214150243.1991532-1-alexander.stein@ew.tq-group.com> References: <20231214150243.1991532-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231214_070249_067159_649FD384 X-CRM114-Status: GOOD ( 10.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These clock gates provide input clocks for ACM. They can be selected by IMX_ADMA_ACM_* macros. As SAI driver does not provide Tx/Rx bitclock clocks yet, add dummy clocks for the unimplemented inputs. Signed-off-by: Alexander Stein --- ACM needs a lot of input clocks, while currently only 4 (aud_rec*_lpcg and aud_pll_div*_lpcg) do have an actual clock provider. For each unsupported clock there is a 0Hz fixed-clock added. This should be removed once a proper clock provider is added. This is different to the clock-dummy in imx8qxp.dtsi which provides a dummy clock for an invalid mux settings. .../boot/dts/freescale/imx8-ss-audio.dtsi | 138 ++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index f057c6b21b301..f080be75c4219 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -14,6 +14,104 @@ audio_ipg_clk: clock-audio-ipg { clock-output-names = "audio_ipg_clk"; }; +clk_ext_aud_mclk0: clock-ext-aud-mclk0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "ext_aud_mclk0"; +}; + +clk_ext_aud_mclk1: clock-ext-aud-mclk1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "ext_aud_mclk1"; +}; + +clk_esai0_rx_clk: clock-esai0-rx { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "esai0_rx_clk"; +}; + +clk_esai0_rx_hf_clk: clock-esai0-rx-hf { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "esai0_rx_hf_clk"; +}; + +clk_esai0_tx_clk: clock-esai0-tx { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "esai0_tx_clk"; +}; + +clk_esai0_tx_hf_clk: clock-esai0-tx-hf { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "esai0_tx_hf_clk"; +}; + +clk_spdif0_rx: clock-spdif0-rx { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "spdif0_rx"; +}; + +clk_sai0_rx_bclk: clock-sai0-rx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai0_rx_bclk"; +}; + +clk_sai0_tx_bclk: clock-sai0-tx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai0_tx_bclk"; +}; + +clk_sai1_rx_bclk: clock-sai1-rx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai1_rx_bclk"; +}; + +clk_sai1_tx_bclk: clock-sai1-tx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai1_tx_bclk"; +}; + +clk_sai2_rx_bclk: clock-sai2-rx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai2_rx_bclk"; +}; + +clk_sai3_rx_bclk: clock-sai3-rx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai3_rx_bclk"; +}; + +clk_sai4_rx_bclk: clock-sai4-rx-bclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "sai4_rx_bclk"; +}; + audio_subsys: bus@59000000 { compatible = "simple-bus"; #address-cells = <1>; @@ -151,4 +249,44 @@ edma1: dma-controller@599f0000 { <&pd IMX_SC_R_DMA_1_CH9>, <&pd IMX_SC_R_DMA_1_CH10>; }; + + aud_rec0_lpcg: clock-controller@59d00000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59d00000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>; + clock-indices = ; + clock-output-names = "aud_rec_clk0_lpcg_clk"; + power-domains = <&pd IMX_SC_R_AUDIO_PLL_0>; + }; + + aud_rec1_lpcg: clock-controller@59d10000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59d10000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>; + clock-indices = ; + clock-output-names = "aud_rec_clk1_lpcg_clk"; + power-domains = <&pd IMX_SC_R_AUDIO_PLL_1>; + }; + + aud_pll_div0_lpcg: clock-controller@59d20000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59d20000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>; + clock-indices = ; + clock-output-names = "aud_pll_div_clk0_lpcg_clk"; + power-domains = <&pd IMX_SC_R_AUDIO_PLL_0>; + }; + + aud_pll_div1_lpcg: clock-controller@59d30000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59d30000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>; + clock-indices = ; + clock-output-names = "aud_pll_div_clk1_lpcg_clk"; + power-domains = <&pd IMX_SC_R_AUDIO_PLL_1>; + }; }; From patchwork Thu Dec 14 15:02:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 13493172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 506FDC10F13 for ; Thu, 14 Dec 2023 15:03:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The audio clock mux (ACM) selects the input clock for each attached consumer, referenced by clock-cell. Signed-off-by: Alexander Stein --- This node is essentially copied from Documentation/devicetree/bindings/clock/fsl,imx8-acm.yaml. .../boot/dts/freescale/imx8-ss-audio.dtsi | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index f080be75c4219..61ef0272b06e6 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -289,4 +289,63 @@ aud_pll_div1_lpcg: clock-controller@59d30000 { clock-output-names = "aud_pll_div_clk1_lpcg_clk"; power-domains = <&pd IMX_SC_R_AUDIO_PLL_1>; }; + + acm: acm@59e00000 { + compatible = "fsl,imx8qxp-acm"; + reg = <0x59e00000 0x1d0000>; + #clock-cells = <1>; + power-domains = <&pd IMX_SC_R_AUDIO_CLK_0>, + <&pd IMX_SC_R_AUDIO_CLK_1>, + <&pd IMX_SC_R_MCLK_OUT_0>, + <&pd IMX_SC_R_MCLK_OUT_1>, + <&pd IMX_SC_R_AUDIO_PLL_0>, + <&pd IMX_SC_R_AUDIO_PLL_1>, + <&pd IMX_SC_R_ASRC_0>, + <&pd IMX_SC_R_ASRC_1>, + <&pd IMX_SC_R_ESAI_0>, + <&pd IMX_SC_R_SAI_0>, + <&pd IMX_SC_R_SAI_1>, + <&pd IMX_SC_R_SAI_2>, + <&pd IMX_SC_R_SAI_3>, + <&pd IMX_SC_R_SAI_4>, + <&pd IMX_SC_R_SAI_5>, + <&pd IMX_SC_R_SPDIF_0>, + <&pd IMX_SC_R_MQS_0>; + clocks = <&aud_rec0_lpcg IMX_LPCG_CLK_0>, + <&aud_rec1_lpcg IMX_LPCG_CLK_0>, + <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>, + <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>, + <&clk_ext_aud_mclk0>, + <&clk_ext_aud_mclk1>, + <&clk_esai0_rx_clk>, + <&clk_esai0_rx_hf_clk>, + <&clk_esai0_tx_clk>, + <&clk_esai0_tx_hf_clk>, + <&clk_spdif0_rx>, + <&clk_sai0_rx_bclk>, + <&clk_sai0_tx_bclk>, + <&clk_sai1_rx_bclk>, + <&clk_sai1_tx_bclk>, + <&clk_sai2_rx_bclk>, + <&clk_sai3_rx_bclk>, + <&clk_sai4_rx_bclk>; + clock-names = "aud_rec_clk0_lpcg_clk", + "aud_rec_clk1_lpcg_clk", + "aud_pll_div_clk0_lpcg_clk", + "aud_pll_div_clk1_lpcg_clk", + "ext_aud_mclk0", + "ext_aud_mclk1", + "esai0_rx_clk", + "esai0_rx_hf_clk", + "esai0_tx_clk", + "esai0_tx_hf_clk", + "spdif0_rx", + "sai0_rx_bclk", + "sai0_tx_bclk", + "sai1_rx_bclk", + "sai1_tx_bclk", + "sai2_rx_bclk", + "sai3_rx_bclk", + "sai4_rx_bclk"; + }; }; From patchwork Thu Dec 14 15:02:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 13493170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B968C4167B for ; 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14 Dec 2023 16:02:44 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 8F366280084; Thu, 14 Dec 2023 16:02:44 +0100 (CET) From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/5] arm64: dts: imx8qxp: Add audio SAI nodes Date: Thu, 14 Dec 2023 16:02:41 +0100 Message-Id: <20231214150243.1991532-4-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214150243.1991532-1-alexander.stein@ew.tq-group.com> References: <20231214150243.1991532-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231214_070251_990345_21D4228D X-CRM114-Status: GOOD ( 11.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds the sai nodes attached to aips1 bus. These can be shared with imx8qm as well. Input clock from ACM is always feed to mclk1 only. Others are unused and are connected to a dummy clock. Signed-off-by: Alexander Stein --- This SAI list is not complete, but re-usable on imx8qm without any further change. Adding SAI4/5 needs to be done in a SoC-specific file imx8qxp-ss-audio.dtsi. They are hard-wired to the internal audio mixer as well. .../boot/dts/freescale/imx8-ss-audio.dtsi | 113 ++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 ++ 2 files changed, 120 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index 61ef0272b06e6..29a7d10f7db3d 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -4,6 +4,7 @@ * Dong Aisheng */ +#include #include #include @@ -118,6 +119,70 @@ audio_subsys: bus@59000000 { #size-cells = <1>; ranges = <0x59000000 0x0 0x59000000 0x1000000>; + sai0: sai@59040000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59040000 0x10000>; + interrupts = ; + clocks = <&sai0_lpcg 1>, + <&clk_dummy>, + <&sai0_lpcg 0>, + <&clk_dummy>, + <&clk_dummy>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma0 12 0 1>, <&edma0 13 0 0>; + power-domains = <&pd IMX_SC_R_SAI_0>; + status = "disabled"; + }; + + sai1: sai@59050000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59050000 0x10000>; + interrupts = ; + clocks = <&sai1_lpcg 1>, + <&clk_dummy>, + <&sai1_lpcg 0>, + <&clk_dummy>, + <&clk_dummy>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma0 14 0 1>, <&edma0 15 0 0>; + power-domains = <&pd IMX_SC_R_SAI_1>; + status = "disabled"; + }; + + sai2: sai@59060000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59060000 0x10000>; + interrupts = ; + clocks = <&sai2_lpcg 1>, + <&clk_dummy>, + <&sai2_lpcg 0>, + <&clk_dummy>, + <&clk_dummy>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx"; + dmas = <&edma0 16 0 1>; + power-domains = <&pd IMX_SC_R_SAI_2>; + status = "disabled"; + }; + + sai3: sai@59070000 { + compatible = "fsl,imx8qm-sai"; + reg = <0x59070000 0x10000>; + interrupts = ; + clocks = <&sai3_lpcg 1>, + <&clk_dummy>, + <&sai3_lpcg 0>, + <&clk_dummy>, + <&clk_dummy>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dma-names = "rx"; + dmas = <&edma0 17 0 1>; + power-domains = <&pd IMX_SC_R_SAI_3>; + status = "disabled"; + }; + edma0: dma-controller@591f0000 { compatible = "fsl,imx8qm-edma"; reg = <0x591f0000 0x190000>; @@ -174,6 +239,54 @@ edma0: dma-controller@591f0000 { <&pd IMX_SC_R_DMA_0_CH23>; }; + sai0_lpcg: clock-controller@59440000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59440000 0x10000>; + #clock-cells = <1>; + clocks = <&acm IMX_ADMA_ACM_SAI0_MCLK_SEL>, + <&audio_ipg_clk>; + clock-indices = , ; + clock-output-names = "sai0_lpcg_mclk", + "sai0_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_SAI_0>; + }; + + sai1_lpcg: clock-controller@59450000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59450000 0x10000>; + #clock-cells = <1>; + clocks = <&acm IMX_ADMA_ACM_SAI1_MCLK_SEL>, + <&audio_ipg_clk>; + clock-indices = , ; + clock-output-names = "sai1_lpcg_mclk", + "sai1_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_SAI_1>; + }; + + sai2_lpcg: clock-controller@59460000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59460000 0x10000>; + #clock-cells = <1>; + clocks = <&acm IMX_ADMA_ACM_SAI2_MCLK_SEL>, + <&audio_ipg_clk>; + clock-indices = , ; + clock-output-names = "sai2_lpcg_mclk", + "sai2_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_SAI_2>; + }; + + sai3_lpcg: clock-controller@59470000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59470000 0x10000>; + #clock-cells = <1>; + clocks = <&acm IMX_ADMA_ACM_SAI3_MCLK_SEL>, + <&audio_ipg_clk>; + clock-indices = , ; + clock-output-names = "sai3_lpcg_mclk", + "sai3_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_SAI_3>; + }; + dsp_lpcg: clock-controller@59580000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x59580000 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 958267b333403..fdbb4242b157c 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -260,6 +260,13 @@ timer { ; /* Hypervisor */ }; + clk_dummy: clock-dummy { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "clk_dummy"; + }; + xtal32k: clock-xtal32k { compatible = "fixed-clock"; #clock-cells = <0>; From patchwork Thu Dec 14 15:02:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 13493173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3E8EC4167B for ; Thu, 14 Dec 2023 15:03:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These clock gates provide a clock output on ACM_MCLK_OUT pads. They are intended to be used as MCLK for SAI0-3. Signed-off-by: Alexander Stein --- .../boot/dts/freescale/imx8-ss-audio.dtsi | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index 29a7d10f7db3d..07afeb78ed564 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -403,6 +403,26 @@ aud_pll_div1_lpcg: clock-controller@59d30000 { power-domains = <&pd IMX_SC_R_AUDIO_PLL_1>; }; + mclkout0_lpcg: clock-controller@59d50000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59d50000 0x10000>; + #clock-cells = <1>; + clocks = <&acm IMX_ADMA_ACM_MCLKOUT0_SEL>; + clock-indices = ; + clock-output-names = "mclkout0_lpcg_clk"; + power-domains = <&pd IMX_SC_R_MCLK_OUT_0>; + }; + + mclkout1_lpcg: clock-controller@59d60000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x59d60000 0x10000>; + #clock-cells = <1>; + clocks = <&acm IMX_ADMA_ACM_MCLKOUT1_SEL>; + clock-indices = ; + clock-output-names = "mclkout1_lpcg_clk"; + power-domains = <&pd IMX_SC_R_MCLK_OUT_1>; + }; + acm: acm@59e00000 { compatible = "fsl,imx8qxp-acm"; reg = <0x59e00000 0x1d0000>; From patchwork Thu Dec 14 15:02:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 13493171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 060A5C4167D for ; Thu, 14 Dec 2023 15:03:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=eisuyFOlTcr+YrM17j+SBgd6K1yNTIGZqxFReQQ2Qy8=; b=BWNkFlZPueZswxwdIhMF2NvuepnJ7zRsUGgs0uKw/V7vSztkGiNUssw4 6gnvVD5uVHfGF7uVxaErFsJ9Uf27wiopwLRfipjg2fvnzOUChuDiu8NmI lzZE6/+zziiWyhbR+vTna49hyeuXUQ4FbxVGHuenS+5soRQZRoAOLPVUn Yzt1qjSonre3s9y+95Pa1ORDjX5UKfTv1fFpywVK0yHRwPnnGgX3NuCMY AuBJ6TDmlHU2pd1xBOgDAxXYbvfOrdGDrsp6zZvw/M5UQSTcsTqpl31qJ tZ2uRDTAEgx3mzvQlgWbtaQj1RdEQ2XwNuQMzJ2YMrE9kwYhCX2zXu5kt w==; X-IronPort-AV: E=Sophos;i="6.04,275,1695679200"; d="scan'208";a="34513401" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 14 Dec 2023 16:02:45 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id F3FDC280084; Thu, 14 Dec 2023 16:02:44 +0100 (CET) From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/5] arm64: dts: imx8qxp: mba8xx: Add analog audio output on MBa8Xx Date: Thu, 14 Dec 2023 16:02:43 +0100 Message-Id: <20231214150243.1991532-6-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214150243.1991532-1-alexander.stein@ew.tq-group.com> References: <20231214150243.1991532-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231214_070253_046926_21CC0D60 X-CRM114-Status: GOOD ( 10.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable SAI1, add the codec to enable LINE_IN and LINE_OUT support on MBa8Xx on connectors X9 & X10. Signed-off-by: Alexander Stein --- arch/arm64/boot/dts/freescale/mba8xx.dtsi | 27 ++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/mba8xx.dtsi b/arch/arm64/boot/dts/freescale/mba8xx.dtsi index a263c3d008023..6164fefb92184 100644 --- a/arch/arm64/boot/dts/freescale/mba8xx.dtsi +++ b/arch/arm64/boot/dts/freescale/mba8xx.dtsi @@ -116,7 +116,12 @@ reg_3v3_mb: regulator-usdhc2-vmmc { regulator-max-microvolt = <3300000>; }; - /* TODO: Audio */ + sound { + compatible = "fsl,imx-audio-tlv320aic32x4"; + model = "tqm-tlv320aic32"; + audio-codec = <&tlv320aic3x04>; + ssi-controller = <&sai1>; + }; }; &adc0 { @@ -204,7 +209,14 @@ &flexcan2 { }; &i2c1 { - /* TODO: Add Audio codec */ + tlv320aic3x04: audio-codec@18 { + compatible = "ti,tlv320aic32x4"; + reg = <0x18>; + clocks = <&mclkout0_lpcg 0>; + clock-names = "mclk"; + iov-supply = <®_1v8>; + ldoin-supply = <®_3v3>; + }; se97b_1c: temperature-sensor@1c { compatible = "nxp,se97b", "jedec,jc-42.4-temp"; @@ -298,7 +310,16 @@ &lsio_gpio3 { /* TODO: Mini-PCIe */ -/* TODO: SAI1 */ +&sai1 { + assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&sai1_lpcg 0>; + assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai1>; + status = "okay"; +}; &usbotg1 { pinctrl-names = "default";